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*** SESSION Feb. 28, 2026 20:03:36.773 -----------------------------------------
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value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_COPROC" value="15"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_DSP" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_FMA" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_IDIV" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_LDREX" value="7"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_QBIT" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_SAT" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_SIMD32" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FEATURE_UNALIGNED" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_FP" value="4"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_PCS_VFP" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_SIZEOF_MINIMAL_ENUM" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ARM_SIZEOF_WCHAR_T" value="4"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ATOMIC_ACQUIRE" value="2"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ATOMIC_ACQ_REL" value="4"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ATOMIC_CONSUME" value="1"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ATOMIC_RELAXED" value="0"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ATOMIC_RELEASE" value="3"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__ATOMIC_SEQ_CST" value="5"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__BIGGEST_ALIGNMENT__" value="8"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__BYTE_ORDER__" value="__ORDER_LITTLE_ENDIAN__"><flag value="BUILTIN|READONLY"/></entry><entry kind="macro" name="__CHAR16_TYPE__" value="short unsigned int"><flag value="Line truncated
|
||||
@@ -217,3 +217,429 @@ arm-none-eabi-size task1.elf
|
||||
1144 0 1568 2712 a98 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
13:01:07 **** Build of configuration Debug for project task1 ****
|
||||
make -j24 all
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
|
||||
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
|
||||
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"D:\04 Studium\SS26\mct\git-praktikum\MZT-Praktikum\task1\STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1664 0 1568 3232 ca0 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:15:54 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
|
||||
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
|
||||
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1664 0 1568 3232 ca0 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:16:23 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1672 0 1568 3240 ca8 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:17:15 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1692 0 1568 3260 cbc task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:18:09 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1684 0 1568 3252 cb4 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
14:21:35 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1692 0 1568 3260 cbc task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
15:01:24 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc -o "task1.elf" @"objects.list" -mcpu=cortex-m4 -T"/home/tobii/02_Uni/09_Mikrocomputertechnik/praktikum/mct_bei_workspace_25w/task1/STM32G431KBTX_FLASH.ld" --specs=nosys.specs -Wl,-Map="task1.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
Finished building target: task1.elf
|
||||
|
||||
arm-none-eabi-size task1.elf
|
||||
arm-none-eabi-objdump -h -S task1.elf > "task1.list"
|
||||
text data bss dec hex filename
|
||||
1692 0 1568 3260 cbc task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
Finished building: task1.list
|
||||
|
||||
16:09:45 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:20:32 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
task2.s: Assembler messages:
|
||||
task2.s:128: Error: ARM register expected -- `movs '
|
||||
make: *** [makefile:74: task2.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
18:20:48 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:21:57 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:22:48 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:23:22 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:23:42 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:23:54 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:24:03 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:24:24 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:24:36 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:25:04 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:25:26 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:25:42 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:26:11 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
260 0 0 260 104 task2.elf
|
||||
Target all ready
|
||||
18:26:34 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
264 0 0 264 108 task2.elf
|
||||
Target all ready
|
||||
18:26:57 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
248 0 0 248 f8 task2.elf
|
||||
Target all ready
|
||||
18:27:24 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
18:29:47 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:35:13 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
18:35:46 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
18:35:51 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:12:30 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:12:55 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:13:16 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:13:43 **** Clean-only build of configuration Debug for project task1 ****
|
||||
make -j12 clean
|
||||
rm -rf ./Startup/startup_stm32g431kbtx.d ./Startup/startup_stm32g431kbtx.o ./Startup/syscalls.cyclo ./Startup/syscalls.d ./Startup/syscalls.o ./Startup/syscalls.su ./Startup/sysmem.cyclo ./Startup/sysmem.d ./Startup/sysmem.o ./Startup/sysmem.su
|
||||
rm -rf ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
|
||||
rm -rf default.size.stdout task1.elf task1.list task1.map
|
||||
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task2 ****
|
||||
make -j12 clean
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task3 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task4 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
14:14:11 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
240 0 0 240 f0 task2.elf
|
||||
Target all ready
|
||||
14:15:19 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:15:29 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:16:17 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:17:15 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:17:57 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:19:07 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:56:35 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:57:35 **** Clean-only build of configuration Debug for project task2 ****
|
||||
make -j12 clean
|
||||
14:57:51 **** Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
648 0 0 648 288 task2.elf
|
||||
Target all ready
|
||||
14:58:02 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
14:58:10 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
13:53:05 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
task2.s: Assembler messages:
|
||||
task2.s:346: Error: junk at end of line, first unrecognized character is `h'
|
||||
make: *** [makefile:74: task2.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
13:53:51 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-as -o task2.o task2.s -march=armv7-m -mcpu=cortex-m4 -adglns -g -mthumb --warn > task2.als
|
||||
arm-none-eabi-ld -o task2.elf -T ldscript_rom.ld task2.o -g -Map task2.map --cref -static
|
||||
arm-none-eabi-objdump -htdr -j .text -j .data -j .bss -j .vectortable -j .exhand task2.elf > task2.lst
|
||||
arm-none-eabi-size task2.elf
|
||||
text data bss dec hex filename
|
||||
532 0 0 532 214 task2.elf
|
||||
Target all ready
|
||||
13:56:03 **** Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -DDEBUG -c -x assembler-with-cpp -MMD -MP -MF"Startup/startup_stm32g431kbtx.d" -MT"Startup/startup_stm32g431kbtx.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/startup_stm32g431kbtx.o" "../Startup/startup_stm32g431kbtx.s"
|
||||
arm-none-eabi-gcc "../Startup/syscalls.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/syscalls.d" -MT"Startup/syscalls.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/syscalls.o"
|
||||
arm-none-eabi-gcc "../Startup/sysmem.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Startup/sysmem.d" -MT"Startup/sysmem.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Startup/sysmem.o"
|
||||
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
arm-none-eabi-gcc "../Src/task1_it.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1_it.d" -MT"Src/task1_it.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1_it.o"
|
||||
../Src/sketch.c: In function 'main':
|
||||
../Src/sketch.c:11:42: error: expected expression before ')' token
|
||||
11 | while(/*schalter nicht gedrückt*/){}
|
||||
| ^
|
||||
../Src/sketch.c:12:9: warning: implicit declaration of function 'delay' [-Wimplicit-function-declaration]
|
||||
12 | delay(10);
|
||||
| ^~~~~
|
||||
../Src/sketch.c:13:39: error: expected expression before ')' token
|
||||
13 | while(/*schalter losgelassen*/){}
|
||||
| ^
|
||||
../Src/sketch.c:18:39: error: request for member 'length' in something not a structure or union
|
||||
18 | for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
| ^
|
||||
../Src/sketch.c:20:20: warning: suggest parentheses around assignment used as truth value [-Wparentheses]
|
||||
20 | if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
| ^
|
||||
../Src/sketch.c:21:20: warning: suggest parentheses around assignment used as truth value [-Wparentheses]
|
||||
21 | if(i = 1){/*..*/}
|
||||
| ^
|
||||
../Src/sketch.c:24:44: error: expected expression before ')' token
|
||||
24 | if(/*schalter gerückt*/){
|
||||
| ^
|
||||
../Src/sketch.c:32:42: error: expected expression before ')' token
|
||||
32 | while(/*Taster gedrückt*/){}
|
||||
| ^
|
||||
make: *** [Src/subdir.mk:25: Src/sketch.o] Error 1
|
||||
make: *** Waiting for unfinished jobs....
|
||||
../Src/task1.c: In function 'GPIO_init':
|
||||
../Src/task1.c:169:22: error: expected expression before '<<' token
|
||||
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
| ^~
|
||||
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
13:56:35 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
../Src/task1.c: In function 'GPIO_init':
|
||||
../Src/task1.c:169:22: error: expected expression before '<<' token
|
||||
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
| ^~
|
||||
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
14:02:22 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
@@ -1,10 +1,13 @@
|
||||
11:56:08 **** Incremental Build of configuration Debug for project task1 ****
|
||||
13:56:35 **** Incremental Build of configuration Debug for project task1 ****
|
||||
make -j12 all
|
||||
arm-none-eabi-size task1.elf
|
||||
text data bss dec hex filename
|
||||
1144 0 1568 2712 a98 task1.elf
|
||||
Finished building: default.size.stdout
|
||||
|
||||
arm-none-eabi-gcc "../Src/sketch.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/sketch.d" -MT"Src/sketch.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/sketch.o"
|
||||
arm-none-eabi-gcc "../Src/task1.c" -mcpu=cortex-m4 -std=gnu11 -g3 -DDEBUG -DSTM32G431KBTx -DSTM32 -DSTM32G4 -DNUCLEO_G431KB -c -I../Inc -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -fcyclomatic-complexity -MMD -MP -MF"Src/task1.d" -MT"Src/task1.o" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "Src/task1.o"
|
||||
../Src/task1.c: In function 'GPIO_init':
|
||||
../Src/task1.c:169:22: error: expected expression before '<<' token
|
||||
169 | GPIOA->MODER &= ~(3 ^<< 2); // Versuch: LED 1 Mode löschen :klappt so
|
||||
| ^~
|
||||
make: *** [Src/subdir.mk:25: Src/task1.o] Error 1
|
||||
"make -j12 all" terminated with exit code 2. Build might be incomplete.
|
||||
|
||||
11:56:08 Build Finished. 0 errors, 0 warnings. (took 119ms)
|
||||
13:56:35 Build Failed. 2 errors, 0 warnings. (took 166ms)
|
||||
|
||||
@@ -1,5 +1,6 @@
|
||||
11:52:45 **** Clean-only build of configuration Debug for project task2 ****
|
||||
make -j12 clean
|
||||
14:02:22 **** Incremental Build of configuration Debug for project task2 ****
|
||||
make -j12 all
|
||||
Target all ready
|
||||
|
||||
11:52:45 Build Finished. 0 errors, 0 warnings. (took 126ms)
|
||||
14:02:22 Build Finished. 0 errors, 0 warnings. (took 121ms)
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
11:52:45 **** Clean-only build of configuration Debug for project task3 ****
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task3 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
|
||||
11:52:45 Build Failed. 1 errors, 0 warnings. (took 126ms)
|
||||
14:13:44 Build Failed. 1 errors, 0 warnings. (took 186ms)
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
11:52:46 **** Clean-only build of configuration Debug for project task4 ****
|
||||
14:13:44 **** Clean-only build of configuration Debug for project task4 ****
|
||||
make -j12 clean
|
||||
makefile:62: *** multiple target patterns. Stop.
|
||||
"make -j12 clean" terminated with exit code 2. Build might be incomplete.
|
||||
|
||||
11:52:46 Build Failed. 1 errors, 0 warnings. (took 127ms)
|
||||
14:13:44 Build Failed. 1 errors, 0 warnings. (took 186ms)
|
||||
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #3]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x04
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+36
@@ -0,0 +1,36 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter gedrückt*/){}
|
||||
delay();
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay();
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
if(i = 1){/*..*/}
|
||||
//...
|
||||
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
|
||||
if(/*schalter gerückt*/){
|
||||
aktiv = 0;
|
||||
break;
|
||||
}
|
||||
else{
|
||||
delay(1);
|
||||
}
|
||||
}
|
||||
while(/*Taster gedrückt*/){}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
-147
@@ -1,147 +0,0 @@
|
||||
/* ***************************************************************************************
|
||||
* Project: task1 - C:GPIO
|
||||
* File: task1.c
|
||||
*
|
||||
* Language: C
|
||||
*
|
||||
* Hardware: STefi Light v1.1
|
||||
* Processor: STM32G431KBT6U
|
||||
*
|
||||
* Author: Manuel Lederhofer
|
||||
* Datum: 10.09.2021
|
||||
*
|
||||
* Version: 2.1
|
||||
* History:
|
||||
* 10.09.2021 ML create project
|
||||
* 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
* 18.02.2025 TK changed projectname to "C: GPIO)
|
||||
*
|
||||
* Status: under development
|
||||
*
|
||||
* Description:
|
||||
* Blinks the red LED of STefi Light, currently.
|
||||
* This file contains the main routine and the initialization.
|
||||
*
|
||||
* Notes:
|
||||
* - MCU speed at startup is 16 MHz
|
||||
*
|
||||
* Todo:
|
||||
* - Change the example code to match the description and requirements
|
||||
* of the requested application in the lab exercise guide.
|
||||
*
|
||||
************************************************************************************** */
|
||||
|
||||
/* ------------------------------------ INCLUDES -------------------------------------- */
|
||||
#include "stm32g431xx.h"
|
||||
#include "STefi-Light.h"
|
||||
|
||||
|
||||
/* ------------------------------------ DEFINES --------------------------------------- */
|
||||
#define LOOPS_PER_MS 1244 // NOP-loops for delay()
|
||||
#define WAITTIME 500
|
||||
|
||||
|
||||
/* ------------------------------------ TYPE DEFINITIONS ------------------------------ */
|
||||
/* ------------------------------------ GLOBAL VARIABLES ------------------------------ */
|
||||
int state = 0;
|
||||
/* ------------------------------------ PRIVATE VARIABLES ----------------------------- */
|
||||
|
||||
|
||||
/* ------------------------------------ PROTOTYPES ------------------------------------ */
|
||||
static void GPIO_init(void);
|
||||
static void delay(const uint16_t ms);
|
||||
|
||||
|
||||
/* ------------------------------------ M A I N --------------------------------------- */
|
||||
int main(void)
|
||||
{
|
||||
/* --- initialization --- */
|
||||
__disable_irq(); // disable interrupts globally
|
||||
|
||||
GPIO_init();
|
||||
|
||||
__enable_irq(); // enable interrupts globally
|
||||
|
||||
|
||||
/* --- one time tasks --- */
|
||||
|
||||
|
||||
/* --- infinite processing loop --- */
|
||||
while (1)
|
||||
{
|
||||
/* ... add your code to implement the lab assignment ... */
|
||||
|
||||
switch (state) {
|
||||
case 0:
|
||||
GPIOA->ODR &= ~(1 << 1); // LED0 on
|
||||
|
||||
state++;
|
||||
break;
|
||||
case 1:
|
||||
delay(WAITTIME); // wait
|
||||
state++;
|
||||
break;
|
||||
case 2:
|
||||
GPIOA->ODR |= (1 << 1); // LED0 off
|
||||
delay(WAITTIME); // wait
|
||||
state = 0;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------ GLOBAL FUNCTIONS ------------------------------ */
|
||||
|
||||
|
||||
/* ------------------------------------ PRIVATE FUNCTIONS ----------------------------- */
|
||||
|
||||
/* ------------------------------------------------------------------------------------ *\
|
||||
* method: static void GPIO_init(void)
|
||||
*
|
||||
* Initializes GPIOs on STefi Light for pins with peripherals attached.
|
||||
*
|
||||
* requires: - nothing -
|
||||
* parameters: - none -
|
||||
* returns: - nothing -
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
static void GPIO_init(void)
|
||||
{
|
||||
/* enable port clocks */
|
||||
RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN; // LEDs: A
|
||||
|
||||
|
||||
/* --- LEDs --- */
|
||||
//GPIOA->ODR |= MASK_LED_RED;
|
||||
GPIOA->ODR |= MASK_LED_YELLOW;
|
||||
GPIOA->MODER &= ~(3 << 0);
|
||||
GPIOA->MODER |= (1 << 1); // set LED pin to output
|
||||
}
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------------------------ *\
|
||||
* method: static void delay(const uint16_t ms)
|
||||
*
|
||||
* Realizes a millisecond delay by very bad busy-wait.
|
||||
*
|
||||
* requires: - nothing -
|
||||
* parameters: ms - delay time in milliseconds
|
||||
* returns: - nothing -
|
||||
\* ------------------------------------------------------------------------------------ */
|
||||
static void delay(const uint16_t ms)
|
||||
{
|
||||
for (uint16_t i = 0; i < ms; ++i)
|
||||
{
|
||||
for (uint16_t j = 0; j < LOOPS_PER_MS; ++j)
|
||||
{
|
||||
__asm("NOP");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* ************************************ E O F ***************************************** */
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #2]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+328
@@ -0,0 +1,328 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
// Zusätzliche und benötigte Adressen
|
||||
.equ RCC_AHB2ENR, 0x4002104C
|
||||
.equ RCC_APB2ENR, 0x40021060
|
||||
|
||||
.equ GPIOA_MODER, 0x48000000
|
||||
.equ GPIOA_ODR, 0x48000014
|
||||
|
||||
.equ GPIOC_MODER, 0x48000800
|
||||
.equ GPIOC_PUPDR, 0x4800080C
|
||||
.equ GPIOC_IDR, 0x48000810
|
||||
|
||||
.equ SYSCFG_BASE, 0x40010000
|
||||
.equ SYSCFG_EXTICR4, (SYSCFG_BASE + 0x14)
|
||||
|
||||
.equ EXTI_BASE, 0x40010400
|
||||
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
|
||||
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
|
||||
.equ EXTI_PR1, (EXTI_BASE + 0x14)
|
||||
|
||||
.equ NVIC_ISER1, 0xE000E104
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
.space 0xD0 // padding 208 Bytes bis Offset 0xE0 (EXTI15_10 IRQ 40)
|
||||
.word _ISR_S0_S1 // gemeinsamer Interrupt für PC13 (S0) und PC14 (S1)
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOVS r2, #0x05 // Bit 0 (GPIOA) und Bit 2 (GPIOC)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- port init
|
||||
#- LEDs (PA0-PA3)
|
||||
LDR r1, =GPIOA_MODER
|
||||
LDR r2, =0x000000FF // Maske PA0-PA3
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000055 // Maske Output 0101 0101
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0F // Maske LED0-3
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- buttons (PC13, PC14 als Input)
|
||||
LDR r1, =GPIOC_MODER
|
||||
LDR r2, =0x3C000000 // Maske Bits 26-29
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- Pull-Up für PC13, PC14
|
||||
LDR r1, =GPIOC_PUPDR
|
||||
LDR r2, =0x3C000000
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x14000000 // 01 = Pull-Up für PC13 (Bits 27:26) und PC14 (Bits 29:28)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
LDR r1, =RCC_APB2ENR
|
||||
MOVS r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
LDR r1, =SYSCFG_EXTICR4
|
||||
LDR r2, =0x00000FF0 // Maske für EXTI13 (Bits 7:4) und EXTI14 (Bits 11:8)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000220 // Port C (0010) für EXTI13 und EXTI14
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
LDR r1, =EXTI_FTSR1 // Fallende Flanke
|
||||
LDR r2, =0x00006000 // Bits 13 und 14
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =EXTI_IMR1 // Maskierung aufheben
|
||||
LDR r2, =0x00006000
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
LDR r1, =NVIC_ISER1
|
||||
LDR r2, =0x00000100 // Bit 8 für IRQ 40 (EXTI15_10)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
WFI
|
||||
B main
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
LDR r0, =106000 // Entprell-Zeit ~20ms
|
||||
.L1:
|
||||
SUBS r0, r0, #1
|
||||
BNE .L1
|
||||
BX lr
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP
|
||||
B stop
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x44
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0A
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x11
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x05
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0_S1, %function
|
||||
_ISR_S0_S1:
|
||||
PUSH {r4, r5, lr} // Wichtig: Register sichern gemäß AAPCS
|
||||
|
||||
_check_S0:
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, [r4, #0]
|
||||
LDR r2, =0x2000 // Maske für S0 (PC13 / Bit 13)
|
||||
TST r5, r2
|
||||
BEQ _check_S1 // Wenn Bit 13 nicht gesetzt, überspringen
|
||||
|
||||
#--- do the work S0
|
||||
BL delay // Entprellen
|
||||
|
||||
LDR r0, =GPIOC_IDR
|
||||
LDR r1, [r0, #0]
|
||||
LDR r2, =0x2000
|
||||
TST r1, r2
|
||||
BNE _clear_S0 // Abbruch, wenn High (Taster prellt / schon losgelassen)
|
||||
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x09 // LED0 & LED3 toggeln (1001)
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_S0:
|
||||
#--- clear interrupt flag S0
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, =0x2000
|
||||
STR r5, [r4, #0]
|
||||
|
||||
_check_S1:
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, [r4, #0]
|
||||
LDR r2, =0x4000 // Maske für S1 (PC14 / Bit 14)
|
||||
TST r5, r2
|
||||
BEQ _leave_ISR // Wenn Bit 14 nicht gesetzt, Ende
|
||||
|
||||
#--- do the work S1
|
||||
BL delay
|
||||
|
||||
LDR r0, =GPIOC_IDR
|
||||
LDR r1, [r0, #0]
|
||||
LDR r2, =0x4000
|
||||
TST r1, r2
|
||||
BNE _clear_S1 // Abbruch, wenn High
|
||||
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x06 // LED1 & LED2 toggeln (0110)
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_S1:
|
||||
#--- clear interrupt flag S1
|
||||
LDR r4, =EXTI_PR1
|
||||
LDR r5, =0x4000
|
||||
STR r5, [r4, #0]
|
||||
|
||||
_leave_ISR:
|
||||
#--- leave ISR
|
||||
POP {r4, r5, pc} // Register wiederherstellen und zurückkehren
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+347
@@ -0,0 +1,347 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
// Falls in G431_addr.s vorhanden, diesen Block löschen um Fehler zu vermeiden:
|
||||
.equ RCC_AHB2ENR, 0x4002104C
|
||||
.equ RCC_APB2ENR, 0x40021060
|
||||
|
||||
.equ GPIOA_MODER, 0x48000000
|
||||
.equ GPIOA_ODR, 0x48000014
|
||||
|
||||
.equ GPIOB_MODER, 0x48000400
|
||||
.equ GPIOB_PUPDR, 0x4800040C
|
||||
.equ GPIOB_IDR, 0x48000410
|
||||
|
||||
.equ SYSCFG_BASE, 0x40010000
|
||||
.equ SYSCFG_EXTICR1, (SYSCFG_BASE + 0x08)
|
||||
.equ SYSCFG_EXTICR2, (SYSCFG_BASE + 0x0C)
|
||||
|
||||
.equ EXTI_BASE, 0x40010400
|
||||
.equ EXTI_IMR1, (EXTI_BASE + 0x00)
|
||||
.equ EXTI_FTSR1, (EXTI_BASE + 0x0C)
|
||||
.equ EXTI_PR1, (EXTI_BASE + 0x14)
|
||||
|
||||
.equ NVIC_ISER0, 0xE000E100
|
||||
|
||||
.equ DBGMCU_CR, 0xE0042004 // Adresse des Debug Configuration Registers
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a"
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer
|
||||
.word init // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
.space 0x48 // Padding 72 Bytes (Offset 0x10 -> 0x58)
|
||||
.word _ISR_EXTI0 // EXTI0_IRQHandler (PB0 / S0) - IRQ 6
|
||||
|
||||
.space 0x0C // Padding 12 Bytes (Offset 0x5C -> 0x68)
|
||||
.word _ISR_EXTI4 // EXTI4_IRQHandler (PB4 / S1) - IRQ 10
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i
|
||||
|
||||
MOVS r0, #0
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking (GPIOA, GPIOB)
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOVS r2, #0x03 // Bit 0 (GPIOA) und Bit 1 (GPIOB)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- port init
|
||||
#- LEDs (PA0 - PA3) als Output
|
||||
LDR r1, =GPIOA_MODER
|
||||
LDR r2, =0x000000FF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000055
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0F
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- buttons (PB0, PB4) als Input
|
||||
LDR r1, =GPIOB_MODER
|
||||
LDR r2, =0x00000303 // Maske Bits 0:1 (PB0) und 8:9 (PB4)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- Pull-Up für PB0, PB4
|
||||
LDR r1, =GPIOB_PUPDR
|
||||
LDR r2, =0x00000303
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
LDR r2, =0x00000101 // 01 = Pull-Up für PB0 und PB4
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
LDR r1, =RCC_APB2ENR
|
||||
MOVS r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- connect GPIO pins to EXTI lines
|
||||
LDR r1, =SYSCFG_EXTICR1 // EXTI0 (PB0)
|
||||
LDR r2, =0x000F // Maske EXTI0 (Bits 3:0)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x0001 // Port B (0001)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =SYSCFG_EXTICR2 // EXTI4 (PB4)
|
||||
LDR r2, =0x000F // Maske EXTI4 (Bits 3:0)
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x0001 // Port B (0001)
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- configure EXTI lines (falling edge, unmask)
|
||||
LDR r1, =EXTI_FTSR1
|
||||
MOVS r2, #0x11 // Bit 0 (EXTI0) und Bit 4 (EXTI4)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =EXTI_IMR1
|
||||
MOVS r2, #0x11 // Bit 0 und Bit 4
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#- NVIC: enable interrupts EXTI0 (IRQ 6) & EXTI4 (IRQ 10)
|
||||
LDR r1, =NVIC_ISER0
|
||||
LDR r2, =0x00000440 // Bit 6 (EXTI0) und Bit 10 (EXTI4)
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
#--- wachhalten während WFI
|
||||
LDR r1, =DBGMCU_CR
|
||||
LDR r0, [r1, #0]
|
||||
MOVS r2, #0x07 // Setzt DBG_SLEEP, DBG_STOP und DBG_STANDBY Bits
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
CPSIE i
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
WFI
|
||||
B main
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
LDR r0, =106000
|
||||
.L1:
|
||||
SUBS r0, r0, #1
|
||||
BNE .L1
|
||||
BX lr
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP
|
||||
B stop
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax"
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x44
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x0A
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
LDR r1, =RCC_AHB2ENR
|
||||
MOV r2, #0x01
|
||||
LDR r0, [r1, #0]
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r2, #0xFF
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
MOVS r2, #0x11
|
||||
ORRS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
LDR r1, =GPIOA_ODR
|
||||
MOVS r2, #0x05
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_EXTI0, %function
|
||||
_ISR_EXTI0:
|
||||
PUSH {lr}
|
||||
|
||||
#--- Entprellen
|
||||
BL delay
|
||||
|
||||
#--- Überprüfen, ob Taster noch gedrückt ist (PB0)
|
||||
LDR r0, =GPIOB_IDR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x01
|
||||
TST r1, r2
|
||||
BNE _clear_exti0
|
||||
|
||||
#--- LED0 & LED3 toggeln (1001 = 0x09)
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x09
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_exti0:
|
||||
#--- Interrupt Flag löschen
|
||||
LDR r0, =EXTI_PR1
|
||||
MOVS r1, #0x01
|
||||
STR r1, [r0, #0]
|
||||
|
||||
POP {pc}
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_EXTI4, %function
|
||||
_ISR_EXTI4:
|
||||
PUSH {lr}
|
||||
|
||||
#--- Entprellen
|
||||
BL delay
|
||||
|
||||
#--- Überprüfen, ob Taster noch gedrückt ist (PB4)
|
||||
LDR r0, =GPIOB_IDR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x10
|
||||
TST r1, r2
|
||||
BNE _clear_exti4
|
||||
|
||||
#--- LED1 & LED2 toggeln (0110 = 0x06)
|
||||
LDR r0, =GPIOA_ODR
|
||||
LDR r1, [r0, #0]
|
||||
MOVS r2, #0x06
|
||||
EORS r1, r2
|
||||
STR r1, [r0, #0]
|
||||
|
||||
_clear_exti4:
|
||||
#--- Interrupt Flag löschen
|
||||
LDR r0, =EXTI_PR1
|
||||
MOVS r1, #0x10
|
||||
STR r1, [r0, #0]
|
||||
|
||||
POP {pc}
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2:
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
hu
|
||||
Whitespace-only changes.
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x05
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
# LDR r1, =GPIOB_MODER
|
||||
# MOVS r3, #0x03
|
||||
# LDR r0, [r1, #1]
|
||||
# BICS r0, r3
|
||||
# MOVS r3, #0x01
|
||||
# ORRS r0, r0, r3
|
||||
# STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x03
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOB_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x01
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+764
@@ -0,0 +1,764 @@
|
||||
#*****************************************************************************************
|
||||
# Project: task2 - switch triggered LEDs
|
||||
# File: G431_addr.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 20.08.2015
|
||||
#
|
||||
# Version: 3.0
|
||||
# History:
|
||||
# 20.08.2015 ML create file
|
||||
# 07.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML change from absolute addresses to BASE + OFFSET notation and
|
||||
# add more timer modules
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# Connects assembly addresses for STM32G431 MCU to symbolic register names
|
||||
# used in the datasheets.
|
||||
#
|
||||
# Notes:
|
||||
# - default MCU speed at startup is 16 MHz.
|
||||
#
|
||||
# ToDo:
|
||||
# - none -
|
||||
#*****************************************************************************************
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# MCU Bus Base Addresses
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ APB1_BASE, 0x40000000
|
||||
.equ APB2_BASE, 0x40010000
|
||||
.equ AHB1_BASE, 0x40020000
|
||||
.equ AHB2_BASE, 0x48000000
|
||||
.equ AHB3_BASE, 0xA0000000 //!!! FSMC + QSPI registers = AHB3 ?
|
||||
.equ PPB_BASE, 0xE0000000 /* Cortex M4 with FPU Internal Peripherals */
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# System Configuration Controller
|
||||
#
|
||||
# address space: 0x4001_0000 .. 0x4001_0029
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ SYSCFG_BASE, APB2_BASE
|
||||
|
||||
.equ SYSCFG_MEMRMP, SYSCFG_BASE + 0x00
|
||||
.equ SYSCFG_CFGR1, SYSCFG_BASE + 0x04
|
||||
.equ SYSCFG_EXTICR1, SYSCFG_BASE + 0x08
|
||||
.equ SYSCFG_EXTICR2, SYSCFG_BASE + 0x0C
|
||||
.equ SYSCFG_EXTICR3, SYSCFG_BASE + 0x10
|
||||
.equ SYSCFG_EXTICR4, SYSCFG_BASE + 0x14
|
||||
.equ SYSCFG_SCSR, SYSCFG_BASE + 0x18
|
||||
.equ SYSCFG_CFGR2, SYSCFG_BASE + 0x1C
|
||||
.equ SYSCFG_SWPR, SYSCFG_BASE + 0x20
|
||||
.equ SYSCFG_SKR, SYSCFG_BASE + 0x24
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# Extended Interrupts And Events Controller
|
||||
#
|
||||
# address space: 0x4001_0400 .. 0x4001_07FF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ EXTI_BASE, APB2_BASE + 0x400
|
||||
|
||||
.equ EXTI_IMR1, EXTI_BASE + 0x00
|
||||
.equ EXTI_EMR1, EXTI_BASE + 0x04
|
||||
.equ EXTI_RTSR1, EXTI_BASE + 0x08
|
||||
.equ EXTI_FTSR1, EXTI_BASE + 0x0C
|
||||
.equ EXTI_SWIER1, EXTI_BASE + 0x10
|
||||
.equ EXTI_PR1, EXTI_BASE + 0x14
|
||||
|
||||
.equ EXTI_IMR2, EXTI_BASE + 0x20
|
||||
.equ EXTI_EMR2, EXTI_BASE + 0x24
|
||||
.equ EXTI_RTSR2, EXTI_BASE + 0x28
|
||||
.equ EXTI_FTSR2, EXTI_BASE + 0x2C
|
||||
.equ EXTI_SWIER2, EXTI_BASE + 0x30
|
||||
.equ EXTI_PR2, EXTI_BASE + 0x34
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# TIM module common configuration
|
||||
#
|
||||
# Every timer has 1 KB address space:
|
||||
#
|
||||
# TIM2 .. TIM7: 0x4000_0000 .. 0x4000_17FF (APB1)
|
||||
# TIM1: 0x4001_2C00 .. 0x4001_2FFF (APB2)
|
||||
# TIM8: 0x4001_3400 .. 0x4001_37FF (APB2)
|
||||
# TIM15 .. TIM17: 0x4001_4000 .. 0x4001_4BFF (APB2)
|
||||
# TIM20: 0x4001_5000 .. 0x4001_53FF (APB2)
|
||||
#
|
||||
# note:
|
||||
# TIM2 + TIM5 are 32 bit timers. All others have a width of 16 bit.
|
||||
# Below, the timers on one line share a common register set description.
|
||||
#
|
||||
# TIM 1, 8, 20 advances control timers
|
||||
# TIM 2, 3, 4, 5 general purpose timers (TIM2/5 = 32 bit)
|
||||
# TIM 15 general purpose timers
|
||||
# TIM 16, 17 general purpose timers
|
||||
# TIM 6, 7 basic timers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ TIM_CR1_OFFSET, 0x00
|
||||
.equ TIM_CR2_OFFSET, 0x04
|
||||
.equ TIM_SMCR_OFFSET, 0x08
|
||||
.equ TIM_DIER_OFFSET, 0x0C
|
||||
.equ TIM_SR_OFFSET, 0x10
|
||||
.equ TIM_EGR_OFFSET, 0x14
|
||||
.equ TIM_CCMR1_OFFSET, 0x18
|
||||
.equ TIM_CCMR2_OFFSET, 0x1C
|
||||
.equ TIM_CCER_OFFSET, 0x20
|
||||
.equ TIM_CNT_OFFSET, 0x24
|
||||
.equ TIM_PSC_OFFSET, 0x28
|
||||
.equ TIM_ARR_OFFSET, 0x2C
|
||||
.equ TIM_RCR_OFFSET, 0x30
|
||||
.equ TIM_CCR1_OFFSET, 0x34
|
||||
.equ TIM_CCR2_OFFSET, 0x38
|
||||
.equ TIM_CCR3_OFFSET, 0x3C
|
||||
.equ TIM_CCR4_OFFSET, 0x40
|
||||
.equ TIM_BDTR_OFFSET, 0x44
|
||||
.equ TIM_CCR5_OFFSET, 0x48
|
||||
.equ TIM_CCR6_OFFSET, 0x4C
|
||||
.equ TIM_CCMR3_OFFSET, 0x50
|
||||
.equ TIM_DTR2_OFFSET, 0x54
|
||||
.equ TIM_ECR_OFFSET, 0x58
|
||||
.equ TIM_TISEL_OFFSET, 0x5C
|
||||
.equ TIM_AF1_OFFSET, 0x60
|
||||
.equ TIM_AF2_OFFSET, 0x64
|
||||
.equ TIM_OR1_OFFSET, 0x68
|
||||
|
||||
.equ TIM_DCR_OFFSET, 0x3DC
|
||||
.equ TIM_DMAR_OFFSET, 0x3E0
|
||||
|
||||
#- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #
|
||||
|
||||
#--- Genral Purpose Timer - TIM2 / address space: 0x4000_0000 .. 0x4000_03FF
|
||||
|
||||
.equ TIM2_BASE, APB1_BASE
|
||||
|
||||
.equ TIM2_CR1, TIM2_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM2_CR2, TIM2_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM2_SMCR, TIM2_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM2_DIER, TIM2_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM2_SR, TIM2_BASE + TIM_SR_OFFSET
|
||||
.equ TIM2_EGR, TIM2_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM2_CCMR1, TIM2_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM2_CCMR2, TIM2_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM2_CCER, TIM2_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM2_CNT, TIM2_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM2_PSC, TIM2_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM2_ARR, TIM2_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM2_CCR1, TIM2_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM2_CCR2, TIM2_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM2_CCR3, TIM2_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM2_CCR4, TIM2_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM2_ECR, TIM2_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM2_TISEL, TIM2_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM2_AF1, TIM2_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM2_AF2, TIM2_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM2_DCR, TIM2_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM2_DMAR, TIM2_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM3 / address space: 0x4000_0400 .. 0x4000_07FF
|
||||
|
||||
.equ TIM3_BASE, APB1_BASE + 0x400
|
||||
|
||||
.equ TIM3_CR1, TIM3_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM3_CR2, TIM3_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM3_SMCR, TIM3_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM3_DIER, TIM3_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM3_SR, TIM3_BASE + TIM_SR_OFFSET
|
||||
.equ TIM3_EGR, TIM3_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM3_CCMR1, TIM3_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM3_CCMR2, TIM3_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM3_CCER, TIM3_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM3_CNT, TIM3_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM3_PSC, TIM3_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM3_ARR, TIM3_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM3_CCR1, TIM3_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM3_CCR2, TIM3_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM3_CCR3, TIM3_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM3_CCR4, TIM3_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM3_ECR, TIM3_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM3_TISEL, TIM3_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM3_AF1, TIM3_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM3_AF2, TIM3_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM3_DCR, TIM3_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM3_DMAR, TIM3_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM4 / address space: 0x4000_0800 .. 0x4000_0BFF
|
||||
|
||||
.equ TIM4_BASE, APB1_BASE + 0x800
|
||||
|
||||
.equ TIM4_CR1, TIM4_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM4_CR2, TIM4_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM4_SMCR, TIM4_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM4_DIER, TIM4_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM4_SR, TIM4_BASE + TIM_SR_OFFSET
|
||||
.equ TIM4_EGR, TIM4_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM4_CCMR1, TIM4_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM4_CCMR2, TIM4_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM4_CCER, TIM4_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM4_CNT, TIM4_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM4_PSC, TIM4_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM4_ARR, TIM4_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM4_CCR1, TIM4_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM4_CCR2, TIM4_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM4_CCR3, TIM4_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM4_CCR4, TIM4_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM4_ECR, TIM4_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM4_TISEL, TIM4_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM4_AF1, TIM4_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM4_AF2, TIM4_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM4_DCR, TIM4_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM4_DMAR, TIM4_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM5 / address space: 0x4000_0C00 .. 0x4000_0FFF
|
||||
|
||||
.equ TIM5_BASE, APB1_BASE + 0xC00
|
||||
|
||||
.equ TIM5_CR1, TIM5_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM5_CR2, TIM5_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM5_SMCR, TIM5_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM5_DIER, TIM5_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM5_SR, TIM5_BASE + TIM_SR_OFFSET
|
||||
.equ TIM5_EGR, TIM5_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM5_CCMR1, TIM5_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM5_CCMR2, TIM5_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM5_CCER, TIM5_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM5_CNT, TIM5_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM5_PSC, TIM5_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM5_ARR, TIM5_BASE + TIM_ARR_OFFSET
|
||||
|
||||
.equ TIM5_CCR1, TIM5_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM5_CCR2, TIM5_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM5_CCR3, TIM5_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM5_CCR4, TIM5_BASE + TIM_CCR4_OFFSET
|
||||
|
||||
.equ TIM5_ECR, TIM5_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM5_TISEL, TIM5_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM5_AF1, TIM5_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM5_AF2, TIM5_BASE + TIM_ECR_OFFSET
|
||||
|
||||
.equ TIM5_DCR, TIM5_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM5_DMAR, TIM5_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Basic Timer - TIM6 / address space: 0x4000_1000 .. 0x4000_13FF
|
||||
|
||||
.equ TIM6_BASE, APB1_BASE + 0x1000
|
||||
|
||||
.equ TIM6_CR1, TIM6_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM6_CR2, TIM6_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM6_DIER, TIM6_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM6_SR, TIM6_BASE + TIM_SR_OFFSET
|
||||
.equ TIM6_EGR, TIM6_BASE + TIM_EGR_OFFSET
|
||||
|
||||
.equ TIM6_CNT, TIM6_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM6_PSC, TIM6_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM6_ARR, TIM6_BASE + TIM_ARR_OFFSET
|
||||
|
||||
#--- Basic Timer - TIM7 / address space: 0x4000_1400 .. 0x4000_17FF
|
||||
|
||||
.equ TIM7_BASE, APB1_BASE + 0x1400
|
||||
|
||||
.equ TIM7_CR1, TIM7_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM7_CR2, TIM7_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM7_DIER, TIM7_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM7_SR, TIM7_BASE + TIM_SR_OFFSET
|
||||
.equ TIM7_EGR, TIM7_BASE + TIM_EGR_OFFSET
|
||||
|
||||
.equ TIM7_CNT, TIM7_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM7_PSC, TIM7_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM7_ARR, TIM7_BASE + TIM_ARR_OFFSET
|
||||
|
||||
#--- Advanced Control Timer - TIM1 / address space: 0x4001_2C00 .. 0x4001_2FFF
|
||||
|
||||
.equ TIM1_BASE, APB2_BASE + 0x2C00
|
||||
|
||||
.equ TIM1_CR1, TIM1_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM1_CR2, TIM1_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM1_SMCR, TIM1_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM1_DIER, TIM1_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM1_SR, TIM1_BASE + TIM_SR_OFFSET
|
||||
.equ TIM1_EGR, TIM1_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM1_CCMR1, TIM1_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM1_CCMR2, TIM1_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM1_CCER, TIM1_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM1_CNT, TIM1_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM1_PSC, TIM1_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM1_ARR, TIM1_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM1_RCR, TIM1_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM1_CCR1, TIM1_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM1_CCR2, TIM1_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM1_CCR3, TIM1_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM1_CCR4, TIM1_BASE + TIM_CCR4_OFFSET
|
||||
.equ TIM1_BDTR, TIM1_BASE + TIM_BDTR_OFFSET
|
||||
.equ TIM1_CCR5, TIM1_BASE + TIM_CCR5_OFFSET
|
||||
.equ TIM1_CCR6, TIM1_BASE + TIM_CCR6_OFFSET
|
||||
.equ TIM1_CCMR3, TIM1_BASE + TIM_CCMR3_OFFSET
|
||||
.equ TIM1_DTR2, TIM1_BASE + TIM_DTR2_OFFSET
|
||||
.equ TIM1_ECR, TIM1_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM1_TISEL, TIM1_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM1_AF1, TIM1_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM1_AF2, TIM1_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM1_DCR, TIM1_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM1_DMAR, TIM1_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Advanced Control Timer - TIM8 / address space: 0x4001_3400 .. 0x4001_37FF
|
||||
|
||||
.equ TIM8_BASE, APB2_BASE + 0x3400
|
||||
|
||||
.equ TIM8_CR1, TIM8_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM8_CR2, TIM8_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM8_SMCR, TIM8_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM8_DIER, TIM8_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM8_SR, TIM8_BASE + TIM_SR_OFFSET
|
||||
.equ TIM8_EGR, TIM8_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM8_CCMR1, TIM8_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM8_CCMR2, TIM8_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM8_CCER, TIM8_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM8_CNT, TIM8_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM8_PSC, TIM8_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM8_ARR, TIM8_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM8_RCR, TIM8_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM8_CCR1, TIM8_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM8_CCR2, TIM8_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM8_CCR3, TIM8_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM8_CCR4, TIM8_BASE + TIM_CCR4_OFFSET
|
||||
.equ TIM8_BDTR, TIM8_BASE + TIM_BDTR_OFFSET
|
||||
.equ TIM8_CCR5, TIM8_BASE + TIM_CCR5_OFFSET
|
||||
.equ TIM8_CCR6, TIM8_BASE + TIM_CCR6_OFFSET
|
||||
.equ TIM8_CCMR3, TIM8_BASE + TIM_CCMR3_OFFSET
|
||||
.equ TIM8_DTR2, TIM8_BASE + TIM_DTR2_OFFSET
|
||||
.equ TIM8_ECR, TIM8_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM8_TISEL, TIM8_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM8_AF1, TIM8_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM8_AF2, TIM8_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM8_DCR, TIM8_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM8_DMAR, TIM8_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Advanced Control Timer - TIM20 / address space: 0x4001_5000 .. 0x4001_53FF
|
||||
|
||||
.equ TIM20_BASE, APB2_BASE + 0x5000
|
||||
|
||||
.equ TIM20_CR1, TIM20_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM20_CR2, TIM20_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM20_SMCR, TIM20_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM20_DIER, TIM20_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM20_SR, TIM20_BASE + TIM_SR_OFFSET
|
||||
.equ TIM20_EGR, TIM20_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM20_CCMR1, TIM20_BASE + TIM_CCMR1_OFFSET
|
||||
.equ TIM20_CCMR2, TIM20_BASE + TIM_CCMR2_OFFSET
|
||||
.equ TIM20_CCER, TIM20_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM20_CNT, TIM20_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM20_PSC, TIM20_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM20_ARR, TIM20_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM20_RCR, TIM20_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM20_CCR1, TIM20_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM20_CCR2, TIM20_BASE + TIM_CCR2_OFFSET
|
||||
.equ TIM20_CCR3, TIM20_BASE + TIM_CCR3_OFFSET
|
||||
.equ TIM20_CCR4, TIM20_BASE + TIM_CCR4_OFFSET
|
||||
.equ TIM20_BDTR, TIM20_BASE + TIM_BDTR_OFFSET
|
||||
.equ TIM20_CCR5, TIM20_BASE + TIM_CCR5_OFFSET
|
||||
.equ TIM20_CCR6, TIM20_BASE + TIM_CCR6_OFFSET
|
||||
.equ TIM20_CCMR3, TIM20_BASE + TIM_CCMR3_OFFSET
|
||||
.equ TIM20_DTR2, TIM20_BASE + TIM_DTR2_OFFSET
|
||||
.equ TIM20_ECR, TIM20_BASE + TIM_ECR_OFFSET
|
||||
.equ TIM20_TISEL, TIM20_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM20_AF1, TIM20_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM20_AF2, TIM20_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM20_DCR, TIM20_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM20_DMAR, TIM20_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM15 / address space: 0x4001_4000 .. 0x4001_43FF
|
||||
|
||||
.equ TIM15_BASE, APB2_BASE + 0x4000
|
||||
|
||||
.equ TIM15_CR1, TIM15_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM15_CR2, TIM15_BASE + TIM_CR2_OFFSET
|
||||
.equ TIM15_SMCR, TIM15_BASE + TIM_SMCR_OFFSET
|
||||
.equ TIM15_DIER, TIM15_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM15_SR, TIM15_BASE + TIM_SR_OFFSET
|
||||
.equ TIM15_EGR, TIM15_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM15_CCMR1, TIM15_BASE + TIM_CCMR1_OFFSET
|
||||
|
||||
.equ TIM15_CCER, TIM15_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM15_CNT, TIM15_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM15_PSC, TIM15_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM15_ARR, TIM15_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM15_RCR, TIM15_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM15_CCR1, TIM15_BASE + TIM_CCR1_OFFSET
|
||||
.equ TIM15_CCR2, TIM15_BASE + TIM_CCR2_OFFSET
|
||||
|
||||
.equ TIM15_BDTR, TIM15_BASE + TIM_BDTR_OFFSET
|
||||
|
||||
.equ TIM15_DTR2, TIM15_BASE + TIM_DTR2_OFFSET
|
||||
|
||||
.equ TIM15_TISEL, TIM15_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM15_AF1, TIM15_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM15_AF2, TIM15_BASE + TIM_AF2_OFFSET
|
||||
|
||||
.equ TIM15_DCR, TIM15_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM15_DMAR, TIM15_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM16 / address space: 0x4001_4400 .. 0x4001_47FF
|
||||
|
||||
.equ TIM16_BASE, APB2_BASE + 0x4400
|
||||
|
||||
.equ TIM16_CR1, TIM16_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM16_CR2, TIM16_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM16_DIER, TIM16_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM16_SR, TIM16_BASE + TIM_SR_OFFSET
|
||||
.equ TIM16_EGR, TIM16_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM16_CCMR1, TIM16_BASE + TIM_CCMR1_OFFSET
|
||||
|
||||
.equ TIM16_CCER, TIM16_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM16_CNT, TIM16_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM16_PSC, TIM16_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM16_ARR, TIM16_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM16_RCR, TIM16_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM16_CCR1, TIM16_BASE + TIM_CCR1_OFFSET
|
||||
|
||||
.equ TIM16_BDTR, TIM16_BASE + TIM_BDTR_OFFSET
|
||||
|
||||
.equ TIM16_DTR2, TIM16_BASE + TIM_DTR2_OFFSET
|
||||
|
||||
.equ TIM16_TISEL, TIM16_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM16_AF1, TIM16_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM16_AF2, TIM16_BASE + TIM_AF2_OFFSET
|
||||
.equ TIM16_OR1, TIM16_BASE + TIM_OR1_OFFSET
|
||||
|
||||
.equ TIM16_DCR, TIM16_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM16_DMAR, TIM16_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#--- Genral Purpose Timer - TIM17 / address space: 0x4001_4800 .. 0x4001_4BFF
|
||||
|
||||
.equ TIM17_BASE, APB2_BASE + 0x4800
|
||||
|
||||
.equ TIM17_CR1, TIM17_BASE + TIM_CR1_OFFSET
|
||||
.equ TIM17_CR2, TIM17_BASE + TIM_CR2_OFFSET
|
||||
|
||||
.equ TIM17_DIER, TIM17_BASE + TIM_DIER_OFFSET
|
||||
.equ TIM17_SR, TIM17_BASE + TIM_SR_OFFSET
|
||||
.equ TIM17_EGR, TIM17_BASE + TIM_EGR_OFFSET
|
||||
.equ TIM17_CCMR1, TIM17_BASE + TIM_CCMR1_OFFSET
|
||||
|
||||
.equ TIM17_CCER, TIM17_BASE + TIM_CCER_OFFSET
|
||||
.equ TIM17_CNT, TIM17_BASE + TIM_CNT_OFFSET
|
||||
.equ TIM17_PSC, TIM17_BASE + TIM_PSC_OFFSET
|
||||
.equ TIM17_ARR, TIM17_BASE + TIM_ARR_OFFSET
|
||||
.equ TIM17_RCR, TIM17_BASE + TIM_RCR_OFFSET
|
||||
.equ TIM17_CCR1, TIM17_BASE + TIM_CCR1_OFFSET
|
||||
|
||||
.equ TIM17_BDTR, TIM17_BASE + TIM_BDTR_OFFSET
|
||||
|
||||
.equ TIM17_DTR2, TIM17_BASE + TIM_DTR2_OFFSET
|
||||
|
||||
.equ TIM17_TISEL, TIM17_BASE + TIM_TISEL_OFFSET
|
||||
.equ TIM17_AF1, TIM17_BASE + TIM_AF1_OFFSET
|
||||
.equ TIM17_AF2, TIM17_BASE + TIM_AF2_OFFSET
|
||||
.equ TIM17_OR1, TIM17_BASE + TIM_OR1_OFFSET
|
||||
|
||||
.equ TIM17_DCR, TIM17_BASE + TIM_DCR_OFFSET
|
||||
.equ TIM17_DMAR, TIM17_BASE + TIM_DMAR_OFFSET
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# Reset and Clock Control
|
||||
#
|
||||
# address space: 0x4002_1000 .. 0x4002_13FF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ RCC_BASE, AHB1_BASE + 0x1000
|
||||
|
||||
.equ RCC_CR, RCC_BASE + 0x00
|
||||
.equ RCC_ICSCR, RCC_BASE + 0x04
|
||||
.equ RCC_CFGR, RCC_BASE + 0x08
|
||||
.equ RCC_PLLCFGR, RCC_BASE + 0x0C
|
||||
|
||||
.equ RCC_CIER, RCC_BASE + 0x18
|
||||
.equ RCC_CIFR, RCC_BASE + 0x1C
|
||||
.equ RCC_CICR, RCC_BASE + 0x20
|
||||
|
||||
.equ RCC_AHB1RSTR, RCC_BASE + 0x28
|
||||
.equ RCC_AHB2RSTR, RCC_BASE + 0x2C
|
||||
.equ RCC_AHB3RSTR, RCC_BASE + 0x30
|
||||
|
||||
.equ RCC_APB1RSTR1, RCC_BASE + 0x38
|
||||
.equ RCC_APB1RSTR2, RCC_BASE + 0x3C
|
||||
.equ RCC_APB2RSTR, RCC_BASE + 0x40
|
||||
|
||||
.equ RCC_AHB1ENR, RCC_BASE + 0x48
|
||||
.equ RCC_AHB2ENR, RCC_BASE + 0x4C
|
||||
.equ RCC_AHB3ENR, RCC_BASE + 0x50
|
||||
|
||||
.equ RCC_APB1ENR1, RCC_BASE + 0x58
|
||||
.equ RCC_APB1ENR2, RCC_BASE + 0x5C
|
||||
.equ RCC_APB2ENR, RCC_BASE + 0x60
|
||||
|
||||
.equ RCC_AHB1SMENR, RCC_BASE + 0x68
|
||||
.equ RCC_AHB2SMENR, RCC_BASE + 0x6C
|
||||
.equ RCC_AHB3SMENR, RCC_BASE + 0x70
|
||||
|
||||
.equ RCC_APB1SMENR1, RCC_BASE + 0x78
|
||||
.equ RCC_APB1SMENR2, RCC_BASE + 0x7C
|
||||
.equ RCC_APB2SMENR, RCC_BASE + 0x80
|
||||
|
||||
.equ RCC_CCIPR, RCC_BASE + 0x88
|
||||
|
||||
.equ RCC_BDCR, RCC_BASE + 0x90
|
||||
.equ RCC_CSR, RCC_BASE + 0x94
|
||||
.equ RCC_CRRCR, RCC_BASE + 0x98
|
||||
.equ RCC_CCIPR2, RCC_BASE + 0x9C
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# GPIO module common configuration
|
||||
#
|
||||
# address space: 0x4800_0000 .. 0x4800_1FFF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ GPIO_BASE, AHB2_BASE
|
||||
|
||||
.equ GPIO_MODER_OFFSET, 0x00
|
||||
.equ GPIO_OTYPER_OFFSET, 0x04
|
||||
.equ GPIO_OSPEEDR_OFFSET, 0x08
|
||||
.equ GPIO_PUPDR_OFFSET, 0x0C
|
||||
.equ GPIO_IDR_OFFSET, 0x10
|
||||
.equ GPIO_ODR_OFFSET, 0x14
|
||||
.equ GPIO_BSRR_OFFSET, 0x18
|
||||
.equ GPIO_LCKR_OFFSET, 0x1C
|
||||
.equ GPIO_AFRL_OFFSET, 0x20
|
||||
.equ GPIO_AFRH_OFFSET, 0x24
|
||||
.equ GPIO_BRR_OFFSET, 0x28
|
||||
|
||||
#- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #
|
||||
|
||||
#--- Port A GPIO configuration / address space: 0x4800_0000 .. 0x4800_03FF
|
||||
|
||||
.equ GPIOA_BASE, GPIO_BASE
|
||||
|
||||
.equ GPIOA_MODER, GPIOA_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOA_OTYPER, GPIOA_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOA_OSPEEDR, GPIOA_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOA_PUPDR, GPIOA_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOA_IDR, GPIOA_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOA_ODR, GPIOA_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOA_BSRR, GPIOA_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOA_LCKR, GPIOA_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOA_AFRL, GPIOA_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOA_AFRH, GPIOA_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOA_BRR, GPIOA_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port B GPIO configuration / address space: 0x4800_0400 .. 0x4800_07FF
|
||||
|
||||
.equ GPIOB_BASE, GPIO_BASE + 0x400
|
||||
|
||||
.equ GPIOB_MODER, GPIOB_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOB_OTYPER, GPIOB_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOB_OSPEEDR, GPIOB_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOB_PUPDR, GPIOB_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOB_IDR, GPIOB_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOB_ODR, GPIOB_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOB_BSRR, GPIOB_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOB_LCKR, GPIOB_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOB_AFRL, GPIOB_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOB_AFRH, GPIOB_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOB_BRR, GPIOB_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port C GPIO configuration / address space: 0x4800_0800 .. 0x4800_0BFF
|
||||
|
||||
.equ GPIOC_BASE, GPIO_BASE + 0x800
|
||||
|
||||
.equ GPIOC_MODER, GPIOC_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOC_OTYPER, GPIOC_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOC_OSPEEDR, GPIOC_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOC_PUPDR, GPIOC_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOC_IDR, GPIOC_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOC_ODR, GPIOC_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOC_BSRR, GPIOC_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOC_LCKR, GPIOC_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOC_AFRL, GPIOC_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOC_AFRH, GPIOC_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOC_BRR, GPIOC_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port D GPIO configuration / address space: 0x4800_0C00 .. 0x4800_0FFF
|
||||
|
||||
.equ GPIOD_BASE, GPIO_BASE + 0xC00
|
||||
|
||||
.equ GPIOD_MODER, GPIOD_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOD_OTYPER, GPIOD_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOD_OSPEEDR, GPIOD_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOD_PUPDR, GPIOD_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOD_IDR, GPIOD_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOD_ODR, GPIOD_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOD_BSRR, GPIOD_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOD_LCKR, GPIOD_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOD_AFRL, GPIOD_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOD_AFRH, GPIOD_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOD_BRR, GPIOD_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port E GPIO configuration / address space: 0x4800_1000 .. 0x4800_13FF
|
||||
|
||||
.equ GPIOE_BASE, GPIO_BASE + 0x1000
|
||||
|
||||
.equ GPIOE_MODER, GPIOE_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOE_OTYPER, GPIOE_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOE_OSPEEDR, GPIOE_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOE_PUPDR, GPIOE_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOE_IDR, GPIOE_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOE_ODR, GPIOE_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOE_BSRR, GPIOE_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOE_LCKR, GPIOE_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOE_AFRL, GPIOE_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOE_AFRH, GPIOE_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOE_BRR, GPIOE_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port F GPIO configuration / address space: 0x4800_1400 .. 0x4800_17FF
|
||||
|
||||
.equ GPIOF_BASE, GPIO_BASE + 0x1400
|
||||
|
||||
.equ GPIOF_MODER, GPIOF_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOF_OTYPER, GPIOF_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOF_OSPEEDR, GPIOF_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOF_PUPDR, GPIOF_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOF_IDR, GPIOF_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOF_ODR, GPIOF_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOF_BSRR, GPIOF_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOF_LCKR, GPIOF_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOF_AFRL, GPIOF_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOF_AFRH, GPIOF_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOF_BRR, GPIOF_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#--- Port G GPIO configuration / address space: 0x4800_1800 .. 0x4800_1BFF
|
||||
|
||||
.equ GPIOG_BASE, GPIO_BASE + 0x1800
|
||||
|
||||
.equ GPIOG_MODER, GPIOG_BASE + GPIO_MODER_OFFSET
|
||||
.equ GPIOG_OTYPER, GPIOG_BASE + GPIO_OTYPER_OFFSET
|
||||
.equ GPIOG_OSPEEDR, GPIOG_BASE + GPIO_OSPEEDR_OFFSET
|
||||
.equ GPIOG_PUPDR, GPIOG_BASE + GPIO_PUPDR_OFFSET
|
||||
.equ GPIOG_IDR, GPIOG_BASE + GPIO_IDR_OFFSET
|
||||
.equ GPIOG_ODR, GPIOG_BASE + GPIO_ODR_OFFSET
|
||||
.equ GPIOG_BSRR, GPIOG_BASE + GPIO_BSRR_OFFSET
|
||||
.equ GPIOG_LCKR, GPIOG_BASE + GPIO_LCKR_OFFSET
|
||||
.equ GPIOG_AFRL, GPIOG_BASE + GPIO_AFRL_OFFSET
|
||||
.equ GPIOG_AFRH, GPIOG_BASE + GPIO_AFRH_OFFSET
|
||||
.equ GPIOG_BRR, GPIOG_BASE + GPIO_BRR_OFFSET
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# System Control Space
|
||||
#
|
||||
# address space: 0xE000_E000 .. 0xE000_EFFF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ SCS_BASE, PPB_BASE + 0xE000
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# System Timer (SysTick)
|
||||
#
|
||||
# address space: 0xE000_E010 .. 0xE000_E01F
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ STK_BASE, SCS_BASE + 10 // 0xE000_E010
|
||||
|
||||
.equ STK_CTRL, SCS_BASE + 0x00
|
||||
.equ STK_LOAD, SCS_BASE + 0x04
|
||||
.equ STK_VAL, SCS_BASE + 0x08
|
||||
.equ STK_CALIB, SCS_BASE + 0x0C
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# Nested Vector Interrupt Controller
|
||||
#
|
||||
# address space: 0xE000_E100 .. 0xE000_E4EF
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ NVIC_BASE, SCS_BASE + 0x100 // 0xE000_E100
|
||||
|
||||
.equ NVIC_ISER0, NVIC_BASE + 0x00
|
||||
.equ NVIC_ISER1, NVIC_BASE + 0x04
|
||||
.equ NVIC_ISER2, NVIC_BASE + 0x08
|
||||
.equ NVIC_ISER3, NVIC_BASE + 0x0C
|
||||
|
||||
.equ NVIC_ICER0, NVIC_BASE + 0x80
|
||||
.equ NVIC_ICER1, NVIC_BASE + 0x84
|
||||
.equ NVIC_ICER2, NVIC_BASE + 0x88
|
||||
.equ NVIC_ICER3, NVIC_BASE + 0x8C
|
||||
|
||||
.equ NVIC_ISPR0, NVIC_BASE + 0x100
|
||||
.equ NVIC_ISPR1, NVIC_BASE + 0x104
|
||||
.equ NVIC_ISPR2, NVIC_BASE + 0x108
|
||||
.equ NVIC_ISPR3, NVIC_BASE + 0x10C
|
||||
|
||||
.equ NVIC_ICPR0, NVIC_BASE + 0x180
|
||||
.equ NVIC_ICPR1, NVIC_BASE + 0x184
|
||||
.equ NVIC_ICPR2, NVIC_BASE + 0x188
|
||||
.equ NVIC_ICPR3, NVIC_BASE + 0x18C
|
||||
|
||||
.equ NVIC_IABR0, NVIC_BASE + 0x200
|
||||
.equ NVIC_IABR1, NVIC_BASE + 0x204
|
||||
.equ NVIC_IABR2, NVIC_BASE + 0x208
|
||||
.equ NVIC_IABR3, NVIC_BASE + 0x20C
|
||||
|
||||
.equ NVIC_IPR0, NVIC_BASE + 0x300
|
||||
.equ NVIC_IPR1, NVIC_BASE + 0x304
|
||||
.equ NVIC_IPR2, NVIC_BASE + 0x308
|
||||
.equ NVIC_IPR3, NVIC_BASE + 0x30C
|
||||
.equ NVIC_IPR4, NVIC_BASE + 0x310
|
||||
.equ NVIC_IPR5, NVIC_BASE + 0x314
|
||||
.equ NVIC_IPR6, NVIC_BASE + 0x318
|
||||
.equ NVIC_IPR7, NVIC_BASE + 0x31C
|
||||
.equ NVIC_IPR8, NVIC_BASE + 0x320
|
||||
.equ NVIC_IPR9, NVIC_BASE + 0x324
|
||||
.equ NVIC_IPR10, NVIC_BASE + 0x328
|
||||
.equ NVIC_IPR11, NVIC_BASE + 0x32C
|
||||
.equ NVIC_IPR12, NVIC_BASE + 0x330
|
||||
.equ NVIC_IPR13, NVIC_BASE + 0x334
|
||||
.equ NVIC_IPR14, NVIC_BASE + 0x338
|
||||
.equ NVIC_IPR15, NVIC_BASE + 0x33C
|
||||
.equ NVIC_IPR16, NVIC_BASE + 0x340
|
||||
.equ NVIC_IPR17, NVIC_BASE + 0x344
|
||||
.equ NVIC_IPR18, NVIC_BASE + 0x348
|
||||
.equ NVIC_IPR19, NVIC_BASE + 0x34C
|
||||
.equ NVIC_IPR20, NVIC_BASE + 0x350
|
||||
.equ NVIC_IPR21, NVIC_BASE + 0x354
|
||||
.equ NVIC_IPR22, NVIC_BASE + 0x358
|
||||
.equ NVIC_IPR23, NVIC_BASE + 0x35C
|
||||
.equ NVIC_IPR24, NVIC_BASE + 0x360
|
||||
.equ NVIC_IPR25, NVIC_BASE + 0x364
|
||||
|
||||
.equ STIR, NVIC_BASE + 0xE00
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
# MCU Debug Component
|
||||
#
|
||||
# address space: 0xE004_2000 .. 0xE004_2013
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.equ DBGMCU_BASE, PPB_BASE + 0x42000
|
||||
|
||||
.equ DBGMCU_IDCODE, DBGMCU_BASE + 0x00
|
||||
.equ DBGMCU_CR, DBGMCU_BASE + 0x04
|
||||
.equ DBGMCU_APB1FZR1, DBGMCU_BASE + 0x08
|
||||
.equ DBGMCU_APB1FZR2, DBGMCU_BASE + 0x0C
|
||||
.equ DBGMCU_APB2DZR, DBGMCU_BASE + 0x10
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x02
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+314
@@ -0,0 +1,314 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
# LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
# MOVS r2, #0x03 // prepare mask
|
||||
# LDR r0, [r1, #0] // get current value of port A mode register
|
||||
# BICS r0, r2 // delete bits
|
||||
# MOVS r2, #0x01 // load configuration mask
|
||||
# ORRS r0, r0, r2 // apply mask
|
||||
# STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOB_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #2]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #2]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x03
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+36
@@ -0,0 +1,36 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter nicht gedrückt*/){}
|
||||
delay(10);
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay(150);
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1 && aktiv = 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0){/*alles bis auf LED0 auschalten*/}
|
||||
if(i = 1){/*..*/}
|
||||
//...
|
||||
for(int zähler = 0; zähler < 333 && aktiv == 1; zähler++){
|
||||
if(/*schalter gerückt*/){
|
||||
aktiv = 0;
|
||||
break;
|
||||
}
|
||||
else{
|
||||
delay(1);
|
||||
}
|
||||
}
|
||||
while(/*Taster gedrückt*/){}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
|
||||
|
||||
+324
@@ -0,0 +1,324 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
LDR r1, =GPIO_IDR
|
||||
MOVS
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
EORS r0, r0, r3
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+323
@@ -0,0 +1,323 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x01
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
EORS r0, r0, r3
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
# LDR r1, =GPIOA_MODER
|
||||
# MOVS r3, #0x05
|
||||
# LDR r0, [r1, #1]
|
||||
# BICS r0, r3
|
||||
# MOVS r3, #0x01
|
||||
# ORRS r0, r0, r3
|
||||
# STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
Whitespace-only changes.
+24
@@ -0,0 +1,24 @@
|
||||
/*
|
||||
* sketch.c
|
||||
*
|
||||
* Created on: Mar 18, 2026
|
||||
* Author: tobii
|
||||
*/
|
||||
int reihenfolge[6] = {0, 1, 2, 3, 2, 1};
|
||||
|
||||
int main(){
|
||||
while(1){
|
||||
while(/*schalter gedrückt*/){}
|
||||
delay();
|
||||
while(/*schalter losgelassen*/){}
|
||||
delay();
|
||||
|
||||
int aktiv = 1;
|
||||
while(aktiv){
|
||||
for(int i; i < reihenfolge.length - 1; i ++){
|
||||
//alle LED einschalten
|
||||
if(i = 0)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
+315
@@ -0,0 +1,315 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
LDR r1, =GPIO_IDR
|
||||
MOVS
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r2
|
||||
STR r0, [r1, #0]
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
+325
@@ -0,0 +1,325 @@
|
||||
#****************************************************************************************#
|
||||
# Project: task2 - ASM: Interrupts
|
||||
# File: task2.s
|
||||
#
|
||||
# Language: ASM
|
||||
#
|
||||
# Hardware: STefi Light v1.1
|
||||
# Processor: STM32G431KBT6U
|
||||
#
|
||||
# Author: Manuel Lederhofer
|
||||
# Datum: 31.10.2014
|
||||
#
|
||||
# Version: 6.0
|
||||
# History:
|
||||
# 31.10.2014 ML create file
|
||||
# 27.09.2018 ML edit comments, extend vector table
|
||||
# 18.12.2018 ML port from MKL05Z32VLC4 to STM32L476RG
|
||||
# 27.02.2019 ML move section of exception handlers to bottom of file
|
||||
# 25.09.2019 ML minor changes for a better code and comment understanding
|
||||
# 04.09.2020 HL port from STM32L476RG to STM32F411xE
|
||||
# 21.09.2020 ML tidy up, comments and formatting
|
||||
# 29.09.2021 ML port from STM32F411xE to STM32F042K6T6
|
||||
# 09.03.2022 ML port from STM32F042K6T6 to STM32G431KBT6U
|
||||
# 10.02.2025 TK remove ASM:Polling,move ASM:Interrupts to task2
|
||||
# 24.06.2025 TK remove /* ... place your code here ... */
|
||||
#
|
||||
# Status: working
|
||||
#
|
||||
# Description:
|
||||
# See the description and requirements of the requested application
|
||||
# in the lab exercise guide.
|
||||
#
|
||||
# Notes:
|
||||
# - MCU speed at startup is 16 MHz
|
||||
#
|
||||
# ToDo:
|
||||
# - Change the example code to match the description and requirements
|
||||
# of the requested application in the lab exercise guide.
|
||||
#****************************************************************************************#
|
||||
|
||||
.include "G431_addr.s"
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .vectortable,"a" // vector table at begin of ROM
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
|
||||
.word 0x20004000 // initial Stack Pointer: 0x20000000 (RAM base) + 0x4000 (16K SRAM1 length)
|
||||
.word 0x08000401 // initial Program Counter
|
||||
.word _ISR_NMI // non-masking interrupt
|
||||
.word _ISR_HARDF // hard fault interrupt
|
||||
|
||||
|
||||
|
||||
/* N.B.
|
||||
Look at the .space or the .org assembler directive to insert the address of the
|
||||
ISRs at the right place in the vector table. Verify your settings by the help of
|
||||
the list file. */
|
||||
|
||||
.word _ISR_S0
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.text // section .text (default section for program code)
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global init
|
||||
.type init, %function
|
||||
init:
|
||||
CPSID i // disable interrupts globally
|
||||
|
||||
MOVS r0, #0 // safely initialize the GPRs
|
||||
MOVS r1, #0
|
||||
MOVS r2, #0
|
||||
MOVS r3, #0
|
||||
MOVS r4, #0
|
||||
MOVS r5, #0
|
||||
MOVS r6, #0
|
||||
MOVS r7, #0
|
||||
MOV r8, r0
|
||||
MOV r9, r0
|
||||
MOV r10, r0
|
||||
MOV r11, r0
|
||||
MOV r12, r0
|
||||
|
||||
#--- enable port clocking
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask for adjusting port clock gating (A: LEDs)
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for ports
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- port init
|
||||
#- LEDs
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0x03 // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r2 // delete bits
|
||||
MOVS r2, #0x01 // load configuration mask
|
||||
ORRS r0, r0, r2 // apply mask
|
||||
STR r0, [r1, #0] // apply result to port A mode register
|
||||
|
||||
LDR r1, =GPIOA_MODER
|
||||
MOVS r3, #0x05
|
||||
LDR r0, [r1, #1]
|
||||
BICS r0, r3
|
||||
MOVS r3, #0x02
|
||||
ORRS r0, r0, r3
|
||||
STR r0, [r1, #1]
|
||||
|
||||
#- switch LED off
|
||||
LDR r1, =GPIOA_ODR // load port A output data register
|
||||
MOVS r2, #0x01 // load mask for LED
|
||||
LDR r0, [r1, #0] // get current value of GPIOA
|
||||
ORRS r0, r0, r2 // configure pin state
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#- buttons
|
||||
|
||||
/* ... place your code here ... */
|
||||
|
||||
|
||||
#--- button interrupt config
|
||||
|
||||
#- enable clock for SYSCFG module
|
||||
|
||||
|
||||
#- connect GPIO pins of the buttons to EXTended Interrupt controller lines (EXTI)
|
||||
# in SYSCFG module (SYSCFG_* registers)
|
||||
|
||||
|
||||
|
||||
|
||||
#- configure lines in EXTI module (EXTI_* registers)
|
||||
|
||||
|
||||
|
||||
#- NVIC: set interrupt priority, clear pending bits
|
||||
# and enable interrupts for buttons (see: PM, ch. 4.3, NVIC)
|
||||
|
||||
|
||||
|
||||
CPSIE i // enable interrupts globally
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global main
|
||||
.type main, %function
|
||||
main:
|
||||
LDR r1, =GPIOA_ODR
|
||||
EORS r0, r0, r3
|
||||
|
||||
STR r0, [r1, #0]
|
||||
|
||||
|
||||
|
||||
BL delay
|
||||
|
||||
|
||||
B main
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.thumb_func
|
||||
.global delay
|
||||
.type delay, %function
|
||||
delay:
|
||||
MOVS r6, #0 // ...
|
||||
LDR r7, =2000000 // ...
|
||||
.L1:
|
||||
ADDS r6, r6, #1 // ...
|
||||
CMP r6, r7 // ...
|
||||
BNE .L1 // ...
|
||||
BX lr // ...
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.global stop
|
||||
stop:
|
||||
NOP // do nothing (NOP is here to avoid a debugger crash, only)
|
||||
B stop // if this line is reached, something went wrong
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp1: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.section .exhand,"ax" // section for exception handlers
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_NMI, %function
|
||||
_ISR_NMI:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x44 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x0A // load mask for blue and yellow LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_NMI
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_HARDF, %function
|
||||
_ISR_HARDF:
|
||||
#--- enable clock
|
||||
LDR r1, =RCC_AHB2ENR // load address of RCC_AHB2ENR
|
||||
MOV r2, #0x01 // load mask
|
||||
LDR r0, [r1, #0] // get current value of RCC_AHB2ENR
|
||||
ORRS r0, r0, r2 // configure clock gating for port
|
||||
STR r0, [r1, #0] // apply settings
|
||||
|
||||
#--- init pins
|
||||
LDR r1, =GPIOA_MODER // load port A mode register address
|
||||
MOVS r2, #0xFF // prepare mask
|
||||
LDR r0, [r1, #0] // get current value of port A mode register
|
||||
BICS r0, r0, r2 // delete bits
|
||||
MOVS r2, #0x11 // load configuration mask
|
||||
ORRS r0, r0, r2 // configure pins
|
||||
STR r0, [r1, #0] // apply settings to port A mode register
|
||||
|
||||
#--- switch some LEDs on
|
||||
LDR r1, =GPIOA_ODR // load port A data output register address
|
||||
MOVS r2, #0x05 // load mask for red and green LED
|
||||
LDR r0, [r1, #0]
|
||||
BICS r0, r0, r2
|
||||
STR r0, [r1, #0] // switch LEDs on
|
||||
|
||||
B _ISR_HARDF
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S0, %function
|
||||
_ISR_S0:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.align 2
|
||||
.syntax unified
|
||||
.thumb
|
||||
.type _ISR_S1, %function
|
||||
_ISR_S1:
|
||||
PUSH {lr} // save special content
|
||||
|
||||
#--- do the work
|
||||
|
||||
|
||||
|
||||
|
||||
#--- clear interrupt flag
|
||||
|
||||
|
||||
|
||||
#--- leave ISR
|
||||
POP {r1} // get special content back
|
||||
BX r1 // go back to where we came from
|
||||
|
||||
|
||||
#----------------------------------------------------------------------------------------#
|
||||
.lp2: // this label is only to nicify the line up in the .lst file
|
||||
.ltorg
|
||||
#----------------------------------------------------------------------------------------#
|
||||
|
||||
.end
|
||||
|
||||
#************************************** E O F *******************************************#
|
||||
BIN
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+1
-1
@@ -1,3 +1,3 @@
|
||||
BreakpointActionManager.actionData=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<breakpointActionData>\n <actionEntry class\="org.eclipse.cdt.debug.ui.breakpointactions.ResumeAction" name\="Untitled Resume Action" value\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#10;<resumeData pauseTime\="0"/>&\#10;"/>\n <actionEntry class\="org.eclipse.cdt.debug.ui.breakpointactions.LogAction" name\="my log" value\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#10;<logData evalExpr\="false" message\="delay called"/>&\#10;"/>\n</breakpointActionData>\n
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||||
eclipse.preferences.version=1
|
||||
org.eclipse.cdt.debug.core.cDebug.default_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\r\n<sourceLookupDirector>\r\n <sourceContainers duplicates\="false">\r\n <container memento\="AbsolutePath" typeId\="org.eclipse.cdt.debug.core.containerType.absolutePath"/>\r\n <container memento\="programRelativePath" typeId\="org.eclipse.cdt.debug.core.containerType.programRelativePath"/>\r\n <container memento\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#13;&\#10;<project referencedProjects\="true"/>&\#13;&\#10;" typeId\="org.eclipse.cdt.debug.core.containerType.project"/>\r\n </sourceContainers>\r\n</sourceLookupDirector>\r\n
|
||||
org.eclipse.cdt.debug.core.cDebug.default_source_containers=<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>\n<sourceLookupDirector>\n <sourceContainers duplicates\="false">\n <container memento\="AbsolutePath" typeId\="org.eclipse.cdt.debug.core.containerType.absolutePath"/>\n <container memento\="programRelativePath" typeId\="org.eclipse.cdt.debug.core.containerType.programRelativePath"/>\n <container memento\="<?xml version\="1.0" encoding\="UTF-8" standalone\="no"?>&\#10;<project referencedProjects\="true"/>&\#10;" typeId\="org.eclipse.cdt.debug.core.containerType.project"/>\n </sourceContainers>\n</sourceLookupDirector>\n
|
||||
+6
-6
@@ -1,17 +1,17 @@
|
||||
eclipse.preferences.version=1
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
+1
-1
@@ -1,7 +1,7 @@
|
||||
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/arch=x86_64
|
||||
LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/name=Local
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LaunchTargetManager/org.eclipse.launchbar.core.launchTargetType.local,Local/os=win32
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configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3 Debug,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task4,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1
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||||
configDescList=org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3 Debug,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task3,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task4,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1,org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task2
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||||
eclipse.preferences.version=1
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||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:A3_Timer/activeLaunchMode=run
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||||
org.eclipse.cdt.dsf.gdb.gdbRemotedescriptorType\:task1/activeLaunchMode=run
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||||
|
||||
@@ -1,6 +1,6 @@
|
||||
IMPORT_FILES_AND_FOLDERS_RELATIVE=true
|
||||
IMPORT_FILES_AND_FOLDERS_TYPE=23,1
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||||
eclipse.preferences.version=1
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||||
platformState=1772304866304
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platformState=1772304866322
|
||||
quickStart=false
|
||||
tipsAndTricks=true
|
||||
@@ -2,8 +2,8 @@
|
||||
<launchHistory>
|
||||
<launchGroup id="org.eclipse.debug.ui.launchGroup.debug">
|
||||
<mruHistory>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task2/task2.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task4/task4.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task3/task3 Debug.launch"/> "/>
|
||||
</mruHistory>
|
||||
@@ -24,8 +24,8 @@
|
||||
</launchGroup>
|
||||
<launchGroup id="org.eclipse.debug.ui.launchGroup.run">
|
||||
<mruHistory>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task2/task2.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task1/task1.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task4/task4.launch"/> "/>
|
||||
<launch memento="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <launchConfiguration local="false" path="/task3/task3 Debug.launch"/> "/>
|
||||
</mruHistory>
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
+4
@@ -0,0 +1,4 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<session version="1.0">
|
||||
<refactoring comment="Delete resource 'task2/task2_tobi.s'" deleteContents="false" description="Delete resource 'task2/task2_tobi.s'" element1="/task2/task2_tobi.s" flags="7" id="org.eclipse.ltk.core.refactoring.delete.resources" resources="1" stamp="1774360637158"/>
|
||||
</session>
|
||||
+1
@@ -0,0 +1 @@
|
||||
1774360637158 Delete resource 'task2/task2_tobi.s'
|
||||
+3
@@ -0,0 +1,3 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<session version="1.0">
<refactoring comment="Rename resource 'task2/task2.s' to 'task2_tobi.s'" description="Rename resource 'task2.s'" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="task2.s" name="task2_tobi.s" stamp="1774358097434" updateReferences="true"/>
<refactoring comment="Rename resource 'task2/task2_efe.s' to 'task2.s'" description="Rename resource 'task2_efe.s'" flags="7" id="org.eclipse.ltk.core.refactoring.rename.resource" input="task2_efe.s" name="task2.s" stamp="1774358106409" updateReferences="true"/>
|
||||
</session>
|
||||
+2
@@ -0,0 +1,2 @@
|
||||
1774358097434 Rename resource 'task2.s'
|
||||
1774358106409 Rename resource 'task2_efe.s'
|
||||
@@ -1,15 +1,15 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<section name="Workbench">
|
||||
<section name="RefactoringWizard.preview">
|
||||
<item key="width" value="600"/>
|
||||
<item key="height" value="400"/>
|
||||
</section>
|
||||
<section name="ShowRefactoringHistoryWizard">
|
||||
<item key="org.eclipse.ltk.ui.refactoring.sortRefactorings" value="true"/>
|
||||
</section>
|
||||
<section name="RefactoringStatusDialog">
|
||||
<item key="DIALOG_WIDTH" value="816"/>
|
||||
<item key="DIALOG_HEIGHT" value="490"/>
|
||||
<item key="DIALOG_FONT_NAME" value="1|Segoe UI|9.0|0|WINDOWS|1|-12|0|0|0|400|0|0|0|1|0|0|0|0|Segoe UI"/>
|
||||
</section>
|
||||
</section>
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<section name="Workbench">
|
||||
<section name="RefactoringWizard.preview">
|
||||
<item key="width" value="600"/>
|
||||
<item key="height" value="400"/>
|
||||
</section>
|
||||
<section name="ShowRefactoringHistoryWizard">
|
||||
<item key="org.eclipse.ltk.ui.refactoring.sortRefactorings" value="true"/>
|
||||
</section>
|
||||
<section name="RefactoringStatusDialog">
|
||||
<item key="DIALOG_WIDTH" value="816"/>
|
||||
<item key="DIALOG_HEIGHT" value="490"/>
|
||||
<item key="DIALOG_FONT_NAME" value="1|Segoe UI|9.0|0|WINDOWS|1|-12|0|0|0|400|0|0|0|1|0|0|0|0|Segoe UI"/>
|
||||
</section>
|
||||
</section>
|
||||
@@ -17,7 +17,7 @@
|
||||
<section name="CleanDialogSettings">
|
||||
<item key="BUILD_NOW" value="false"/>
|
||||
<item key="BUILD_ALL" value="true"/>
|
||||
<item key="TOGGLE_SELECTED" value="false"/>
|
||||
<item key="TOGGLE_SELECTED" value="true"/>
|
||||
<item key="DIALOG_WIDTH" value="731"/>
|
||||
<item key="DIALOG_HEIGHT" value="569"/>
|
||||
<item key="DIALOG_FONT_NAME" value="1|Noto Sans|10.0|0|GTK|1|"/>
|
||||
|
||||
@@ -1,3 +1,3 @@
|
||||
#Tue Mar 10 17:55:17 CET 2026
|
||||
#Tue Mar 31 13:41:52 CEST 2026
|
||||
org.eclipse.core.runtime=2
|
||||
org.eclipse.platform=4.30.0.v20231201-0110
|
||||
@@ -0,0 +1,110 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<FRAME GUID="2FB25471-B62C-4EE6-BD43-F819C095ACF8" FORMAT="0000" APP_VERSION="2.2.0.8" CHECKSUM="48FC0BB7AAC12F0C">
|
||||
<PROJECT FORMAT="1.00" NAME="MCT_Ablaufplaene" AUTHOR="tobis" CREATED="2026.03.16 18:21:51" MODIFIED="2026.03.16 21:54:22">
|
||||
<DIAGRAMS>
|
||||
<DIAGRAM FORMAT="1.00" ID="0" NAME="Task 1" CREATED="2026.03.16 18:22:10" MODIFIED="2026.03.16 21:54:22">
|
||||
<LAYOUT FORMAT="1.00" COLUMNS="3" ROWS="13">
|
||||
<ENTRIES>
|
||||
<ENTRY COLUMN="0" ROW="0" ANCHOR="True">
|
||||
<FIGURE SUBTYPE="PapTitle" FORMAT="1.00" ID="0">
|
||||
<TEXT><![CDATA[Task 1]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="1">
|
||||
<FIGURE SUBTYPE="PapStart" FORMAT="1.00" ID="1">
|
||||
<TEXT><![CDATA[Start]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="2">
|
||||
<FIGURE SUBTYPE="PapLoopStart" FORMAT="1.00" ID="5" ASSOCIATE="6">
|
||||
<TEXT><![CDATA[while(1)]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="3">
|
||||
<FIGURE SUBTYPE="PapInput" FORMAT="1.00" ID="10">
|
||||
<TEXT><![CDATA[Eingabe von S0]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="4">
|
||||
<FIGURE SUBTYPE="PapCondition" FORMAT="1.00" ID="4">
|
||||
<TEXT><![CDATA[S0 gedrückt?]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="5">
|
||||
<FIGURE SUBTYPE="PapActivity" FORMAT="1.00" ID="46">
|
||||
<TEXT><![CDATA[LED0 AN]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="6">
|
||||
<FIGURE SUBTYPE="PapCondition" FORMAT="1.00" ID="32">
|
||||
<TEXT><![CDATA[S0 gedrückt?]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="7">
|
||||
<FIGURE SUBTYPE="PapLoopStart" FORMAT="1.00" ID="35" ASSOCIATE="36">
|
||||
<TEXT><![CDATA[while(1)]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="8">
|
||||
<FIGURE SUBTYPE="PapCondition" FORMAT="1.00" ID="38">
|
||||
<TEXT><![CDATA[S0 gedrückt?]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="9">
|
||||
<FIGURE SUBTYPE="PapComment" FORMAT="1.00" ID="45">
|
||||
<TEXT><![CDATA[NEIN]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="10">
|
||||
<FIGURE SUBTYPE="PapLoopEnd" FORMAT="1.00" ID="36" ASSOCIATE="35">
|
||||
<TEXT><![CDATA[]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="11">
|
||||
<FIGURE SUBTYPE="PapLoopEnd" FORMAT="1.00" ID="6" ASSOCIATE="5">
|
||||
<TEXT><![CDATA[]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="0" ROW="12">
|
||||
<FIGURE SUBTYPE="PapEnd" FORMAT="1.00" ID="2">
|
||||
<TEXT><![CDATA[Ende]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="1" ROW="4">
|
||||
<FIGURE SUBTYPE="PapConnector" FORMAT="1.00" ID="13">
|
||||
<TEXT><![CDATA[]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="2" ROW="5">
|
||||
<FIGURE SUBTYPE="PapConnector" FORMAT="1.00" ID="29">
|
||||
<TEXT><![CDATA[]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="2" ROW="6">
|
||||
<FIGURE SUBTYPE="PapConnector" FORMAT="1.00" ID="24">
|
||||
<TEXT><![CDATA[]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
<ENTRY COLUMN="2" ROW="8">
|
||||
<FIGURE SUBTYPE="PapConnector" FORMAT="1.00" ID="40">
|
||||
<TEXT><![CDATA[]]></TEXT>
|
||||
</FIGURE>
|
||||
</ENTRY>
|
||||
</ENTRIES>
|
||||
</LAYOUT>
|
||||
<CONNECTIONS>
|
||||
<CONNECTION FORMAT="1.00" ID="9" FROM="1" TO="5" TEXT="" />
|
||||
<CONNECTION FORMAT="1.00" ID="11" FROM="10" TO="4" TEXT="" />
|
||||
<CONNECTION FORMAT="1.00" ID="12" FROM="5" TO="10" TEXT="" />
|
||||
<CONNECTION FORMAT="1.00" ID="14" FROM="4" TO="13" TEXT="" />
|
||||
<CONNECTION FORMAT="1.00" ID="27" FROM="32" TO="24" TEXT="nein" />
|
||||
<CONNECTION FORMAT="1.00" ID="30" FROM="24" TO="29" TEXT="" />
|
||||
<CONNECTION FORMAT="1.00" ID="37" FROM="35" TO="38" TEXT="" />
|
||||
<CONNECTION FORMAT="1.00" ID="39" FROM="38" TO="36" TEXT="nein" />
|
||||
<CONNECTION FORMAT="1.00" ID="41" FROM="38" TO="40" TEXT="ja" />
|
||||
<CONNECTION FORMAT="1.00" ID="42" FROM="40" TO="24" TEXT="" />
|
||||
</CONNECTIONS>
|
||||
</DIAGRAM>
|
||||
</DIAGRAMS>
|
||||
</PROJECT>
|
||||
</FRAME>
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,12 @@
|
||||
= 4.1 Aufgabe 1 - C: GPIO
|
||||
== Vorbereitungsfragen:
|
||||
=== a. Wozu werden Pull-Up Widerstände bei der Abfrage von Tastern benötigt?
|
||||
=== b. Wie werden Taster entprellt?
|
||||
=== c. Wie wird ein einzelnes Bit in einem 32-bit Wort getoggelt, ohne die anderen Bits zu verändern?
|
||||
`int x ^= (1 << 0);`
|
||||
=== d. Was ist speziell bei der Programmierung von Mikrocontrollern unter dem Begriff Initialisierung zu verstehen?
|
||||
=== e. An Welchen Pors des Mikrocontrollers sind die LEDS und Taster der STefi Light Patine angeschlossen?
|
||||
=== f. Studieren Sie die wichtigsten Quelltextdateien des C-Projektes task1.c und Stefi-Light.h. Welche Register und welche Bits werden hier beschrieben? Suchen Sie in der ST-Dokumentation (Reference Manual) die beiden relevanten Kapitel heraus und vollziehen Sie die Bedeutung der getätigten Einstellungen nach.
|
||||
=== g. Wie muss ein Pin konfiguriert werden damit er als Eingang verwendet werden kann?
|
||||
=== h. Erstellen Sie ein detailliertes Flussdiagramm für Ihre Lauflicht-Applikation
|
||||
|
||||
@@ -0,0 +1,17 @@
|
||||
= 3.2 Aufgabe 2 - ASM: Interrupts, Entprellen
|
||||
== Aufgabenstellung:
|
||||
Das Programm soll per Tastendruck den Zustand der LEDs wechseln. Taster *S1* soll *LED0* und *LED3* ein-bzw. auschalten, Taster *S1 LED1* und *LED2*
|
||||
== Vorbereitungsfragen:
|
||||
=== a. Welche vier Einträge stehen am Beginn der ARM Exception Vector Table?
|
||||
#table(
|
||||
columns: (1fr, auto, auto),
|
||||
inset: 10pt,
|
||||
align: horizon,
|
||||
table.header(
|
||||
[*Postion*], [*Vektor*], [*Beschreibung*]
|
||||
),
|
||||
[0], [WWDG],
|
||||
=== b. Wie viele Interrupt-Prioritätsstufen unterstützt ein ARM-Controller maximal?
|
||||
=== c. An welchen Positionen in der Exception Vector Table stehen die Adressen der ISRs für die Tasten? (ST Dokumentation)
|
||||
=== d. Schauen Sie sich das Prellen eines Tasters an und überlegen Sie sich eine Lösung.
|
||||
=== e. Erstellen Sie ein komplettes Flussdiagramm für Ihren Lösungsansatz.
|
||||
@@ -13,7 +13,7 @@
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="743904029185599562" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1558684269450950684" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
||||
Whitespace-only changes.
@@ -0,0 +1 @@
|
||||
Src/sketch.o: ../Src/sketch.c
|
||||
Binary file not shown.
Whitespace-only changes.
@@ -5,14 +5,17 @@
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../Src/sketch.c \
|
||||
../Src/task1.c \
|
||||
../Src/task1_it.c
|
||||
|
||||
OBJS += \
|
||||
./Src/sketch.o \
|
||||
./Src/task1.o \
|
||||
./Src/task1_it.o
|
||||
|
||||
C_DEPS += \
|
||||
./Src/sketch.d \
|
||||
./Src/task1.d \
|
||||
./Src/task1_it.d
|
||||
|
||||
@@ -24,7 +27,7 @@ Src/%.o Src/%.su Src/%.cyclo: ../Src/%.c Src/subdir.mk
|
||||
clean: clean-Src
|
||||
|
||||
clean-Src:
|
||||
-$(RM) ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
|
||||
-$(RM) ./Src/sketch.cyclo ./Src/sketch.d ./Src/sketch.o ./Src/sketch.su ./Src/task1.cyclo ./Src/task1.d ./Src/task1.o ./Src/task1.su ./Src/task1_it.cyclo ./Src/task1_it.d ./Src/task1_it.o ./Src/task1_it.su
|
||||
|
||||
.PHONY: clean-Src
|
||||
|
||||
@@ -1,3 +0,0 @@
|
||||
../Src/task1.c:56:5:main 5
|
||||
../Src/task1.c:112:13:GPIO_init 1
|
||||
../Src/task1.c:135:13:delay 3
|
||||
Binary file not shown.
@@ -1,3 +0,0 @@
|
||||
../Src/task1.c:56:5:main 8 static,ignoring_inline_asm
|
||||
../Src/task1.c:112:13:GPIO_init 4 static
|
||||
../Src/task1.c:135:13:delay 24 static,ignoring_inline_asm
|
||||
@@ -1,3 +1,4 @@
|
||||
"./Src/sketch.o"
|
||||
"./Src/task1.o"
|
||||
"./Src/task1_it.o"
|
||||
"./Startup/startup_stm32g431kbtx.o"
|
||||
|
||||
Binary file not shown.
Loaded 100 of 115 files, more files were not shown because too many files have changed in this diff.
Show more
Reference in new issue
Block a user