Added parallelport, timer and ampelsteuerung

2022-06-14 12:26:26 +02:00
parent b30efd039d
commit 019dc2868e
2 changed files with 39 additions and 4 deletions
@@ -3,8 +3,6 @@ input wire clk12M,
 input wire rst,
 input wire [7:0] data_input,
 input wire data_valid,
-output reg REDn,
-output reg GRNn,
 output reg RED,
 output reg GRN,
 output reg alarm
@@ -12,7 +10,8 @@ output reg alarm

 wire red_pwm;
 wire grn_pwm;
-
+reg REDn;
+reg GRNn;
 defparam U1.on_hi 			= 2'b10;
 defparam U1.on_lo 			= 2'b01;
 defparam U1.off   			= 2'b00;