Projektdaten für das ESY1B Praktikum im Sommersemester 2022
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- `include "../spi_interface.v"
- `include "../fsm/Fsm.sv"
-
- module Top(
- input wire clk
- );
- // Bus (Interface)
- // SPI Interface
- // FSM
- // Parallelport
- // FRAM-Controller
- // Timer
- // Ampelsteuerung
-
- endmodule
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