kuntzschcl/ESY1_Projekt_2023
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Merge branch 'master' of https://git.efi.th-nuernberg.de/gitea/kuntzschcl/ESY1_Projekt_2023

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hans 2023-06-15 14:39:30 +02:00
commit 86073b598b
2 changed files with 73 additions and 72 deletions
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5
interface.sv
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@ -21,9 +21,10 @@
interface led_if();
logic [2:0]rgb;
logic [2:0]rgbn;
modport led_port_stim(input rgb);
modport led_port_top(output rgb);
modport led_port_stim(input rgb, rgbn);
modport led_port_top(output rgb, rgbn);
endinterface : led_if

6
top_level.sv
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@ -20,10 +20,10 @@ interface bus();
logic [1:0]spi_read;
// modports from modules pov
modport timer_port(input dip, output timer, clk); //dip[0]
modport timer_port(input dip, output timer, clk); //dip[0]
modport parallel_port(output dip);
modport steuerung_port(input dip, timer, spi_read); //dip[3:0] / spi_read[1:0]
modport spi_port(input dip, timer, output spi_read); //spi_read[1:0]
modport steuerung_port(input dip, timer, clk, spi_read); //dip[3:0] / spi_read[1:0]
modport spi_port(input dip, timer, clk, output spi_read); //spi_read[1:0]
endinterface : bus
// Definition of parallelport