Lösung des Praktikums Systementwurf
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niosII.qsys 66KB

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  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <system name="$${FILENAME}">
  3. <component
  4. name="$${FILENAME}"
  5. displayName="$${FILENAME}"
  6. version="1.0"
  7. description=""
  8. tags=""
  9. categories="System" />
  10. <parameter name="bonusData"><![CDATA[bonusData
  11. {
  12. element core
  13. {
  14. datum _sortIndex
  15. {
  16. value = "1";
  17. type = "int";
  18. }
  19. }
  20. element core.debug_mem_slave
  21. {
  22. datum baseAddress
  23. {
  24. value = "395264";
  25. type = "String";
  26. }
  27. }
  28. element data_channel_0
  29. {
  30. datum _sortIndex
  31. {
  32. value = "16";
  33. type = "int";
  34. }
  35. }
  36. element data_channel_0.ctrl
  37. {
  38. datum baseAddress
  39. {
  40. value = "397760";
  41. type = "String";
  42. }
  43. }
  44. element data_channel_1
  45. {
  46. datum _sortIndex
  47. {
  48. value = "17";
  49. type = "int";
  50. }
  51. }
  52. element data_channel_1.ctrl
  53. {
  54. datum baseAddress
  55. {
  56. value = "397696";
  57. type = "String";
  58. }
  59. }
  60. element data_channel_2
  61. {
  62. datum _sortIndex
  63. {
  64. value = "18";
  65. type = "int";
  66. }
  67. }
  68. element data_channel_2.ctrl
  69. {
  70. datum baseAddress
  71. {
  72. value = "397632";
  73. type = "String";
  74. }
  75. }
  76. element data_channel_3
  77. {
  78. datum _sortIndex
  79. {
  80. value = "19";
  81. type = "int";
  82. }
  83. }
  84. element data_channel_3.ctrl
  85. {
  86. datum baseAddress
  87. {
  88. value = "397568";
  89. type = "String";
  90. }
  91. }
  92. element data_channel_4
  93. {
  94. datum _sortIndex
  95. {
  96. value = "20";
  97. type = "int";
  98. }
  99. }
  100. element data_channel_4.ctrl
  101. {
  102. datum baseAddress
  103. {
  104. value = "397504";
  105. type = "String";
  106. }
  107. }
  108. element data_channel_5
  109. {
  110. datum _sortIndex
  111. {
  112. value = "21";
  113. type = "int";
  114. }
  115. }
  116. element data_channel_5.ctrl
  117. {
  118. datum baseAddress
  119. {
  120. value = "397440";
  121. type = "String";
  122. }
  123. }
  124. element data_channel_6
  125. {
  126. datum _sortIndex
  127. {
  128. value = "22";
  129. type = "int";
  130. }
  131. }
  132. element data_channel_6.ctrl
  133. {
  134. datum baseAddress
  135. {
  136. value = "397376";
  137. type = "String";
  138. }
  139. }
  140. element hardware_task_0
  141. {
  142. datum _sortIndex
  143. {
  144. value = "9";
  145. type = "int";
  146. }
  147. }
  148. element hardware_task_0.ctrl
  149. {
  150. datum baseAddress
  151. {
  152. value = "397312";
  153. type = "String";
  154. }
  155. }
  156. element hardware_task_1
  157. {
  158. datum _sortIndex
  159. {
  160. value = "10";
  161. type = "int";
  162. }
  163. }
  164. element hardware_task_1.ctrl
  165. {
  166. datum baseAddress
  167. {
  168. value = "398144";
  169. type = "String";
  170. }
  171. }
  172. element hardware_task_2
  173. {
  174. datum _sortIndex
  175. {
  176. value = "11";
  177. type = "int";
  178. }
  179. }
  180. element hardware_task_2.ctrl
  181. {
  182. datum baseAddress
  183. {
  184. value = "398080";
  185. type = "String";
  186. }
  187. }
  188. element hardware_task_3
  189. {
  190. datum _sortIndex
  191. {
  192. value = "12";
  193. type = "int";
  194. }
  195. }
  196. element hardware_task_3.ctrl
  197. {
  198. datum baseAddress
  199. {
  200. value = "398016";
  201. type = "String";
  202. }
  203. }
  204. element hardware_task_4
  205. {
  206. datum _sortIndex
  207. {
  208. value = "13";
  209. type = "int";
  210. }
  211. }
  212. element hardware_task_4.ctrl
  213. {
  214. datum baseAddress
  215. {
  216. value = "397952";
  217. type = "String";
  218. }
  219. }
  220. element hardware_task_5
  221. {
  222. datum _sortIndex
  223. {
  224. value = "14";
  225. type = "int";
  226. }
  227. }
  228. element hardware_task_5.ctrl
  229. {
  230. datum baseAddress
  231. {
  232. value = "397888";
  233. type = "String";
  234. }
  235. }
  236. element hardware_task_6
  237. {
  238. datum _sortIndex
  239. {
  240. value = "15";
  241. type = "int";
  242. }
  243. }
  244. element hardware_task_6.ctrl
  245. {
  246. datum baseAddress
  247. {
  248. value = "397824";
  249. type = "String";
  250. }
  251. }
  252. element hardware_timestamp
  253. {
  254. datum _sortIndex
  255. {
  256. value = "8";
  257. type = "int";
  258. }
  259. }
  260. element hardware_timestamp.ctrl
  261. {
  262. datum baseAddress
  263. {
  264. value = "398208";
  265. type = "String";
  266. }
  267. }
  268. element jtag_uart
  269. {
  270. datum _sortIndex
  271. {
  272. value = "4";
  273. type = "int";
  274. }
  275. }
  276. element jtag_uart.avalon_jtag_slave
  277. {
  278. datum baseAddress
  279. {
  280. value = "398312";
  281. type = "String";
  282. }
  283. }
  284. element key_start
  285. {
  286. datum _sortIndex
  287. {
  288. value = "6";
  289. type = "int";
  290. }
  291. }
  292. element key_start.s1
  293. {
  294. datum baseAddress
  295. {
  296. value = "398288";
  297. type = "String";
  298. }
  299. }
  300. element leds
  301. {
  302. datum _sortIndex
  303. {
  304. value = "7";
  305. type = "int";
  306. }
  307. }
  308. element leds.clk
  309. {
  310. datum _tags
  311. {
  312. value = "";
  313. type = "String";
  314. }
  315. }
  316. element leds.external_connection
  317. {
  318. datum _tags
  319. {
  320. value = "";
  321. type = "String";
  322. }
  323. }
  324. element leds.s1
  325. {
  326. datum baseAddress
  327. {
  328. value = "398272";
  329. type = "String";
  330. }
  331. }
  332. element niosII
  333. {
  334. datum _originalDeviceFamily
  335. {
  336. value = "Cyclone V";
  337. type = "String";
  338. }
  339. }
  340. element niosII
  341. {
  342. datum _originalDeviceFamily
  343. {
  344. value = "Cyclone V";
  345. type = "String";
  346. }
  347. }
  348. element niosII
  349. {
  350. datum _originalDeviceFamily
  351. {
  352. value = "Cyclone V";
  353. type = "String";
  354. }
  355. }
  356. element niosII
  357. {
  358. datum _originalDeviceFamily
  359. {
  360. value = "Cyclone V";
  361. type = "String";
  362. }
  363. }
  364. element niosII
  365. {
  366. datum _originalDeviceFamily
  367. {
  368. value = "Cyclone V";
  369. type = "String";
  370. }
  371. }
  372. element niosII
  373. {
  374. datum _originalDeviceFamily
  375. {
  376. value = "Cyclone V";
  377. type = "String";
  378. }
  379. }
  380. element niosII
  381. {
  382. datum _originalDeviceFamily
  383. {
  384. value = "Cyclone V";
  385. type = "String";
  386. }
  387. }
  388. element ram
  389. {
  390. datum _sortIndex
  391. {
  392. value = "3";
  393. type = "int";
  394. }
  395. }
  396. element ram.s1
  397. {
  398. datum baseAddress
  399. {
  400. value = "131072";
  401. type = "String";
  402. }
  403. }
  404. element rom
  405. {
  406. datum _sortIndex
  407. {
  408. value = "2";
  409. type = "int";
  410. }
  411. }
  412. element rom.s1
  413. {
  414. datum baseAddress
  415. {
  416. value = "262144";
  417. type = "String";
  418. }
  419. }
  420. element sysid
  421. {
  422. datum _sortIndex
  423. {
  424. value = "5";
  425. type = "int";
  426. }
  427. }
  428. element sysid.control_slave
  429. {
  430. datum baseAddress
  431. {
  432. value = "398304";
  433. type = "String";
  434. }
  435. }
  436. element system
  437. {
  438. datum _sortIndex
  439. {
  440. value = "0";
  441. type = "int";
  442. }
  443. }
  444. }
  445. ]]></parameter>
  446. <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
  447. <parameter name="device" value="5CSEBA6U23I7" />
  448. <parameter name="deviceFamily" value="Cyclone V" />
  449. <parameter name="deviceSpeedGrade" value="7" />
  450. <parameter name="fabricMode" value="QSYS" />
  451. <parameter name="generateLegacySim" value="false" />
  452. <parameter name="generationId" value="0" />
  453. <parameter name="globalResetBus" value="false" />
  454. <parameter name="hdlLanguage" value="VERILOG" />
  455. <parameter name="hideFromIPCatalog" value="false" />
  456. <parameter name="lockedInterfaceDefinition" value="" />
  457. <parameter name="maxAdditionalLatency" value="1" />
  458. <parameter name="projectName">signal_processing.qpf</parameter>
  459. <parameter name="sopcBorderPoints" value="false" />
  460. <parameter name="systemHash" value="0" />
  461. <parameter name="testBenchDutName" value="" />
  462. <parameter name="timeStamp" value="0" />
  463. <parameter name="useTestBenchNamingPattern" value="false" />
  464. <instanceScript></instanceScript>
  465. <interface name="clk" internal="system.clk_in" type="clock" dir="end" />
  466. <interface
  467. name="data_channel_0_hw_sink"
  468. internal="data_channel_0.hw_sink"
  469. type="avalon"
  470. dir="end" />
  471. <interface
  472. name="data_channel_0_hw_source"
  473. internal="data_channel_0.hw_source"
  474. type="avalon"
  475. dir="end" />
  476. <interface
  477. name="data_channel_1_hw_sink"
  478. internal="data_channel_1.hw_sink"
  479. type="avalon"
  480. dir="end" />
  481. <interface
  482. name="data_channel_1_hw_source"
  483. internal="data_channel_1.hw_source"
  484. type="avalon"
  485. dir="end" />
  486. <interface
  487. name="data_channel_2_hw_sink"
  488. internal="data_channel_2.hw_sink"
  489. type="avalon"
  490. dir="end" />
  491. <interface
  492. name="data_channel_2_hw_source"
  493. internal="data_channel_2.hw_source"
  494. type="avalon"
  495. dir="end" />
  496. <interface
  497. name="data_channel_3_hw_sink"
  498. internal="data_channel_3.hw_sink"
  499. type="avalon"
  500. dir="end" />
  501. <interface
  502. name="data_channel_3_hw_source"
  503. internal="data_channel_3.hw_source"
  504. type="avalon"
  505. dir="end" />
  506. <interface
  507. name="data_channel_4_hw_sink"
  508. internal="data_channel_4.hw_sink"
  509. type="avalon"
  510. dir="end" />
  511. <interface
  512. name="data_channel_4_hw_source"
  513. internal="data_channel_4.hw_source"
  514. type="avalon"
  515. dir="end" />
  516. <interface
  517. name="data_channel_5_hw_sink"
  518. internal="data_channel_5.hw_sink"
  519. type="avalon"
  520. dir="end" />
  521. <interface
  522. name="data_channel_5_hw_source"
  523. internal="data_channel_5.hw_source"
  524. type="avalon"
  525. dir="end" />
  526. <interface
  527. name="data_channel_6_hw_sink"
  528. internal="data_channel_6.hw_sink"
  529. type="avalon"
  530. dir="end" />
  531. <interface
  532. name="data_channel_6_hw_source"
  533. internal="data_channel_6.hw_source"
  534. type="avalon"
  535. dir="end" />
  536. <interface
  537. name="hardware_task_0_task"
  538. internal="hardware_task_0.task"
  539. type="avalon"
  540. dir="start" />
  541. <interface
  542. name="hardware_task_1_task"
  543. internal="hardware_task_1.task"
  544. type="avalon"
  545. dir="start" />
  546. <interface
  547. name="hardware_task_2_task"
  548. internal="hardware_task_2.task"
  549. type="avalon"
  550. dir="start" />
  551. <interface
  552. name="hardware_task_3_task"
  553. internal="hardware_task_3.task"
  554. type="avalon"
  555. dir="start" />
  556. <interface
  557. name="hardware_task_4_task"
  558. internal="hardware_task_4.task"
  559. type="avalon"
  560. dir="start" />
  561. <interface
  562. name="hardware_task_5_task"
  563. internal="hardware_task_5.task"
  564. type="avalon"
  565. dir="start" />
  566. <interface
  567. name="hardware_task_6_task"
  568. internal="hardware_task_6.task"
  569. type="avalon"
  570. dir="start" />
  571. <interface
  572. name="key_start"
  573. internal="key_start.external_connection"
  574. type="conduit"
  575. dir="end" />
  576. <interface
  577. name="leds"
  578. internal="leds.external_connection"
  579. type="conduit"
  580. dir="end" />
  581. <interface name="reset" internal="system.clk_in_reset" type="reset" dir="end" />
  582. <module name="core" kind="altera_nios2_gen2" version="21.1" enabled="1">
  583. <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
  584. <parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
  585. <parameter name="AUTO_DEVICE" value="5CSEBA6U23I7" />
  586. <parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
  587. <parameter name="bht_ramBlockType" value="Automatic" />
  588. <parameter name="breakOffset" value="32" />
  589. <parameter name="breakSlave" value="None" />
  590. <parameter name="cdx_enabled" value="false" />
  591. <parameter name="clockFrequency" value="200000000" />
  592. <parameter name="cpuArchRev" value="1" />
  593. <parameter name="cpuID" value="0" />
  594. <parameter name="cpuReset" value="false" />
  595. <parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
  596. <parameter name="customInstSlavesSystemInfo_nios_a" value="&lt;info/&gt;" />
  597. <parameter name="customInstSlavesSystemInfo_nios_b" value="&lt;info/&gt;" />
  598. <parameter name="customInstSlavesSystemInfo_nios_c" value="&lt;info/&gt;" />
  599. <parameter name="dataAddrWidth" value="19" />
  600. <parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
  601. <parameter name="dataMasterHighPerformanceMapParam" value="" />
  602. <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='ram.s1' start='0x20000' end='0x40000' type='altera_avalon_onchip_memory2.s1' /><slave name='rom.s1' start='0x40000' end='0x60000' type='altera_avalon_onchip_memory2.s1' /><slave name='core.debug_mem_slave' start='0x60800' end='0x61000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='hardware_task_0.ctrl' start='0x61000' end='0x61040' type='hardware_task.ctrl' /><slave name='data_channel_6.ctrl' start='0x61040' end='0x61080' type='data_channel.ctrl' /><slave name='data_channel_5.ctrl' start='0x61080' end='0x610C0' type='data_channel.ctrl' /><slave name='data_channel_4.ctrl' start='0x610C0' end='0x61100' type='data_channel.ctrl' /><slave name='data_channel_3.ctrl' start='0x61100' end='0x61140' type='data_channel.ctrl' /><slave name='data_channel_2.ctrl' start='0x61140' end='0x61180' type='data_channel.ctrl' /><slave name='data_channel_1.ctrl' start='0x61180' end='0x611C0' type='data_channel.ctrl' /><slave name='data_channel_0.ctrl' start='0x611C0' end='0x61200' type='data_channel.ctrl' /><slave name='hardware_task_6.ctrl' start='0x61200' end='0x61240' type='hardware_task.ctrl' /><slave name='hardware_task_5.ctrl' start='0x61240' end='0x61280' type='hardware_task.ctrl' /><slave name='hardware_task_4.ctrl' start='0x61280' end='0x612C0' type='hardware_task.ctrl' /><slave name='hardware_task_3.ctrl' start='0x612C0' end='0x61300' type='hardware_task.ctrl' /><slave name='hardware_task_2.ctrl' start='0x61300' end='0x61340' type='hardware_task.ctrl' /><slave name='hardware_task_1.ctrl' start='0x61340' end='0x61380' type='hardware_task.ctrl' /><slave name='hardware_timestamp.ctrl' start='0x61380' end='0x613C0' type='hardware_timestamp.ctrl' /><slave name='leds.s1' start='0x613C0' end='0x613D0' type='altera_avalon_pio.s1' /><slave name='key_start.s1' start='0x613D0' end='0x613E0' type='altera_avalon_pio.s1' /><slave name='sysid.control_slave' start='0x613E0' end='0x613E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x613E8' end='0x613F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /></address-map>]]></parameter>
  603. <parameter name="data_master_high_performance_paddr_base" value="0" />
  604. <parameter name="data_master_high_performance_paddr_size" value="0" />
  605. <parameter name="data_master_paddr_base" value="0" />
  606. <parameter name="data_master_paddr_size" value="0" />
  607. <parameter name="dcache_bursts" value="false" />
  608. <parameter name="dcache_numTCDM" value="0" />
  609. <parameter name="dcache_ramBlockType" value="Automatic" />
  610. <parameter name="dcache_size" value="32768" />
  611. <parameter name="dcache_tagramBlockType" value="Automatic" />
  612. <parameter name="dcache_victim_buf_impl" value="ram" />
  613. <parameter name="debug_OCIOnchipTrace" value="_128" />
  614. <parameter name="debug_assignJtagInstanceID" value="false" />
  615. <parameter name="debug_datatrigger" value="0" />
  616. <parameter name="debug_debugReqSignals" value="false" />
  617. <parameter name="debug_enabled" value="true" />
  618. <parameter name="debug_hwbreakpoint" value="0" />
  619. <parameter name="debug_jtagInstanceID" value="0" />
  620. <parameter name="debug_traceStorage" value="onchip_trace" />
  621. <parameter name="debug_traceType" value="none" />
  622. <parameter name="debug_triggerArming" value="true" />
  623. <parameter name="deviceFamilyName" value="Cyclone V" />
  624. <parameter name="deviceFeaturesSystemInfo">COMPILER_SUPPORT 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 ANY_QFP 0 ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 HARDCOPY 0 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_18_BIT_MULTS 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IFP_USE_LEGACY_IO_CHECKER 1 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_BARE_DIE 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_JZ_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_SMI_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M144K_MEMORY 0 M10K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_MIGRATABLE 0 NOT_LISTED 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_POF 0 NO_PIN_OUT 0 NO_RPE_SUPPORT 0 NO_TDC_SUPPORT 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_CRC 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QMAP_IN_DEVELOPMENT 0 QFIT_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_OCT_AUTO_CALIBRATION 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1</parameter>
  625. <parameter name="dividerType" value="srt2" />
  626. <parameter name="exceptionOffset" value="32" />
  627. <parameter name="exceptionSlave" value="rom.s1" />
  628. <parameter name="faAddrWidth" value="1" />
  629. <parameter name="faSlaveMapParam" value="" />
  630. <parameter name="fa_cache_line" value="2" />
  631. <parameter name="fa_cache_linesize" value="0" />
  632. <parameter name="flash_instruction_master_paddr_base" value="0" />
  633. <parameter name="flash_instruction_master_paddr_size" value="0" />
  634. <parameter name="icache_burstType" value="None" />
  635. <parameter name="icache_numTCIM" value="0" />
  636. <parameter name="icache_ramBlockType" value="Automatic" />
  637. <parameter name="icache_size" value="32768" />
  638. <parameter name="icache_tagramBlockType" value="Automatic" />
  639. <parameter name="impl" value="Fast" />
  640. <parameter name="instAddrWidth" value="19" />
  641. <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='rom.s1' start='0x40000' end='0x60000' type='altera_avalon_onchip_memory2.s1' /><slave name='core.debug_mem_slave' start='0x60800' end='0x61000' type='altera_nios2_gen2.debug_mem_slave' /></address-map>]]></parameter>
  642. <parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
  643. <parameter name="instructionMasterHighPerformanceMapParam" value="" />
  644. <parameter name="instruction_master_high_performance_paddr_base" value="0" />
  645. <parameter name="instruction_master_high_performance_paddr_size" value="0" />
  646. <parameter name="instruction_master_paddr_base" value="0" />
  647. <parameter name="instruction_master_paddr_size" value="0" />
  648. <parameter name="internalIrqMaskSystemInfo" value="5" />
  649. <parameter name="io_regionbase" value="0" />
  650. <parameter name="io_regionsize" value="0" />
  651. <parameter name="master_addr_map" value="false" />
  652. <parameter name="mmu_TLBMissExcOffset" value="0" />
  653. <parameter name="mmu_TLBMissExcSlave" value="None" />
  654. <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
  655. <parameter name="mmu_enabled" value="false" />
  656. <parameter name="mmu_processIDNumBits" value="8" />
  657. <parameter name="mmu_ramBlockType" value="Automatic" />
  658. <parameter name="mmu_tlbNumWays" value="16" />
  659. <parameter name="mmu_tlbPtrSz" value="7" />
  660. <parameter name="mmu_udtlbNumEntries" value="6" />
  661. <parameter name="mmu_uitlbNumEntries" value="4" />
  662. <parameter name="mpu_enabled" value="false" />
  663. <parameter name="mpu_minDataRegionSize" value="12" />
  664. <parameter name="mpu_minInstRegionSize" value="12" />
  665. <parameter name="mpu_numOfDataRegion" value="8" />
  666. <parameter name="mpu_numOfInstRegion" value="8" />
  667. <parameter name="mpu_useLimit" value="false" />
  668. <parameter name="mpx_enabled" value="false" />
  669. <parameter name="mul_32_impl" value="2" />
  670. <parameter name="mul_64_impl" value="0" />
  671. <parameter name="mul_shift_choice" value="1" />
  672. <parameter name="ocimem_ramBlockType" value="Automatic" />
  673. <parameter name="ocimem_ramInit" value="false" />
  674. <parameter name="regfile_ramBlockType" value="Automatic" />
  675. <parameter name="register_file_por" value="false" />
  676. <parameter name="resetOffset" value="0" />
  677. <parameter name="resetSlave" value="rom.s1" />
  678. <parameter name="resetrequest_enabled" value="true" />
  679. <parameter name="setting_HBreakTest" value="false" />
  680. <parameter name="setting_HDLSimCachesCleared" value="true" />
  681. <parameter name="setting_activateMonitors" value="true" />
  682. <parameter name="setting_activateTestEndChecker" value="false" />
  683. <parameter name="setting_activateTrace" value="false" />
  684. <parameter name="setting_allow_break_inst" value="false" />
  685. <parameter name="setting_alwaysEncrypt" value="true" />
  686. <parameter name="setting_asic_add_scan_mode_input" value="false" />
  687. <parameter name="setting_asic_enabled" value="false" />
  688. <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
  689. <parameter name="setting_asic_third_party_synthesis" value="false" />
  690. <parameter name="setting_avalonDebugPortPresent" value="false" />
  691. <parameter name="setting_bhtPtrSz" value="8" />
  692. <parameter name="setting_bigEndian" value="false" />
  693. <parameter name="setting_branchpredictiontype" value="Dynamic" />
  694. <parameter name="setting_breakslaveoveride" value="false" />
  695. <parameter name="setting_clearXBitsLDNonBypass" value="true" />
  696. <parameter name="setting_dc_ecc_present" value="true" />
  697. <parameter name="setting_disable_tmr_inj" value="false" />
  698. <parameter name="setting_disableocitrace" value="false" />
  699. <parameter name="setting_dtcm_ecc_present" value="true" />
  700. <parameter name="setting_ecc_present" value="false" />
  701. <parameter name="setting_ecc_sim_test_ports" value="false" />
  702. <parameter name="setting_exportHostDebugPort" value="false" />
  703. <parameter name="setting_exportPCB" value="false" />
  704. <parameter name="setting_export_large_RAMs" value="false" />
  705. <parameter name="setting_exportdebuginfo" value="false" />
  706. <parameter name="setting_exportvectors" value="false" />
  707. <parameter name="setting_fast_register_read" value="false" />
  708. <parameter name="setting_ic_ecc_present" value="true" />
  709. <parameter name="setting_interruptControllerType" value="Internal" />
  710. <parameter name="setting_itcm_ecc_present" value="true" />
  711. <parameter name="setting_mmu_ecc_present" value="true" />
  712. <parameter name="setting_oci_export_jtag_signals" value="false" />
  713. <parameter name="setting_oci_version" value="1" />
  714. <parameter name="setting_preciseIllegalMemAccessException" value="false" />
  715. <parameter name="setting_removeRAMinit" value="false" />
  716. <parameter name="setting_rf_ecc_present" value="true" />
  717. <parameter name="setting_shadowRegisterSets" value="0" />
  718. <parameter name="setting_showInternalSettings" value="false" />
  719. <parameter name="setting_showUnpublishedSettings" value="false" />
  720. <parameter name="setting_support31bitdcachebypass" value="true" />
  721. <parameter name="setting_tmr_output_disable" value="false" />
  722. <parameter name="setting_usedesignware" value="false" />
  723. <parameter name="shift_rot_impl" value="1" />
  724. <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
  725. <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
  726. <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
  727. <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
  728. <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
  729. <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
  730. <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
  731. <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
  732. <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
  733. <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
  734. <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
  735. <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
  736. <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
  737. <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
  738. <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
  739. <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
  740. <parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
  741. <parameter name="tightly_coupled_data_master_0_paddr_size" value="0" />
  742. <parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
  743. <parameter name="tightly_coupled_data_master_1_paddr_size" value="0" />
  744. <parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
  745. <parameter name="tightly_coupled_data_master_2_paddr_size" value="0" />
  746. <parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
  747. <parameter name="tightly_coupled_data_master_3_paddr_size" value="0" />
  748. <parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
  749. <parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" />
  750. <parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
  751. <parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" />
  752. <parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
  753. <parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" />
  754. <parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
  755. <parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" />
  756. <parameter name="tmr_enabled" value="false" />
  757. <parameter name="tracefilename" value="" />
  758. <parameter name="userDefinedSettings" value="" />
  759. </module>
  760. <module name="data_channel_0" kind="data_channel" version="1.0" enabled="1">
  761. <parameter name="DEPTH" value="1024" />
  762. </module>
  763. <module name="data_channel_1" kind="data_channel" version="1.0" enabled="1">
  764. <parameter name="DEPTH" value="1024" />
  765. </module>
  766. <module name="data_channel_2" kind="data_channel" version="1.0" enabled="1">
  767. <parameter name="DEPTH" value="1024" />
  768. </module>
  769. <module name="data_channel_3" kind="data_channel" version="1.0" enabled="1">
  770. <parameter name="DEPTH" value="1024" />
  771. </module>
  772. <module name="data_channel_4" kind="data_channel" version="1.0" enabled="1">
  773. <parameter name="DEPTH" value="1024" />
  774. </module>
  775. <module name="data_channel_5" kind="data_channel" version="1.0" enabled="1">
  776. <parameter name="DEPTH" value="1024" />
  777. </module>
  778. <module name="data_channel_6" kind="data_channel" version="1.0" enabled="1">
  779. <parameter name="DEPTH" value="1024" />
  780. </module>
  781. <module name="hardware_task_0" kind="hardware_task" version="1.0" enabled="1" />
  782. <module name="hardware_task_1" kind="hardware_task" version="1.0" enabled="1" />
  783. <module name="hardware_task_2" kind="hardware_task" version="1.0" enabled="1" />
  784. <module name="hardware_task_3" kind="hardware_task" version="1.0" enabled="1" />
  785. <module name="hardware_task_4" kind="hardware_task" version="1.0" enabled="1" />
  786. <module name="hardware_task_5" kind="hardware_task" version="1.0" enabled="1" />
  787. <module name="hardware_task_6" kind="hardware_task" version="1.0" enabled="1" />
  788. <module
  789. name="hardware_timestamp"
  790. kind="hardware_timestamp"
  791. version="1.0"
  792. enabled="1" />
  793. <module
  794. name="jtag_uart"
  795. kind="altera_avalon_jtag_uart"
  796. version="21.1"
  797. enabled="1">
  798. <parameter name="allowMultipleConnections" value="false" />
  799. <parameter name="avalonSpec" value="2.0" />
  800. <parameter name="clkFreq" value="200000000" />
  801. <parameter name="hubInstanceID" value="0" />
  802. <parameter name="readBufferDepth" value="64" />
  803. <parameter name="readIRQThreshold" value="8" />
  804. <parameter name="simInputCharacterStream" value="" />
  805. <parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter>
  806. <parameter name="useRegistersForReadBuffer" value="false" />
  807. <parameter name="useRegistersForWriteBuffer" value="false" />
  808. <parameter name="useRelativePathForSimFile" value="false" />
  809. <parameter name="writeBufferDepth" value="64" />
  810. <parameter name="writeIRQThreshold" value="8" />
  811. </module>
  812. <module name="key_start" kind="altera_avalon_pio" version="21.1" enabled="1">
  813. <parameter name="bitClearingEdgeCapReg" value="true" />
  814. <parameter name="bitModifyingOutReg" value="false" />
  815. <parameter name="captureEdge" value="true" />
  816. <parameter name="clockRate" value="200000000" />
  817. <parameter name="direction" value="Input" />
  818. <parameter name="edgeType" value="RISING" />
  819. <parameter name="generateIRQ" value="true" />
  820. <parameter name="irqType" value="EDGE" />
  821. <parameter name="resetValue" value="0" />
  822. <parameter name="simDoTestBenchWiring" value="false" />
  823. <parameter name="simDrivenValue" value="0" />
  824. <parameter name="width" value="1" />
  825. </module>
  826. <module name="leds" kind="altera_avalon_pio" version="21.1" enabled="1">
  827. <parameter name="bitClearingEdgeCapReg" value="false" />
  828. <parameter name="bitModifyingOutReg" value="false" />
  829. <parameter name="captureEdge" value="false" />
  830. <parameter name="clockRate" value="200000000" />
  831. <parameter name="direction" value="Output" />
  832. <parameter name="edgeType" value="RISING" />
  833. <parameter name="generateIRQ" value="false" />
  834. <parameter name="irqType" value="LEVEL" />
  835. <parameter name="resetValue" value="0" />
  836. <parameter name="simDoTestBenchWiring" value="false" />
  837. <parameter name="simDrivenValue" value="0" />
  838. <parameter name="width" value="8" />
  839. </module>
  840. <module
  841. name="ram"
  842. kind="altera_avalon_onchip_memory2"
  843. version="21.1"
  844. enabled="1">
  845. <parameter name="allowInSystemMemoryContentEditor" value="false" />
  846. <parameter name="autoInitializationFileName" value="$${FILENAME}_ram" />
  847. <parameter name="blockType" value="AUTO" />
  848. <parameter name="copyInitFile" value="false" />
  849. <parameter name="dataWidth" value="32" />
  850. <parameter name="dataWidth2" value="32" />
  851. <parameter name="deviceFamily" value="Cyclone V" />
  852. <parameter name="deviceFeatures">COMPILER_SUPPORT 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 ANY_QFP 0 ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 HARDCOPY 0 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_18_BIT_MULTS 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IFP_USE_LEGACY_IO_CHECKER 1 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_BARE_DIE 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_JZ_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_SMI_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M144K_MEMORY 0 M10K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_MIGRATABLE 0 NOT_LISTED 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_POF 0 NO_PIN_OUT 0 NO_RPE_SUPPORT 0 NO_TDC_SUPPORT 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_CRC 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QMAP_IN_DEVELOPMENT 0 QFIT_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_OCT_AUTO_CALIBRATION 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1</parameter>
  853. <parameter name="dualPort" value="false" />
  854. <parameter name="ecc_enabled" value="false" />
  855. <parameter name="enPRInitMode" value="false" />
  856. <parameter name="enableDiffWidth" value="false" />
  857. <parameter name="initMemContent" value="true" />
  858. <parameter name="initializationFileName" value="onchip_mem.hex" />
  859. <parameter name="instanceID" value="NONE" />
  860. <parameter name="memorySize" value="131072" />
  861. <parameter name="readDuringWriteMode" value="DONT_CARE" />
  862. <parameter name="resetrequest_enabled" value="true" />
  863. <parameter name="simAllowMRAMContentsFile" value="false" />
  864. <parameter name="simMemInitOnlyFilename" value="0" />
  865. <parameter name="singleClockOperation" value="false" />
  866. <parameter name="slave1Latency" value="1" />
  867. <parameter name="slave2Latency" value="1" />
  868. <parameter name="useNonDefaultInitFile" value="false" />
  869. <parameter name="useShallowMemBlocks" value="false" />
  870. <parameter name="writable" value="true" />
  871. </module>
  872. <module
  873. name="rom"
  874. kind="altera_avalon_onchip_memory2"
  875. version="21.1"
  876. enabled="1">
  877. <parameter name="allowInSystemMemoryContentEditor" value="false" />
  878. <parameter name="autoInitializationFileName" value="$${FILENAME}_rom" />
  879. <parameter name="blockType" value="M10K" />
  880. <parameter name="copyInitFile" value="false" />
  881. <parameter name="dataWidth" value="32" />
  882. <parameter name="dataWidth2" value="32" />
  883. <parameter name="deviceFamily" value="Cyclone V" />
  884. <parameter name="deviceFeatures">COMPILER_SUPPORT 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 ANY_QFP 0 ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 HARDCOPY 0 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PDN_MODEL_STATUS 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_18_BIT_MULTS 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 IFP_USE_LEGACY_IO_CHECKER 1 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_BARE_DIE 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_JW_NEW_BINNING_PLAN 0 IS_JZ_NEW_BINNING_PLAN 0 IS_LOW_POWER_PART 0 IS_SMI_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_REVE_SILICON 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M144K_MEMORY 0 M10K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_MIGRATABLE 0 NOT_LISTED 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_POF 0 NO_PIN_OUT 0 NO_RPE_SUPPORT 0 NO_TDC_SUPPORT 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORT_HIGH_SPEED_HPS 0 SUPPORTS_1P0V_IOSTD 0 SUPPORTS_CRC 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_NEW_BINNING_PLAN 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QMAP_IN_DEVELOPMENT 0 QFIT_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_OCT_AUTO_CALIBRATION 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1</parameter>
  885. <parameter name="dualPort" value="false" />
  886. <parameter name="ecc_enabled" value="false" />
  887. <parameter name="enPRInitMode" value="false" />
  888. <parameter name="enableDiffWidth" value="false" />
  889. <parameter name="initMemContent" value="true" />
  890. <parameter name="initializationFileName" value="onchip_mem.hex" />
  891. <parameter name="instanceID" value="NONE" />
  892. <parameter name="memorySize" value="131072" />
  893. <parameter name="readDuringWriteMode" value="DONT_CARE" />
  894. <parameter name="resetrequest_enabled" value="true" />
  895. <parameter name="simAllowMRAMContentsFile" value="false" />
  896. <parameter name="simMemInitOnlyFilename" value="0" />
  897. <parameter name="singleClockOperation" value="false" />
  898. <parameter name="slave1Latency" value="1" />
  899. <parameter name="slave2Latency" value="1" />
  900. <parameter name="useNonDefaultInitFile" value="false" />
  901. <parameter name="useShallowMemBlocks" value="false" />
  902. <parameter name="writable" value="false" />
  903. </module>
  904. <module
  905. name="sysid"
  906. kind="altera_avalon_sysid_qsys"
  907. version="21.1"
  908. enabled="1">
  909. <parameter name="id" value="0" />
  910. </module>
  911. <module name="system" kind="clock_source" version="21.1" enabled="1">
  912. <parameter name="clockFrequency" value="200000000" />
  913. <parameter name="clockFrequencyKnown" value="true" />
  914. <parameter name="inputClockFrequency" value="0" />
  915. <parameter name="resetSynchronousEdges" value="DEASSERT" />
  916. </module>
  917. <connection
  918. kind="avalon"
  919. version="21.1"
  920. start="core.data_master"
  921. end="jtag_uart.avalon_jtag_slave">
  922. <parameter name="arbitrationPriority" value="1" />
  923. <parameter name="baseAddress" value="0x000613e8" />
  924. <parameter name="defaultConnection" value="false" />
  925. </connection>
  926. <connection
  927. kind="avalon"
  928. version="21.1"
  929. start="core.data_master"
  930. end="sysid.control_slave">
  931. <parameter name="arbitrationPriority" value="1" />
  932. <parameter name="baseAddress" value="0x000613e0" />
  933. <parameter name="defaultConnection" value="false" />
  934. </connection>
  935. <connection
  936. kind="avalon"
  937. version="21.1"
  938. start="core.data_master"
  939. end="hardware_timestamp.ctrl">
  940. <parameter name="arbitrationPriority" value="1" />
  941. <parameter name="baseAddress" value="0x00061380" />
  942. <parameter name="defaultConnection" value="false" />
  943. </connection>
  944. <connection
  945. kind="avalon"
  946. version="21.1"
  947. start="core.data_master"
  948. end="hardware_task_1.ctrl">
  949. <parameter name="arbitrationPriority" value="1" />
  950. <parameter name="baseAddress" value="0x00061340" />
  951. <parameter name="defaultConnection" value="false" />
  952. </connection>
  953. <connection
  954. kind="avalon"
  955. version="21.1"
  956. start="core.data_master"
  957. end="hardware_task_2.ctrl">
  958. <parameter name="arbitrationPriority" value="1" />
  959. <parameter name="baseAddress" value="0x00061300" />
  960. <parameter name="defaultConnection" value="false" />
  961. </connection>
  962. <connection
  963. kind="avalon"
  964. version="21.1"
  965. start="core.data_master"
  966. end="hardware_task_3.ctrl">
  967. <parameter name="arbitrationPriority" value="1" />
  968. <parameter name="baseAddress" value="0x000612c0" />
  969. <parameter name="defaultConnection" value="false" />
  970. </connection>
  971. <connection
  972. kind="avalon"
  973. version="21.1"
  974. start="core.data_master"
  975. end="hardware_task_4.ctrl">
  976. <parameter name="arbitrationPriority" value="1" />
  977. <parameter name="baseAddress" value="0x00061280" />
  978. <parameter name="defaultConnection" value="false" />
  979. </connection>
  980. <connection
  981. kind="avalon"
  982. version="21.1"
  983. start="core.data_master"
  984. end="hardware_task_5.ctrl">
  985. <parameter name="arbitrationPriority" value="1" />
  986. <parameter name="baseAddress" value="0x00061240" />
  987. <parameter name="defaultConnection" value="false" />
  988. </connection>
  989. <connection
  990. kind="avalon"
  991. version="21.1"
  992. start="core.data_master"
  993. end="hardware_task_6.ctrl">
  994. <parameter name="arbitrationPriority" value="1" />
  995. <parameter name="baseAddress" value="0x00061200" />
  996. <parameter name="defaultConnection" value="false" />
  997. </connection>
  998. <connection
  999. kind="avalon"
  1000. version="21.1"
  1001. start="core.data_master"
  1002. end="data_channel_0.ctrl">
  1003. <parameter name="arbitrationPriority" value="1" />
  1004. <parameter name="baseAddress" value="0x000611c0" />
  1005. <parameter name="defaultConnection" value="false" />
  1006. </connection>
  1007. <connection
  1008. kind="avalon"
  1009. version="21.1"
  1010. start="core.data_master"
  1011. end="data_channel_1.ctrl">
  1012. <parameter name="arbitrationPriority" value="1" />
  1013. <parameter name="baseAddress" value="0x00061180" />
  1014. <parameter name="defaultConnection" value="false" />
  1015. </connection>
  1016. <connection
  1017. kind="avalon"
  1018. version="21.1"
  1019. start="core.data_master"
  1020. end="data_channel_2.ctrl">
  1021. <parameter name="arbitrationPriority" value="1" />
  1022. <parameter name="baseAddress" value="0x00061140" />
  1023. <parameter name="defaultConnection" value="false" />
  1024. </connection>
  1025. <connection
  1026. kind="avalon"
  1027. version="21.1"
  1028. start="core.data_master"
  1029. end="data_channel_3.ctrl">
  1030. <parameter name="arbitrationPriority" value="1" />
  1031. <parameter name="baseAddress" value="0x00061100" />
  1032. <parameter name="defaultConnection" value="false" />
  1033. </connection>
  1034. <connection
  1035. kind="avalon"
  1036. version="21.1"
  1037. start="core.data_master"
  1038. end="data_channel_4.ctrl">
  1039. <parameter name="arbitrationPriority" value="1" />
  1040. <parameter name="baseAddress" value="0x000610c0" />
  1041. <parameter name="defaultConnection" value="false" />
  1042. </connection>
  1043. <connection
  1044. kind="avalon"
  1045. version="21.1"
  1046. start="core.data_master"
  1047. end="data_channel_5.ctrl">
  1048. <parameter name="arbitrationPriority" value="1" />
  1049. <parameter name="baseAddress" value="0x00061080" />
  1050. <parameter name="defaultConnection" value="false" />
  1051. </connection>
  1052. <connection
  1053. kind="avalon"
  1054. version="21.1"
  1055. start="core.data_master"
  1056. end="data_channel_6.ctrl">
  1057. <parameter name="arbitrationPriority" value="1" />
  1058. <parameter name="baseAddress" value="0x00061040" />
  1059. <parameter name="defaultConnection" value="false" />
  1060. </connection>
  1061. <connection
  1062. kind="avalon"
  1063. version="21.1"
  1064. start="core.data_master"
  1065. end="hardware_task_0.ctrl">
  1066. <parameter name="arbitrationPriority" value="1" />
  1067. <parameter name="baseAddress" value="0x00061000" />
  1068. <parameter name="defaultConnection" value="false" />
  1069. </connection>
  1070. <connection
  1071. kind="avalon"
  1072. version="21.1"
  1073. start="core.data_master"
  1074. end="core.debug_mem_slave">
  1075. <parameter name="arbitrationPriority" value="1" />
  1076. <parameter name="baseAddress" value="0x00060800" />
  1077. <parameter name="defaultConnection" value="false" />
  1078. </connection>
  1079. <connection kind="avalon" version="21.1" start="core.data_master" end="rom.s1">
  1080. <parameter name="arbitrationPriority" value="1" />
  1081. <parameter name="baseAddress" value="0x00040000" />
  1082. <parameter name="defaultConnection" value="false" />
  1083. </connection>
  1084. <connection
  1085. kind="avalon"
  1086. version="21.1"
  1087. start="core.data_master"
  1088. end="key_start.s1">
  1089. <parameter name="arbitrationPriority" value="1" />
  1090. <parameter name="baseAddress" value="0x000613d0" />
  1091. <parameter name="defaultConnection" value="false" />
  1092. </connection>
  1093. <connection kind="avalon" version="21.1" start="core.data_master" end="leds.s1">
  1094. <parameter name="arbitrationPriority" value="1" />
  1095. <parameter name="baseAddress" value="0x000613c0" />
  1096. <parameter name="defaultConnection" value="false" />
  1097. </connection>
  1098. <connection kind="avalon" version="21.1" start="core.data_master" end="ram.s1">
  1099. <parameter name="arbitrationPriority" value="1" />
  1100. <parameter name="baseAddress" value="0x00020000" />
  1101. <parameter name="defaultConnection" value="false" />
  1102. </connection>
  1103. <connection
  1104. kind="avalon"
  1105. version="21.1"
  1106. start="core.instruction_master"
  1107. end="core.debug_mem_slave">
  1108. <parameter name="arbitrationPriority" value="1" />
  1109. <parameter name="baseAddress" value="0x00060800" />
  1110. <parameter name="defaultConnection" value="false" />
  1111. </connection>
  1112. <connection
  1113. kind="avalon"
  1114. version="21.1"
  1115. start="core.instruction_master"
  1116. end="rom.s1">
  1117. <parameter name="arbitrationPriority" value="1" />
  1118. <parameter name="baseAddress" value="0x00040000" />
  1119. <parameter name="defaultConnection" value="false" />
  1120. </connection>
  1121. <connection kind="clock" version="21.1" start="system.clk" end="core.clk" />
  1122. <connection kind="clock" version="21.1" start="system.clk" end="jtag_uart.clk" />
  1123. <connection kind="clock" version="21.1" start="system.clk" end="sysid.clk" />
  1124. <connection kind="clock" version="21.1" start="system.clk" end="key_start.clk" />
  1125. <connection kind="clock" version="21.1" start="system.clk" end="leds.clk" />
  1126. <connection kind="clock" version="21.1" start="system.clk" end="rom.clk1" />
  1127. <connection kind="clock" version="21.1" start="system.clk" end="ram.clk1" />
  1128. <connection
  1129. kind="clock"
  1130. version="21.1"
  1131. start="system.clk"
  1132. end="hardware_timestamp.clock" />
  1133. <connection
  1134. kind="clock"
  1135. version="21.1"
  1136. start="system.clk"
  1137. end="hardware_task_1.clock" />
  1138. <connection
  1139. kind="clock"
  1140. version="21.1"
  1141. start="system.clk"
  1142. end="hardware_task_2.clock" />
  1143. <connection
  1144. kind="clock"
  1145. version="21.1"
  1146. start="system.clk"
  1147. end="hardware_task_3.clock" />
  1148. <connection
  1149. kind="clock"
  1150. version="21.1"
  1151. start="system.clk"
  1152. end="hardware_task_4.clock" />
  1153. <connection
  1154. kind="clock"
  1155. version="21.1"
  1156. start="system.clk"
  1157. end="hardware_task_5.clock" />
  1158. <connection
  1159. kind="clock"
  1160. version="21.1"
  1161. start="system.clk"
  1162. end="hardware_task_6.clock" />
  1163. <connection
  1164. kind="clock"
  1165. version="21.1"
  1166. start="system.clk"
  1167. end="data_channel_0.clock" />
  1168. <connection
  1169. kind="clock"
  1170. version="21.1"
  1171. start="system.clk"
  1172. end="data_channel_1.clock" />
  1173. <connection
  1174. kind="clock"
  1175. version="21.1"
  1176. start="system.clk"
  1177. end="data_channel_2.clock" />
  1178. <connection
  1179. kind="clock"
  1180. version="21.1"
  1181. start="system.clk"
  1182. end="data_channel_5.clock" />
  1183. <connection
  1184. kind="clock"
  1185. version="21.1"
  1186. start="system.clk"
  1187. end="data_channel_3.clock" />
  1188. <connection
  1189. kind="clock"
  1190. version="21.1"
  1191. start="system.clk"
  1192. end="data_channel_4.clock" />
  1193. <connection
  1194. kind="clock"
  1195. version="21.1"
  1196. start="system.clk"
  1197. end="data_channel_6.clock" />
  1198. <connection
  1199. kind="clock"
  1200. version="21.1"
  1201. start="system.clk"
  1202. end="hardware_task_0.clock" />
  1203. <connection kind="interrupt" version="21.1" start="core.irq" end="jtag_uart.irq">
  1204. <parameter name="irqNumber" value="0" />
  1205. </connection>
  1206. <connection kind="interrupt" version="21.1" start="core.irq" end="key_start.irq">
  1207. <parameter name="irqNumber" value="2" />
  1208. </connection>
  1209. <connection kind="reset" version="21.1" start="system.clk_reset" end="core.reset" />
  1210. <connection
  1211. kind="reset"
  1212. version="21.1"
  1213. start="system.clk_reset"
  1214. end="jtag_uart.reset" />
  1215. <connection
  1216. kind="reset"
  1217. version="21.1"
  1218. start="system.clk_reset"
  1219. end="sysid.reset" />
  1220. <connection
  1221. kind="reset"
  1222. version="21.1"
  1223. start="system.clk_reset"
  1224. end="key_start.reset" />
  1225. <connection kind="reset" version="21.1" start="system.clk_reset" end="leds.reset" />
  1226. <connection
  1227. kind="reset"
  1228. version="21.1"
  1229. start="system.clk_reset"
  1230. end="hardware_timestamp.reset" />
  1231. <connection
  1232. kind="reset"
  1233. version="21.1"
  1234. start="system.clk_reset"
  1235. end="hardware_task_1.reset" />
  1236. <connection
  1237. kind="reset"
  1238. version="21.1"
  1239. start="system.clk_reset"
  1240. end="hardware_task_2.reset" />
  1241. <connection
  1242. kind="reset"
  1243. version="21.1"
  1244. start="system.clk_reset"
  1245. end="hardware_task_3.reset" />
  1246. <connection
  1247. kind="reset"
  1248. version="21.1"
  1249. start="system.clk_reset"
  1250. end="hardware_task_4.reset" />
  1251. <connection
  1252. kind="reset"
  1253. version="21.1"
  1254. start="system.clk_reset"
  1255. end="hardware_task_5.reset" />
  1256. <connection
  1257. kind="reset"
  1258. version="21.1"
  1259. start="system.clk_reset"
  1260. end="hardware_task_6.reset" />
  1261. <connection
  1262. kind="reset"
  1263. version="21.1"
  1264. start="system.clk_reset"
  1265. end="data_channel_0.reset" />
  1266. <connection
  1267. kind="reset"
  1268. version="21.1"
  1269. start="system.clk_reset"
  1270. end="data_channel_1.reset" />
  1271. <connection
  1272. kind="reset"
  1273. version="21.1"
  1274. start="system.clk_reset"
  1275. end="data_channel_2.reset" />
  1276. <connection
  1277. kind="reset"
  1278. version="21.1"
  1279. start="system.clk_reset"
  1280. end="data_channel_5.reset" />
  1281. <connection
  1282. kind="reset"
  1283. version="21.1"
  1284. start="system.clk_reset"
  1285. end="data_channel_3.reset" />
  1286. <connection
  1287. kind="reset"
  1288. version="21.1"
  1289. start="system.clk_reset"
  1290. end="data_channel_4.reset" />
  1291. <connection
  1292. kind="reset"
  1293. version="21.1"
  1294. start="system.clk_reset"
  1295. end="data_channel_6.reset" />
  1296. <connection
  1297. kind="reset"
  1298. version="21.1"
  1299. start="system.clk_reset"
  1300. end="hardware_task_0.reset" />
  1301. <connection kind="reset" version="21.1" start="system.clk_reset" end="rom.reset1" />
  1302. <connection kind="reset" version="21.1" start="system.clk_reset" end="ram.reset1" />
  1303. <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
  1304. <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
  1305. <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
  1306. <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
  1307. </system>