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Lösung des Praktikums Systementwurf
2 Commits 1 Branch 0 Tags 275 KiB
VHDL 36.6%
C 17.5%
Verilog 15.1%
Python 10.8%
Makefile 8.3%
Other 11.7%
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leitnerti80244 73c4f491fd commit1
2024-01-09 08:49:42 +01:00
hardware commit1 2024-01-09 08:49:42 +01:00
software/signal_processing commit1 2024-01-09 08:49:42 +01:00
tests commit1 2024-01-09 08:49:42 +01:00
.gitignore Initial commit 2023-10-31 07:47:27 +01:00
data_channel_hw.tcl Initial commit 2023-10-31 07:47:27 +01:00
hardware_task_hw.tcl Initial commit 2023-10-31 07:47:27 +01:00
hardware_timestamp_hw.tcl Initial commit 2023-10-31 07:47:27 +01:00
hdl_sources.qsf Initial commit 2023-10-31 07:47:27 +01:00
init.sh Initial commit 2023-10-31 07:47:27 +01:00
Makefile Initial commit 2023-10-31 07:47:27 +01:00
niosII.qsys Initial commit 2023-10-31 07:47:27 +01:00
signal_processing.cdf Initial commit 2023-10-31 07:47:27 +01:00
signal_processing.qpf Initial commit 2023-10-31 07:47:27 +01:00
signal_processing.qsf Initial commit 2023-10-31 07:47:27 +01:00