Studentenversion des ESY6/A Praktikums "signal_processing".
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Makefile 1.2KB

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  1. verilog_srcs = \
  2. ../../../hardware/system/Butterfly.v \
  3. ../../../hardware/system/DelayBuffer.v \
  4. ../../../hardware/system/FFT1024_32B.v \
  5. ../../../hardware/system/Multiply.v \
  6. ../../../hardware/system/SdfUnit2.v \
  7. ../../../hardware/system/SdfUnit.v \
  8. ../../../hardware/system/Twiddle1024_32B.v \
  9. vhdl_srcs = \
  10. ../test_utility.vhd \
  11. ../../../hardware/system/reg32.vhd \
  12. ../../../hardware/system/avalon_slave.vhd \
  13. ../../../hardware/system/avalon_slave_transitions.vhd \
  14. ../../../hardware/system/task.vhd \
  15. ../../../hardware/system/hardware_task_control.vhd \
  16. ../../../hardware/system/hardware_task.vhd \
  17. ../../../hardware/system/float.vhd \
  18. ../../../hardware/system/squareRoot_pipe.vhd \
  19. ../../../hardware/system/fft_magnitude_calc.vhd \
  20. ../../../hardware/signal_processing/fft.vhd \
  21. ../../../hardware/system/task_fft.vhd \
  22. ../test_avalon_slave.vhd \
  23. ../test_hardware_task.vhd \
  24. ../../hardware/test_data_channel.vhd \
  25. ../../data/add_rand.vhd \
  26. ../../data/sine.vhd \
  27. ../../data/fft.vhd \
  28. test_task_fft.vhd \
  29. main = test_task_fft
  30. expected_data = ../../data/fft.py
  31. include ../data_tests.mk