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schmelzma80036 45ef215901 FPGA Software bearbeitet
2024-01-09 08:28:30 +01:00
hardware
FPGA Software bearbeitet
2024-01-09 08:28:30 +01:00
software/signal_processing
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tests
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.gitignore
Initial commit
2023-10-31 07:47:27 +01:00
data_channel_hw.tcl
Initial commit
2023-10-31 07:47:27 +01:00
hardware_task_hw.tcl
Initial commit
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hardware_timestamp_hw.tcl
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hdl_sources.qsf
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init.sh
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Makefile
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niosII.qsys
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signal_processing.cdf
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signal_processing.qpf
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signal_processing.qsf
Initial commit
2023-10-31 07:47:27 +01:00
Description
Studentenversion des ESY6/A Praktikums "signal_processing".
6.4 MiB
Languages
VHDL 34.3%
Python 17.3%
C 16%
Verilog 13.9%
Makefile 7.6%
Other 10.8%