schmidtsi76327/ESP8266_Treppenlicht
2
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

new matlab stateflow

Browse Source
This commit is contained in:
Simon Schmidt
2021-09-07 08:40:39 +02:00
parent 1686b9ea2a
commit 79e88d29c3
42 changed files with 1356 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/treppe/MatLabSrc/slprj/_jitprj/jitEngineAccessInfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_jitprj/s62r8ORs8TiuwKiY4lPlaeC.l
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_jitprj/s62r8ORs8TiuwKiY4lPlaeC.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/EMLReport/emlReportAccessInfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/EMLReport/s62r8ORs8TiuwKiY4lPlaeC.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/info/binfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/FSMTreppe_rtw.tlc
+49
View File
@@ -0,0 +1,49 @@
%implements "machineSource" "C"
%function CacheMachineDefinitions(block,system) void
%openfile tmpFcnBuf
%closefile tmpFcnBuf
%<SLibCacheCodeToFile("sf_machine_data_defn",tmpFcnBuf)>\
%endfunction
%function DumpMachineInitializer(block) Output
%openfile tmpFcnBuf
%closefile tmpFcnBuf
%if !WHITE_SPACE(tmpFcnBuf)
/* Machine initializer */
%<tmpFcnBuf>\
%endif
%endfunction
%function GlobalMachineInitializer(block) void
%openfile tmpFcnBuf
%<DumpMachineInitializer(block)>\
%closefile tmpFcnBuf
%return tmpFcnBuf
%endfunction %% GlobalMachineInitializer
%function DumpMachineTerminator(block) Output
%openfile tmpFcnBuf
%closefile tmpFcnBuf
%if !WHITE_SPACE(tmpFcnBuf)
/* Machine initializer */
%<tmpFcnBuf>\
%endif
%endfunction
%function GlobalMachineTerminator(block) void
%openfile tmpFcnBuf
%<DumpMachineTerminator(block)>\
%closefile tmpFcnBuf
%return tmpFcnBuf
%endfunction %% GlobalMachineTerminator
%function CacheMachineFunctions(block,system) void
%openfile tmpFcnBuf
%closefile tmpFcnBuf
%<SLibCacheCodeToFile("sf_machine_fcn_defn",tmpFcnBuf)>
%endfunction
lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/FSMTreppe_rtw.tlh
+40
View File
@@ -0,0 +1,40 @@
%implements "machineHeader" "C"
%function CacheOutputs(block,system) void
%assign srcFileName = SLibGetFullFileNameForSystemCode("sys_src_incl", system.SystemIdx)
%openfile typedefsBuf
%closefile typedefsBuf
%<SLibCacheCodeToFile("sf_machine_typedef",typedefsBuf)>
%if !WHITE_SPACE(typedefsBuf)
%<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_typedef"))>
%endif
%openfile definesBuf
%closefile definesBuf
%<SLibCacheCodeToFile("sf_machine_data_define",definesBuf)>
%if !WHITE_SPACE(definesBuf)
%<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_data_define"))>
%endif
%openfile externDataBuf
%closefile externDataBuf
%<SLibCacheCodeToFile("sf_machine_extern_data_decl",externDataBuf)>
%if !WHITE_SPACE(externDataBuf)
%<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_extern_data_decl"))>
%endif
%openfile externDataBuf
%closefile externDataBuf
%<SLibCacheCodeToFile("sf_machine_public_extern_data_decl",externDataBuf)>
%if !WHITE_SPACE(externDataBuf)
%<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_public_extern_data_decl"))>
%endif
%openfile externDataBuf
%closefile externDataBuf
%<SLibCacheCodeToFile("sf_machine_extern_fcn_decl",externDataBuf)>
%if !WHITE_SPACE(externDataBuf)
%<SLibUpdateHeadersNeededByFile(srcFileName, SLibGetFullFileNameForCode("sf_machine_extern_fcn_decl"))>
%endif
%endfunction %% CacheOutputs
lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/c3_FSMTreppe.tlc
+39
View File
@@ -0,0 +1,39 @@
%implements "chartSource" "C"
%function ChartConfig(block, system) void
%createrecord chartConfiguration { ...
executeAtInitialization 0 ...
}
%return chartConfiguration
%endfunction
%function ChartDataMap(block, system) void
%createrecord ChartDataElements {\
NumChartData 3 \
ChartDataDefaults {\
RecordType "ChartData"\
Dimensions []\
IsTestPoint 0\
}\
ChartData {\
Name "is_active_c3_FSMTreppe"\
Description "StateIsActive"\
SFName ""\
Path ""\
SrcLocation ""\
}\
ChartData {\
Name "is_c3_FSMTreppe"\
Description "StateActiveChild"\
SFName ""\
Path ""\
SrcLocation ""\
}\
ChartData {\
Name "temporalCounter_i1"\
Description "TemporalCounter"\
SFName ""\
Path ""\
SrcLocation ""\
}\
}
%return ChartDataElements
%endfunction
lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/_self/rtw/ert/src/c3_FSMTreppe.tlh
+1
View File
@@ -0,0 +1 @@
lib/treppe/MatLabSrc/slprj/_sfprj/FSMTreppe/amsi_serial.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/FSM_Treppenlicht/_self/sfun/info/binfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/FSM_Treppenlicht/amsi_serial.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/precompile/5mkYfJPJFCoVR8Qe9OKnoB.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/precompile/TS7lYJ3wbcBCr2re7tkJjE.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/_sfprj/precompile/autoInferAccessInfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/ert/FSMTreppe/tmwinternal/CompileInfo.xml
+368
View File
@@ -0,0 +1,368 @@
<?xml version="1.0" encoding="UTF-8"?>
<MF0 version="1.1" packageUris="http://schema.mathworks.com/mf0/ci/19700101 http://schema.mathworks.com/mf0/sl_modelref_info/R2021a http://schema.mathworks.com/mf0/slexec_mm_sto/R2021a_202007071525">
<ModelRefInfoRepo.ModelRefInfoRoot type="ModelRefInfoRepo.ModelRefInfoRoot" uuid="7555d04e-b2fe-446f-9fe1-318583822c6f">
<autoSolverStatusFlags>327</autoSolverStatusFlags>
<childModelRefInfo type="ModelRefInfoRepo.ChildModelRefInfo" uuid="03f2a4ea-5cb0-4e3f-90a0-dd0e1805a761">
<modelName>FSMTreppe</modelName>
<modelPath>FSMTreppe</modelPath>
</childModelRefInfo>
<dataTransferInfos>AAFJTQAAAAAOAAAAOAAAAAYAAAAIAAAAAgAAAAAAAAAFAAAACAAAAAAAAAABAAAAAQAAAAAAAAAFAAQAAQAAAAEAAAAAAAAA</dataTransferInfos>
<fundamentalSampleTimePeriod>.01</fundamentalSampleTimePeriod>
<hasBlockWithPeriodicDiscreteSampleTime>true</hasBlockWithPeriodicDiscreteSampleTime>
<hasBwsAccessed>true</hasBwsAccessed>
<hasBwsAccessedByAnyModel>true</hasBwsAccessedByAnyModel>
<hasStatesModifiedInOutputUpdate>true</hasStatesModifiedInOutputUpdate>
<inports type="ModelRefInfoRepo.InportInformation" uuid="96dc434b-7559-48bc-809e-c4e76148958a">
<isNotDerivPort>true</isNotDerivPort>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<indexType>2</indexType>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="b7c3a0c2-0424-4f2c-ad98-6946e41cc9c6"/>
</inports>
<inports type="ModelRefInfoRepo.InportInformation" uuid="b6a4a316-d1eb-44ef-b08e-641a6afda1e1">
<isNotDerivPort>true</isNotDerivPort>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<indexType>2</indexType>
<originalPortNumber>1</originalPortNumber>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="418561e6-ffb5-470a-90d9-f15eff4f4f30"/>
</inports>
<inports type="ModelRefInfoRepo.InportInformation" uuid="3aa6343e-6d39-42af-9615-9947972bdfcd">
<isNotDerivPort>true</isNotDerivPort>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<indexType>2</indexType>
<originalPortNumber>2</originalPortNumber>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="1b16866b-129a-4603-9f13-4830178f2710"/>
</inports>
<inports type="ModelRefInfoRepo.InportInformation" uuid="bffcdc1c-176a-4f58-b0cc-c190848613c0">
<isNotDerivPort>true</isNotDerivPort>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<indexType>2</indexType>
<originalPortNumber>3</originalPortNumber>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="44a75dc2-a909-4071-8714-05eeb6859d93"/>
</inports>
<inports type="ModelRefInfoRepo.InportInformation" uuid="0c897dc9-dc8f-4173-b90a-dc2578d10b7c">
<isNotDerivPort>true</isNotDerivPort>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<indexType>2</indexType>
<originalPortNumber>4</originalPortNumber>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="d5424f81-ff3d-4ba3-8e39-3f31745085c5"/>
</inports>
<isBdInSimModeForSimCodegenVariants>false</isBdInSimModeForSimCodegenVariants>
<isInlineParamsOn>true</isInlineParamsOn>
<isOrigInportVirtualBus>false</isOrigInportVirtualBus>
<isOrigInportVirtualBus>false</isOrigInportVirtualBus>
<isOrigInportVirtualBus>false</isOrigInportVirtualBus>
<isOrigInportVirtualBus>false</isOrigInportVirtualBus>
<isOrigInportVirtualBus>false</isOrigInportVirtualBus>
<isOrigOutportVirtualBus>false</isOrigOutportVirtualBus>
<isOrigOutportVirtualBus>false</isOrigOutportVirtualBus>
<isOrigOutportVirtualBus>false</isOrigOutportVirtualBus>
<loggingSaveFormat>2</loggingSaveFormat>
<maxFreqHz>-1.0</maxFreqHz>
<numDataInputPorts>5</numDataInputPorts>
<numLoggableJacobianDStates>0</numLoggableJacobianDStates>
<origInportBusType></origInportBusType>
<origInportBusType></origInportBusType>
<origInportBusType></origInportBusType>
<origInportBusType></origInportBusType>
<origInportBusType></origInportBusType>
<origOutportBusOutputAsStruct>false</origOutportBusOutputAsStruct>
<origOutportBusOutputAsStruct>false</origOutportBusOutputAsStruct>
<origOutportBusOutputAsStruct>false</origOutportBusOutputAsStruct>
<origOutportBusType></origOutportBusType>
<origOutportBusType></origOutportBusType>
<origOutportBusType></origOutportBusType>
<outports type="ModelRefInfoRepo.OutportInformation" uuid="10253844-4a79-4779-8d8d-a5ec80db828b">
<hasSystemInitMethod>true</hasSystemInitMethod>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="52063b6d-7cc4-4c8b-8d92-d1715afbe8e2"/>
</outports>
<outports type="ModelRefInfoRepo.OutportInformation" uuid="11796f98-a0b7-4eb0-b64e-49bf2ffe978d">
<hasSystemInitMethod>true</hasSystemInitMethod>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<originalPortNumber>1</originalPortNumber>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="21f58345-79e5-4411-9eef-d114196a5e0e"/>
</outports>
<outports type="ModelRefInfoRepo.OutportInformation" uuid="f8910c79-7cff-4166-b02d-97bf6428b343">
<hasSystemInitMethod>true</hasSystemInitMethod>
<designMax>Inf</designMax>
<designMin>-Inf</designMin>
<originalPortNumber>2</originalPortNumber>
<rateInfo type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</rateInfo>
<resolvedSignalObject></resolvedSignalObject>
<sigNameToEMVCEMap type="ModelRefInfoRepo.SigNameEMVCEInfo" uuid="c2674bf4-ac65-4b69-823e-fac5a85b7dc0"/>
</outports>
<removeResetFunc>true</removeResetFunc>
<runtimeNonFcnCallRateInfos type="ModelRefInfoRepo.RateInfo">
<compiled>true</compiled>
<nonFcnCallPartitionName>D1</nonFcnCallPartitionName>
<period>.01</period>
<priority>40</priority>
<rateIdx>0</rateIdx>
</runtimeNonFcnCallRateInfos>
<sampleTimeInheritanceRule>2</sampleTimeInheritanceRule>
<timingAndTaskingRegistry>&lt;?xml version=&quot;1.0&quot;?&gt;
&lt;slexec_sto version=&quot;1.1&quot; packageUris=&quot;http://schema.mathworks.com/mf0/slexec_mm_sto/R2021a_202007071525&quot;&gt;
&lt;sto.Registry type=&quot;sto.Registry&quot; uuid=&quot;ba7c0a74-67aa-483e-8150-1c7f77bd4db1&quot;&gt;
&lt;clocks type=&quot;sto.Timer&quot; uuid=&quot;588e59c8-3f1f-47d4-8b44-94c98d3a35a5&quot;&gt;
&lt;computedFundamentalDiscretePeriod&gt;.01&lt;/computedFundamentalDiscretePeriod&gt;
&lt;resolution&gt;.01&lt;/resolution&gt;
&lt;clockTickConstraint&gt;PeriodicWithFixedResolution&lt;/clockTickConstraint&gt;
&lt;specifiedTaskingMode&gt;ClassicMultiTasking&lt;/specifiedTaskingMode&gt;
&lt;timeAdvanceMode&gt;FixedStep&lt;/timeAdvanceMode&gt;
&lt;clockDomain type=&quot;sto.ClockDomain&quot; uuid=&quot;5f4d6ed0-4e4d-479f-9712-7cf4da42ed97&quot;&gt;
&lt;baseTaskID&gt;_task0&lt;/baseTaskID&gt;
&lt;rates type=&quot;sto.Rate&quot; uuid=&quot;d24609d5-a5fb-4db3-9540-ed0b011f0b3a&quot;/&gt;
&lt;rootTaskHierarchyElements type=&quot;sto.Task&quot; uuid=&quot;29015274-7e5f-4a50-819e-621bfb182f06&quot;&gt;
&lt;isExecutable&gt;true&lt;/isExecutable&gt;
&lt;orderIndex&gt;1&lt;/orderIndex&gt;
&lt;rates type=&quot;sto.Rate&quot; uuid=&quot;d24609d5-a5fb-4db3-9540-ed0b011f0b3a&quot;&gt;
&lt;annotation&gt;D1&lt;/annotation&gt;
&lt;colorIndex&gt;2&lt;/colorIndex&gt;
&lt;description&gt;Discrete 1&lt;/description&gt;
&lt;eventSourceType&gt;UNSPECIFIED_EVENT_SOURCE&lt;/eventSourceType&gt;
&lt;registry type=&quot;sto.Registry&quot; uuid=&quot;ba7c0a74-67aa-483e-8150-1c7f77bd4db1&quot;/&gt;
&lt;taskId&gt;_task0&lt;/taskId&gt;
&lt;rateSpec type=&quot;sto.RateSpec&quot; uuid=&quot;3191e5c3-988f-4441-8cc9-a9d20920c22d&quot;&gt;
&lt;period&gt;.01&lt;/period&gt;
&lt;rateType&gt;ClassicPeriodicDiscrete&lt;/rateType&gt;
&lt;/rateSpec&gt;
&lt;/rates&gt;
&lt;elementType&gt;Task&lt;/elementType&gt;
&lt;identifier&gt;_task0&lt;/identifier&gt;
&lt;priority&gt;40&lt;/priority&gt;
&lt;/rootTaskHierarchyElements&gt;
&lt;/clockDomain&gt;
&lt;/clocks&gt;
&lt;executionSpec&gt;Undetermined&lt;/executionSpec&gt;
&lt;taskDependencyGraph type=&quot;sto.SerializedTaskConnectionList&quot; uuid=&quot;ee1864fc-d534-42ce-aec5-7292148af732&quot;&gt;
&lt;taskIdentifier&gt;_task0&lt;/taskIdentifier&gt;
&lt;/taskDependencyGraph&gt;
&lt;taskPriorityDirection&gt;HighNumberLast&lt;/taskPriorityDirection&gt;
&lt;taskingMode&gt;ClassicMultiTasking&lt;/taskingMode&gt;
&lt;tasks type=&quot;sto.Task&quot; uuid=&quot;29015274-7e5f-4a50-819e-621bfb182f06&quot;/&gt;
&lt;timeAdvanceMode&gt;FixedStep&lt;/timeAdvanceMode&gt;
&lt;/sto.Registry&gt;
&lt;/slexec_sto&gt;</timingAndTaskingRegistry>
<zeroInternalMemoryAtStartupUnchecked>true</zeroInternalMemoryAtStartupUnchecked>
<FMUBlockMap type="ModelRefInfoRepo.FMUBlockInfo" uuid="2dd4025f-9351-4e7c-9074-0e7aa39cdf36"/>
<codeGenInfo type="ModelRefInfoRepo.CodeGenInformation" uuid="2e133251-5287-43b2-9b4a-5389aafb25f2"/>
<configSettingsForConsistencyChecks type="ModelRefInfoRepo.ConfigSettingsForConsistencyChecks" uuid="6546012e-563f-4082-866c-56b3b4442d30">
<consistentOutportInitialization>true</consistentOutportInitialization>
<fixedStepSize>.01</fixedStepSize>
<hasHybridSampleTime>true</hasHybridSampleTime>
<optimizedInitCode>true</optimizedInitCode>
<signalLoggingSaveFormat>2</signalLoggingSaveFormat>
<simSIMDOptimization>1</simSIMDOptimization>
<solverName>FixedStepDiscrete</solverName>
<solverType>SOLVER_TYPE_FIXEDSTEP</solverType>
<hardwareSettings type="ModelRefInfoRepo.HardwareSettings" uuid="eb5a4b10-25e9-40c6-bb62-c40e4583ea06">
<prodBitPerChar>8</prodBitPerChar>
<prodBitPerDouble>64</prodBitPerDouble>
<prodBitPerFloat>32</prodBitPerFloat>
<prodBitPerInt>32</prodBitPerInt>
<prodBitPerLong>32</prodBitPerLong>
<prodBitPerLongLong>64</prodBitPerLongLong>
<prodBitPerPointer>32</prodBitPerPointer>
<prodBitPerPtrDiffT>32</prodBitPerPtrDiffT>
<prodBitPerShort>16</prodBitPerShort>
<prodBitPerSizeT>32</prodBitPerSizeT>
<prodEndianess>1</prodEndianess>
<prodLargestAtomicFloat>1</prodLargestAtomicFloat>
<prodLargestAtomicInteger>3</prodLargestAtomicInteger>
<prodShiftRight>true</prodShiftRight>
<prodWordSize>32</prodWordSize>
</hardwareSettings>
</configSettingsForConsistencyChecks>
<controllableInputRatesMap type="ModelRefInfoRepo.VarTsUIDMap" uuid="e700b233-60b9-4bae-a176-4252a98ea9df"/>
<controllableOutputRatesMap type="ModelRefInfoRepo.VarTsUIDMap" uuid="d6389860-36b9-4d36-ab76-159980d60dc2"/>
<dataPortGroup type="ModelRefInfoRepo.DataPortGroup" uuid="0f8667e7-fe6e-4660-a547-82a75ba80f86">
<compDataInputPorts>0</compDataInputPorts>
<compDataInputPorts>1</compDataInputPorts>
<compDataInputPorts>2</compDataInputPorts>
<compDataInputPorts>3</compDataInputPorts>
<compDataInputPorts>4</compDataInputPorts>
<compDataOutputPorts>0</compDataOutputPorts>
<compDataOutputPorts>1</compDataOutputPorts>
<compDataOutputPorts>2</compDataOutputPorts>
<dataInputPorts>0</dataInputPorts>
<dataInputPorts>1</dataInputPorts>
<dataInputPorts>2</dataInputPorts>
<dataInputPorts>3</dataInputPorts>
<dataInputPorts>4</dataInputPorts>
<dataOutputPorts>0</dataOutputPorts>
<dataOutputPorts>1</dataOutputPorts>
<dataOutputPorts>2</dataOutputPorts>
</dataPortGroup>
<expFcnUnconnectedDataPortGroup type="ModelRefInfoRepo.DataPortGroup" uuid="54f645f4-7048-4a7a-bdba-987f462f9049"/>
<interfaceParameterInfo type="ModelRefInfoRepo.InterfaceParameterInfo" uuid="f3ffe881-fe0f-4380-b6d4-fc2904df6735"/>
<messageInfo type="ModelRefInfoRepo.MessageInformation" uuid="417f8bab-9c4c-43fe-bb6c-a5fa82a05f7d"/>
<methodInfo type="ModelRefInfoRepo.MethodExistenceInfo" uuid="1742a0ba-e6d5-4884-aeac-07757b6c68df">
<hasEnableMethod>true</hasEnableMethod>
<hasSystemInitializeMethod>true</hasSystemInitializeMethod>
<hasSystemResetMethod>true</hasSystemResetMethod>
<hasTerminateMethod>true</hasTerminateMethod>
</methodInfo>
<periodicEventPortUnsupportedBlockInfo type="ModelRefInfoRepo.PeriodicEventPortUnsupportedBlockInfo" uuid="ac9bb6a2-0700-4ee3-9008-5e19e55c5010"/>
<portGroupsRequireSameRate type="ModelRefInfoRepo.PortGroupsRequireSameRate" uuid="ece8d6c3-f133-445b-a473-3082ea4d0485">
<DSMPortGroups type="ModelRefInfoRepo.NameToPortGroupIdxVectMap" uuid="55bbc064-14a3-480d-b127-7ab64cafc98e"/>
<GlobalDSMPortGroups type="ModelRefInfoRepo.NameToPortGroupIdxVectMap" uuid="be54cdd0-e105-46b0-91c1-fb6def8fc679"/>
<mergedPortGroups type="ModelRefInfoRepo.NameToPortGroupIdxVectMap" uuid="1833b1af-1f19-40ab-84c0-7bccd46c9745"/>
</portGroupsRequireSameRate>
<rateBasedMdlGlobalDSMRateSpec type="ModelRefInfoRepo.GlobalDSMRateSpecMap" uuid="ffb0ca00-9662-40c0-84da-e487c5dc546e"/>
<rateSpecOfGlobalDSMAccessedByDescExpFcnMdlMap type="ModelRefInfoRepo.GlobalDSMRateSpecMap" uuid="eca8ad4f-0c38-46d9-9832-66b8d77ec8cb"/>
<rootBlockDiagramInterface type="ci.Model" uuid="a83d0372-6504-4aff-bc66-ef8bd8998783">
<p_RootComponentInterface type="ci.ComponentInterface" uuid="bda18f0d-f088-4d3e-9118-5ec3e1f6d2b0">
<p_InputPorts type="ci.SignalInterface" uuid="b99a5f21-4128-4029-938f-6ee457b0f36d">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_InputPorts>
<p_InputPorts type="ci.SignalInterface" uuid="6a5be651-5127-4b00-b1fe-7f037b420f72">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_InputPorts>
<p_InputPorts type="ci.SignalInterface" uuid="8786dad2-1d32-4804-bb88-db269c473b9e">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_InputPorts>
<p_InputPorts type="ci.SignalInterface" uuid="5b5c02c6-c37a-4d51-8f0e-5bf15e0a817d">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_InputPorts>
<p_InputPorts type="ci.SignalInterface" uuid="1f3758be-eeec-4263-8ac9-55386a85f6f2">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
</p_InputPorts>
<p_Name>FSMTreppe</p_Name>
<p_OutputPorts type="ci.SignalInterface" uuid="b7ae01fb-67a8-499e-8dfb-a34ae83e9536">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_OutputPorts>
<p_OutputPorts type="ci.SignalInterface" uuid="3ba52f46-b991-4ffc-bbc2-dabf9138da2f">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_OutputPorts>
<p_OutputPorts type="ci.SignalInterface" uuid="2c8a0fdf-a813-4a6c-90ed-616b12e0372f">
<p_ComputedNumericDimensions>1.0</p_ComputedNumericDimensions>
<p_ComputedSampleTime>.01</p_ComputedSampleTime>
<p_ComputedSampleTime>0.0</p_ComputedSampleTime>
<p_ComputedSymbolicDimensions>inherit</p_ComputedSymbolicDimensions>
<p_ComputedType>uint32</p_ComputedType>
</p_OutputPorts>
<p_Type>ROOT</p_Type>
</p_RootComponentInterface>
</rootBlockDiagramInterface>
<simulinkFunctions type="ModelRefInfoRepo.SimulinkFunctions" uuid="51f47d31-bf69-45c2-9925-aa1697244457">
<compSimulinkFunctionCatalog></compSimulinkFunctionCatalog>
</simulinkFunctions>
<stateWriterToOwnerMap type="ModelRefInfoRepo.StateWriterInfo" uuid="a88190c0-15f9-4e52-a6ab-81ddfb811279"/>
<stoClientDataRegistry type="sto.ClientDataRegistry" uuid="2c8ac090-591a-44b7-9b7a-a7ac062c172d">
<dataSets type="sto.ClientClockNamedDataSet" uuid="5b0a4d1d-030d-4f88-9e9e-3e12190e42db">
<tag>sltpEvents</tag>
</dataSets>
<dataSets type="sto.ClientTaskHierarchyElementNamedDataSet" uuid="2d7a8ed4-f0bd-4eab-b498-23b0dbedc489">
<tag>sltpTaskGroups</tag>
</dataSets>
<dataSets type="sto.ClientTaskHierarchyElementNamedDataSet" uuid="c135ba12-cf4d-4052-8821-1c8c3030ce09">
<dSet type="ModelRefInfoRepo.SltpTaskData" uuid="d63284be-885e-4fb9-8db1-d89efe1107d9"/>
<tSet type="ModelRefInfoRepo.SltpTaskData" uuid="d63284be-885e-4fb9-8db1-d89efe1107d9">
<dataName>D1</dataName>
<linkedSet type="sto.ClientTaskHierarchyElementNamedDataSet" uuid="c135ba12-cf4d-4052-8821-1c8c3030ce09"/>
<id type="sto.TaskHierarchyElementId">
<id>_task0</id>
</id>
</tSet>
<tag>sltpTasks</tag>
</dataSets>
</stoClientDataRegistry>
<varTsUIDMap type="ModelRefInfoRepo.VarTsUIDMap" uuid="f0b6a5ce-69cc-4e9c-87e1-435ad3c8bcb8"/>
</ModelRefInfoRepo.ModelRefInfoRoot>
</MF0>
lib/treppe/MatLabSrc/slprj/ert/FSMTreppe/tmwinternal/binfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/ert/FSMTreppe/tmwinternal/minfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/ert/FSMTreppe/tmwinternal/scv
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/ert/FSM_Treppenlicht/tmwinternal/sinfo.mat
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/ert/_sharedutils/shared_file.dmr
BIN
View File
Binary file not shown.
lib/treppe/MatLabSrc/slprj/sl_proj.tmw
+2
View File
@@ -0,0 +1,2 @@
Simulink Coder project marker file. Please don't change it.
slprjVersion: 10.3_086