Verwendeter Programmcode in Studienarbeit für ESY1B zum Thema "Verifikation mit SystemVerilog und Python"
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- # cocotb setup
- MODULE = test
- TOPLEVEL = top
- VERILOG_SOURCES = top.v filter.v
-
- include $(shell cocotb-config --makefiles)/Makefile.sim
-
- # filters exported by pyfda always have module name set to top
- filter.v:
- sed -i 's/top/filter/' $@
-
- .PHONY: filter.v
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