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- /////////////////////////////////////////////////////////////////////
- //// ////
- //// WISHBONE rev.B2 compliant I2C Master controller defines ////
- //// ////
- //// ////
- //// Author: Richard Herveille ////
- //// richard@asics.ws ////
- //// www.asics.ws ////
- //// ////
- //// Downloaded from: http://www.opencores.org/projects/i2c/ ////
- //// ////
- /////////////////////////////////////////////////////////////////////
- //// ////
- //// Copyright (C) 2001 Richard Herveille ////
- //// richard@asics.ws ////
- //// ////
- //// This source file may be used and distributed without ////
- //// restriction provided that this copyright statement is not ////
- //// removed from the file and that any derivative work contains ////
- //// the original copyright notice and the associated disclaimer.////
- //// ////
- //// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
- //// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
- //// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
- //// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
- //// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
- //// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
- //// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
- //// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
- //// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
- //// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
- //// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
- //// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
- //// POSSIBILITY OF SUCH DAMAGE. ////
- //// ////
- /////////////////////////////////////////////////////////////////////
-
- // CVS Log
- //
- // $Id: i2c_master_defines.v,v 1.1 2008-11-08 13:15:10 sfielding Exp $
- //
- // $Date: 2008-11-08 13:15:10 $
- // $Revision: 1.1 $
- // $Author: sfielding $
- // $Locker: $
- // $State: Exp $
- //
- // Change History:
- // $Log: not supported by cvs2svn $
- // Revision 1.3 2001/11/05 11:59:25 rherveille
- // Fixed wb_ack_o generation bug.
- // Fixed bug in the byte_controller statemachine.
- // Added headers.
- //
-
-
- // I2C registers wishbone addresses
-
- // bitcontroller states
- `define I2C_CMD_NOP 4'b0000
- `define I2C_CMD_START 4'b0001
- `define I2C_CMD_STOP 4'b0010
- `define I2C_CMD_WRITE 4'b0100
- `define I2C_CMD_READ 4'b1000
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