Verwendeter Programmcode in Studienarbeit für ESY1B zum Thema "Verifikation mit SystemVerilog und Python"
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- [submodule "7Segment_Lattice_ice40_UltraPlus"]
- path = 7Segment_Lattice_ice40_UltraPlus
- url = https://git.efi.th-nuernberg.de/gitea/schmidtsi76327/7Segment_Lattice_ice40_UltraPlus
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