RTC funktionierende Version, sunset und sunrise calc, sleepMode
This commit is contained in:
parent
9c371b9469
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186
RTC/.cproject
186
RTC/.cproject
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<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.777107754" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1250781907" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1964362684" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.593178747" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.556394896" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.118701493" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.786708453" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.588963565" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1843665460" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.962553946" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
@ -79,8 +79,8 @@
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1538309514">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1538309514" moduleId="org.eclipse.cdt.core.settings" name="Release">
|
||||
<cconfiguration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.385784560">
|
||||
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.385784560" moduleId="org.eclipse.cdt.core.settings" name="Release">
|
||||
<externalSettings/>
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||||
<extensions>
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||||
<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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||||
@ -92,60 +92,60 @@
|
||||
</extensions>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler.1493213666" name="MCU GCC Assembler" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.assembler">
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|
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|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.1098080322" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker">
|
||||
<option id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script.1048910277" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.option.script" value="${workspace_loc:/${ProjName}/STM32L152RETX_FLASH.ld}" valueType="string"/>
|
||||
</tool>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.849698428" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.678732137" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1128628815" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2106576238" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.1234214048" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.944961443" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1757677614" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.1704181090" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker.3502542" name="MCU G++ Linker" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.cpp.linker"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver.1140116331" name="MCU GCC Archiver" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.archiver"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size.1884069372" name="MCU Size" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.size"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile.1179424536" name="MCU Output Converter list file" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objdump.listfile"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex.2052295902" name="MCU Output Converter Hex" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.hex"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary.168071366" name="MCU Output Converter Binary" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.binary"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog.824998438" name="MCU Output Converter Verilog" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.verilog"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec.1836975100" name="MCU Output Converter Motorola S-rec" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.srec"/>
|
||||
<tool id="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec.893802430" name="MCU Output Converter Motorola S-rec with symbols" superClass="com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.objcopy.symbolsrec"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
@ -157,18 +157,20 @@
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.pathentry"/>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="RTC.null.1751093273" name="RTC"/>
|
||||
<project id="RTC.null.523640061" name="RTC"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1078064700;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1078064700.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1469945775;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1718963642">
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.385784560;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.385784560.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.1947899920;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.1583488033">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1538309514;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1538309514.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.392507472;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.98170692">
|
||||
<scannerConfigBuildInfo instanceId="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.384503242;com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.384503242.;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.620268744;com.st.stm32cube.ide.mcu.gnu.managedbuild.tool.c.compiler.input.c.656117430">
|
||||
<autodiscovery enabled="false" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
<storageModule moduleId="refreshScope"/>
|
||||
</cproject>
|
||||
|
||||
@ -1,25 +1,25 @@
|
||||
[PreviousLibFiles]
|
||||
LibFiles=Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
|
||||
LibFiles=Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h;Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h;Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
|
||||
|
||||
[PreviousUsedCubeIDEFiles]
|
||||
SourceFiles=Core\Src\main.c;Core\Src\stm32l1xx_it.c;Core\Src\stm32l1xx_hal_msp.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Core\Src/system_stm32l1xx.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Core\Src/system_stm32l1xx.c;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;;
|
||||
HeaderPath=Drivers\STM32L1xx_HAL_Driver\Inc;Drivers\STM32L1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32L1xx\Include;Drivers\CMSIS\Include;Core\Inc;
|
||||
CDefines=USE_HAL_DRIVER;STM32L152xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
|
||||
SourceFiles=Core\Src\main.c;Core\Src\stm32f4xx_it.c;Core\Src\stm32f4xx_hal_msp.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Core\Src/system_stm32f4xx.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;Core\Src/system_stm32f4xx.c;Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;;
|
||||
HeaderPath=Drivers\STM32F4xx_HAL_Driver\Inc;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32F4xx\Include;Drivers\CMSIS\Include;Core\Inc;
|
||||
CDefines=USE_HAL_DRIVER;STM32F401xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
|
||||
|
||||
[PreviousGenFiles]
|
||||
AdvancedFolderStructure=true
|
||||
HeaderFileListSize=3
|
||||
HeaderFiles#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Inc/stm32l1xx_it.h
|
||||
HeaderFiles#1=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Inc/stm32l1xx_hal_conf.h
|
||||
HeaderFiles#2=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Inc/main.h
|
||||
HeaderFiles#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Inc/stm32f4xx_it.h
|
||||
HeaderFiles#1=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Inc/stm32f4xx_hal_conf.h
|
||||
HeaderFiles#2=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Inc/main.h
|
||||
HeaderFolderListSize=1
|
||||
HeaderPath#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Inc
|
||||
HeaderPath#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Inc
|
||||
HeaderFiles=;
|
||||
SourceFileListSize=3
|
||||
SourceFiles#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Src/stm32l1xx_it.c
|
||||
SourceFiles#1=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Src/stm32l1xx_hal_msp.c
|
||||
SourceFiles#2=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Src/main.c
|
||||
SourceFiles#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Src/stm32f4xx_it.c
|
||||
SourceFiles#1=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Src/stm32f4xx_hal_msp.c
|
||||
SourceFiles#2=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Src/main.c
|
||||
SourceFolderListSize=1
|
||||
SourcePath#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace_Solar_Panel/RTC/Core/Src
|
||||
SourcePath#0=C:/Users/Gregor/Desktop/Projektarbeit/Workspace/RTC/Core/Src
|
||||
SourceFiles=;
|
||||
|
||||
|
||||
@ -1,24 +1,24 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1078064700" name="Debug">
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.384503242" name="Debug">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1820377315000236033" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1184388612868920188" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.1538309514" name="Release">
|
||||
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.release.385784560" name="Release">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser"/>
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="1820377315000236033" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<provider class="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" console="false" env-hash="-1184388612868920188" id="com.st.stm32cube.ide.mcu.toolchain.armnone.setup.CrossBuiltinSpecsDetector" keep-relative-paths="false" name="MCU ARM GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
@ -28,7 +28,7 @@ extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal.h"
|
||||
#include "stm32f4xx_hal.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
@ -1,335 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_conf.h
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_HAL_CONF_H
|
||||
#define __STM32L1xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_COMP_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
/*#define HAL_DAC_MODULE_ENABLED */
|
||||
/*#define HAL_I2C_MODULE_ENABLED */
|
||||
/*#define HAL_I2S_MODULE_ENABLED */
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
/*#define HAL_LCD_MODULE_ENABLED */
|
||||
/*#define HAL_NOR_MODULE_ENABLED */
|
||||
/*#define HAL_OPAMP_MODULE_ENABLED */
|
||||
/*#define HAL_PCD_MODULE_ENABLED */
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
/*#define HAL_SD_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
/*#define HAL_TIM_MODULE_ENABLED */
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal Multiple Speed oscillator (MSI) default value.
|
||||
* This value is the default MSI range value after Reset.
|
||||
*/
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE (37000U) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
|
||||
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0
|
||||
#define PREFETCH_ENABLE 0
|
||||
#define INSTRUCTION_CACHE_ENABLE 1
|
||||
#define DATA_CACHE_ENABLE 1
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Register callback feature configuration ############### */
|
||||
/**
|
||||
* @brief Set below the peripheral configuration to "1U" to add the support
|
||||
* of HAL callback registration/deregistration feature for the HAL
|
||||
* driver(s). This allows user application to provide specific callback
|
||||
* functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
|
||||
* the default weak callback functions (see each stm32l0xx_hal_ppp.h file
|
||||
* for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
|
||||
* for each PPP peripheral).
|
||||
*/
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SDMMC_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_COMP_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_comp.h"
|
||||
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LCD_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_lcd.h"
|
||||
#endif /* HAL_LCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_opamp.h"
|
||||
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32l1xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_HAL_CONF_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,69 +0,0 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_IT_H
|
||||
#define __STM32L1xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -6,7 +6,7 @@
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* <h2><center>© Copyright (c) 2021 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
@ -19,6 +19,8 @@
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "math.h"
|
||||
#include "stdbool.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
@ -32,6 +34,7 @@
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
@ -44,7 +47,16 @@ RTC_HandleTypeDef hrtc;
|
||||
UART_HandleTypeDef huart2;
|
||||
RTC_TimeTypeDef sTime;
|
||||
RTC_DateTypeDef sDate;
|
||||
RTC_AlarmTypeDef sAlarm;
|
||||
|
||||
//Nuernberg coordinates
|
||||
int latitude_nbg = 49;
|
||||
int longitude_nbg = 11;
|
||||
|
||||
//German UTC time,summer (+2) and winter (+1)
|
||||
int UTC_DER_sum = 2;
|
||||
int UTC_DER_win = 1;
|
||||
bool winterTime = true;
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
@ -61,6 +73,265 @@ static void MX_RTC_Init(void);
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
/*******************************************************************************
|
||||
* Function Name : deg_to_rad
|
||||
* Description : converts degrees to radians
|
||||
* Return : angle in radians
|
||||
*******************************************************************************/
|
||||
double deg_to_rad(double deg)
|
||||
{
|
||||
double rad = deg*(M_PI/180);
|
||||
return rad;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : rad_to_deg
|
||||
* Description : converts radians to degrees
|
||||
* Return : angle in degrees
|
||||
*******************************************************************************/
|
||||
double rad_to_deg(double rad)
|
||||
{
|
||||
double deg = rad*(180/M_PI);
|
||||
return deg;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : leap_year_check
|
||||
* Description : checks if year is a leap year
|
||||
* Return : false: no leap year, true: leap year
|
||||
*******************************************************************************/
|
||||
int leap_year_check(int year)
|
||||
{
|
||||
if((year % 4 == 0 && year % 100 != 0) || (year % 400 == 0))
|
||||
{
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : calc_day_of_year
|
||||
* Description : calculates the day of year
|
||||
* Return : day of year (1.1.. = 1, 2.1.. = 2,...)
|
||||
* Source : https://overiq.com/c-examples/c-program-to-calculate-the-day-of-year-from-the-date/
|
||||
*******************************************************************************/
|
||||
int calc_day_of_year(int day, int mon, int year)
|
||||
{
|
||||
int days_in_feb = 28;
|
||||
int doy = day; //day of year
|
||||
|
||||
// check for leap year
|
||||
bool leap_year = leap_year_check(year);
|
||||
if(leap_year == true)
|
||||
{
|
||||
days_in_feb = 29;
|
||||
}
|
||||
|
||||
switch(mon)
|
||||
{
|
||||
case 2:
|
||||
doy += 31;
|
||||
break;
|
||||
case 3:
|
||||
doy += 31+days_in_feb;
|
||||
break;
|
||||
case 4:
|
||||
doy += days_in_feb+62;
|
||||
break;
|
||||
case 5:
|
||||
doy += days_in_feb+92;
|
||||
break;
|
||||
case 6:
|
||||
doy += days_in_feb+123;
|
||||
break;
|
||||
case 7:
|
||||
doy += days_in_feb+153;
|
||||
break;
|
||||
case 8:
|
||||
doy += days_in_feb+184;
|
||||
break;
|
||||
case 9:
|
||||
doy += days_in_feb+215;
|
||||
break;
|
||||
case 10:
|
||||
doy += days_in_feb+245;
|
||||
break;
|
||||
case 11:
|
||||
doy += days_in_feb+276;
|
||||
break;
|
||||
case 12:
|
||||
doy += days_in_feb+306;
|
||||
break;
|
||||
}
|
||||
return doy;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : calc_sunrise_sunset
|
||||
* Description : calculates the sunrise and sunset time of a specific date
|
||||
* Source : General Solar Position Calculations, NOAA Global Monitoring Division
|
||||
*******************************************************************************/
|
||||
void calc_sunrise_sunset(int date, int month, int year, int sunrise_time[2], int sunset_time[2])
|
||||
{
|
||||
double gamma = 0;
|
||||
bool leap_year;
|
||||
double eqtime = 0;
|
||||
double decl = 0;
|
||||
double decl_deg = 0;
|
||||
double zenith_sun = 0;
|
||||
double lat_nbg_rad = 0;
|
||||
double ha = 0;
|
||||
double sunrise = 0;
|
||||
double sunset = 0;
|
||||
double ha_deg = 0;
|
||||
int sunrise_h = 0;
|
||||
int sunset_h = 0;
|
||||
double sunrise_min = 0;
|
||||
double sunset_min = 0;
|
||||
int int_sunrise_min = 0;
|
||||
int int_sunset_min = 0;
|
||||
|
||||
//day of year calculation
|
||||
int day_of_year = calc_day_of_year(date, month, year);
|
||||
|
||||
// fractional year (γ) in radians
|
||||
// check for leap year
|
||||
leap_year = leap_year_check(year);
|
||||
if(leap_year == false)
|
||||
{
|
||||
//The back part of the formula was omitted, because there is no difference in the result
|
||||
gamma = ((2 * M_PI)/365)*(day_of_year - 1);
|
||||
} else {
|
||||
//The back part of the formula was omitted, because there is no difference in the result
|
||||
gamma = ((2 * M_PI)/366)*(day_of_year - 1);
|
||||
}
|
||||
|
||||
//Equation of time in minutes
|
||||
eqtime = 229.18*(0.000075 + 0.001868*cos(gamma) - 0.032077*sin(gamma) - 0.014615*cos(2*gamma) - 0.040849*sin(2*gamma));
|
||||
|
||||
//Solar declination angle in radians
|
||||
decl = 0.006918 - 0.399912*cos(gamma) + 0.070257*sin(gamma) - 0.006758*cos(2*gamma) + 0.000907*sin(2*gamma) - 0.002697*cos(3*gamma) + 0.00148*sin(3*gamma);
|
||||
|
||||
//Solar declination angle in degrees
|
||||
decl_deg = rad_to_deg(decl);
|
||||
|
||||
//Hour angle in degrees, positive number corresponds to sunrise, negative to sunset
|
||||
//special case of sunrise or sunset, the zenith is set to 90.833Deg
|
||||
zenith_sun = deg_to_rad(90.833);
|
||||
//Latitude of Nuernberg in rad
|
||||
lat_nbg_rad = deg_to_rad(latitude_nbg);
|
||||
ha = acos((cos(zenith_sun)/(cos(lat_nbg_rad)*cos(decl)))-(tan(lat_nbg_rad)*tan(decl)));
|
||||
ha_deg = rad_to_deg(ha);
|
||||
|
||||
//UTC time of sunrise (or sunset) in minutes
|
||||
sunrise = (720-4*(longitude_nbg+ha_deg)-eqtime);
|
||||
sunset = 720-4*(longitude_nbg-ha_deg)-eqtime;
|
||||
|
||||
//Convert sunrise (or sunset) UTC time in hours
|
||||
sunrise = sunrise/60;
|
||||
sunset = sunset/60;
|
||||
|
||||
//Seperate hours and minutes
|
||||
sunrise_h = floor(sunrise);
|
||||
sunrise_min = sunrise - sunrise_h;
|
||||
//Cut off after two decimal places
|
||||
int_sunrise_min = floor(sunrise_min * 100.0);
|
||||
if (int_sunrise_min >= 60)
|
||||
{
|
||||
sunrise_h = sunrise_h + 1;
|
||||
int_sunrise_min = int_sunrise_min - 60;
|
||||
}
|
||||
sunset_h = floor(sunset);
|
||||
sunset_min = sunset - sunset_h;
|
||||
//Cut off after two decimal places
|
||||
int_sunset_min = floor(sunset_min * 100.0);
|
||||
if (int_sunset_min >= 60)
|
||||
{
|
||||
sunset_h = sunset_h + 1;
|
||||
int_sunset_min = int_sunset_min - 60;
|
||||
}
|
||||
|
||||
//Add time difference from German time to UTC Time
|
||||
//Private variable winterTime must be initialized accordingly
|
||||
if (winterTime)
|
||||
{
|
||||
sunrise_h = sunrise_h + UTC_DER_win;
|
||||
sunset_h = sunset_h + UTC_DER_win;
|
||||
} else {
|
||||
sunrise_h = sunrise_h + UTC_DER_sum;
|
||||
sunset_h = sunset_h + UTC_DER_sum;
|
||||
}
|
||||
|
||||
sunrise_time[0] = sunrise_h;
|
||||
sunrise_time[1] = int_sunrise_min;
|
||||
sunset_time[0] = sunset_h;
|
||||
sunset_time[1] = int_sunset_min;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : calc_tomorrows_date
|
||||
* Description : calculates tomorrow's date
|
||||
* Source : https://github.com/vyacht/stm32/blob/master/vynmea/rtc.c
|
||||
*******************************************************************************/
|
||||
void calc_tomorrows_date(int day, int wday, int month, int year, int DaysInMonth[12], int tomorrows_date[4])
|
||||
{
|
||||
bool leap_year;
|
||||
|
||||
day++; // next day
|
||||
wday++; // next weekday
|
||||
if(wday == 8)
|
||||
{
|
||||
wday = 1; // Monday
|
||||
}
|
||||
if(day > DaysInMonth[month-1])
|
||||
{ // next month
|
||||
day = 1;
|
||||
month++;
|
||||
}
|
||||
if(day > 31 && month == 12) // next year
|
||||
{
|
||||
day = 1;
|
||||
month = 1;
|
||||
year++;
|
||||
}
|
||||
|
||||
tomorrows_date[0] = day;
|
||||
tomorrows_date[1] = wday;
|
||||
tomorrows_date[2] = month;
|
||||
tomorrows_date[3] = year;
|
||||
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : set_Alarm
|
||||
* Description : sets the wake up Alarm
|
||||
*******************************************************************************/
|
||||
void set_Alarm(int h, int min, int weekDay)
|
||||
{
|
||||
/** Enable the Alarm A*/
|
||||
sAlarm.AlarmTime.Hours = h;
|
||||
sAlarm.AlarmTime.Minutes = min;
|
||||
sAlarm.AlarmTime.Seconds = 0;
|
||||
sAlarm.AlarmTime.SubSeconds = 0;
|
||||
sAlarm.AlarmTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
|
||||
sAlarm.AlarmTime.StoreOperation = RTC_STOREOPERATION_RESET;
|
||||
sAlarm.AlarmMask = RTC_ALARMMASK_NONE; //only by specific time
|
||||
sAlarm.AlarmSubSecondMask = RTC_ALARMSUBSECONDMASK_ALL;
|
||||
sAlarm.AlarmDateWeekDaySel = RTC_ALARMDATEWEEKDAYSEL_WEEKDAY;
|
||||
sAlarm.AlarmDateWeekDay = weekDay;
|
||||
sAlarm.Alarm = RTC_ALARM_A;
|
||||
if (HAL_RTC_SetAlarm_IT(&hrtc, &sAlarm, RTC_FORMAT_BIN) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
// sending to UART
|
||||
void transmit_uart(char *string){
|
||||
uint8_t len = strlen(string);
|
||||
HAL_UART_Transmit(&huart2, (uint8_t*) string, len, 200);
|
||||
}
|
||||
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
@ -95,13 +366,26 @@ int main(void)
|
||||
MX_USART2_UART_Init();
|
||||
MX_RTC_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
uint8_t hours = 0;
|
||||
uint8_t minutes = 0;
|
||||
uint8_t seconds = 0;
|
||||
uint8_t weekDay = 0;
|
||||
uint8_t month = 0;
|
||||
uint8_t date = 0;
|
||||
uint8_t year = 0;
|
||||
int hours = 0;
|
||||
int minutes = 0;
|
||||
int seconds = 0;
|
||||
int weekDay = 0;
|
||||
int month = 0;
|
||||
int date = 0;
|
||||
int year = 0;
|
||||
|
||||
int sunrise_h = 0;
|
||||
int sunset_h = 0;
|
||||
int int_sunrise_min = 0;
|
||||
int int_sunset_min = 0;
|
||||
int sunrise_time[2] = {0};
|
||||
int sunset_time[2] = {0};
|
||||
int tomorrows_date[4] = {0};
|
||||
int DaysInMonth[12] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
|
||||
int DaysInMonthLeapYear[12] = {31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
|
||||
bool leap_year = false;
|
||||
|
||||
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
@ -109,7 +393,8 @@ int main(void)
|
||||
/* USER CODE BEGIN WHILE */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
//Get Time and Date
|
||||
if (HAL_RTC_GetTime(&hrtc, &sTime, RTC_FORMAT_BIN) == HAL_OK)
|
||||
{
|
||||
hours = sTime.Hours;
|
||||
@ -121,10 +406,37 @@ int main(void)
|
||||
weekDay = sDate.WeekDay;
|
||||
month = sDate.Month;
|
||||
date = sDate.Date;
|
||||
year = sDate.Year;
|
||||
year = 2000 + sDate.Year;
|
||||
}
|
||||
HAL_Delay(200);
|
||||
|
||||
// check for leap year
|
||||
leap_year = leap_year_check(year);
|
||||
if (leap_year)
|
||||
{
|
||||
//Calculate tomorrow's date
|
||||
calc_tomorrows_date(date, weekDay, month, year, DaysInMonthLeapYear, tomorrows_date);
|
||||
} else {
|
||||
//Calculate tomorrow's date
|
||||
calc_tomorrows_date(date, weekDay, month, year, DaysInMonth, tomorrows_date);
|
||||
}
|
||||
|
||||
//Calculate sunrise and sunset time for tomorrow
|
||||
calc_sunrise_sunset(tomorrows_date[0], tomorrows_date[2], tomorrows_date[3], sunrise_time, sunset_time);
|
||||
|
||||
set_Alarm(16, 22, 1);
|
||||
|
||||
HAL_Delay(5000);
|
||||
|
||||
transmit_uart("Ich gehe schlafen!\r\n");
|
||||
|
||||
// Suspend Tick increment to prevent wake up by Systick interrupt
|
||||
HAL_SuspendTick();
|
||||
|
||||
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); //Interrupt for wake up
|
||||
|
||||
HAL_ResumeTick();
|
||||
|
||||
transmit_uart("Bin wieder wach!\r\n");
|
||||
}
|
||||
/* USER CODE END 3 */
|
||||
}
|
||||
@ -137,22 +449,25 @@ void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
|
||||
/** Configure the main internal regulator output voltage
|
||||
*/
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE;
|
||||
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
|
||||
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3;
|
||||
RCC_OscInitStruct.PLL.PLLM = 16;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
@ -163,16 +478,16 @@ void SystemClock_Config(void)
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
||||
PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
|
||||
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
@ -213,24 +528,25 @@ static void MX_RTC_Init(void)
|
||||
|
||||
/** Initialize RTC and set the Time and Date
|
||||
*/
|
||||
sTime.Hours = 23;
|
||||
sTime.Minutes = 59;
|
||||
sTime.Seconds = 45;
|
||||
sTime.Hours = 16;
|
||||
sTime.Minutes = 20;
|
||||
sTime.Seconds = 30;
|
||||
sTime.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
|
||||
sTime.StoreOperation = RTC_STOREOPERATION_RESET;
|
||||
if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BIN) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sDate.WeekDay = RTC_WEEKDAY_SUNDAY;
|
||||
sDate.Month = RTC_MONTH_DECEMBER;
|
||||
sDate.Date = 31;
|
||||
sDate.Year = 17;
|
||||
sDate.WeekDay = RTC_WEEKDAY_MONDAY;
|
||||
sDate.Month = RTC_MONTH_JANUARY;
|
||||
sDate.Date = 11;
|
||||
sDate.Year = 21;
|
||||
|
||||
if (HAL_RTC_SetDate(&hrtc, &sDate, RTC_FORMAT_BIN) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN RTC_Init 2 */
|
||||
|
||||
/* USER CODE END RTC_Init 2 */
|
||||
@ -290,7 +606,7 @@ static void MX_GPIO_Init(void)
|
||||
|
||||
/*Configure GPIO pin : B1_Pin */
|
||||
GPIO_InitStruct.Pin = B1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
@ -315,10 +631,25 @@ void Error_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler_Debug */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
|
||||
__disable_irq();
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END Error_Handler_Debug */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Alarm callback
|
||||
* @param hrtc: RTC handle
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
|
||||
{
|
||||
/* Alarm generation */
|
||||
transmit_uart("Alarm!!!!\r\n");
|
||||
}
|
||||
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief Reports the name of the source file and the source line number
|
||||
@ -331,7 +662,7 @@ void assert_failed(uint8_t *file, uint32_t line)
|
||||
{
|
||||
/* USER CODE BEGIN 6 */
|
||||
/* User can add his own implementation to report the file name and line number,
|
||||
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||
/* USER CODE END 6 */
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
@ -1,196 +0,0 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* File Name : stm32l1xx_hal_msp.c
|
||||
* Description : This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_COMP_CLK_ENABLE();
|
||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param hrtc: RTC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
|
||||
{
|
||||
if(hrtc->Instance==RTC)
|
||||
{
|
||||
/* USER CODE BEGIN RTC_MspInit 0 */
|
||||
|
||||
/* USER CODE END RTC_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_RTC_ENABLE();
|
||||
/* USER CODE BEGIN RTC_MspInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief RTC MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param hrtc: RTC handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
|
||||
{
|
||||
if(hrtc->Instance==RTC)
|
||||
{
|
||||
/* USER CODE BEGIN RTC_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_RTC_DISABLE();
|
||||
/* USER CODE BEGIN RTC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP Initialization
|
||||
* This function configures the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(huart->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 0 */
|
||||
/* Peripheral clock enable */
|
||||
__HAL_RCC_USART2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**USART2 GPIO Configuration
|
||||
PA2 ------> USART2_TX
|
||||
PA3 ------> USART2_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART2_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief UART MSP De-Initialization
|
||||
* This function freeze the hardware resources used in this example
|
||||
* @param huart: UART handle pointer
|
||||
* @retval None
|
||||
*/
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||
{
|
||||
if(huart->Instance==USART2)
|
||||
{
|
||||
/* USER CODE BEGIN USART2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART2_CLK_DISABLE();
|
||||
|
||||
/**USART2 GPIO Configuration
|
||||
PA2 ------> USART2_TX
|
||||
PA3 ------> USART2_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
|
||||
|
||||
/* USER CODE BEGIN USART2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART2_MspDeInit 1 */
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,203 +0,0 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32l1xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M3 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pre-fetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVC_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVC_IRQn 0 */
|
||||
/* USER CODE BEGIN SVC_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVC_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32L1xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32l1xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -60,7 +60,7 @@ void *_sbrk(ptrdiff_t incr)
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initalize heap end at first call */
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
|
||||
@ -1,408 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32l1xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32l1xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32l1xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000U) /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/*!< Uncomment the following line if you need to use external SRAM mounted
|
||||
on STM32L152D_EVAL board as data memory */
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 2097000U;
|
||||
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
|
||||
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
|
||||
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system.
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
* SystemCoreClock variable.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock according to Clock Register Values
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
|
||||
* value as defined by the MSI range.
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
|
||||
* 16 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
|
||||
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||
* frequency of the crystal used. Otherwise, this function may
|
||||
* have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00: /* MSI used as system clock */
|
||||
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
|
||||
SystemCoreClock = (32768 * (1 << (msirange + 1)));
|
||||
break;
|
||||
case 0x04: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x08: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x0C: /* PLL used as system clock */
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
|
||||
pllmul = PLLMulTable[(pllmul >> 18)];
|
||||
plldiv = (plldiv >> 22) + 1;
|
||||
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
|
||||
if (pllsource == 0x00)
|
||||
{
|
||||
/* HSI oscillator clock selected as PLL clock entry */
|
||||
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* HSE selected as PLL clock entry */
|
||||
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
|
||||
}
|
||||
break;
|
||||
default: /* MSI used as system clock */
|
||||
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
|
||||
SystemCoreClock = (32768 * (1 << (msirange + 1)));
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in SystemInit() function before jump to main.
|
||||
* This function configures the external SRAM mounted on STM32L152D_EVAL board
|
||||
* This SRAM will be used as program data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmpreg = 0;
|
||||
|
||||
/* Flash 1 wait state */
|
||||
FLASH->ACR |= FLASH_ACR_LATENCY;
|
||||
|
||||
/* Power enable */
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
|
||||
|
||||
/* Select the Voltage Range 1 (1.8 V) */
|
||||
PWR->CR = PWR_CR_VOS_0;
|
||||
|
||||
/* Wait Until the Voltage Regulator is ready */
|
||||
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
|
||||
{
|
||||
}
|
||||
|
||||
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||
/*
|
||||
+-------------------+--------------------+------------------+------------------+
|
||||
+ SRAM pins assignment +
|
||||
+-------------------+--------------------+------------------+------------------+
|
||||
| PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
|
||||
| PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
|
||||
| PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
|
||||
| PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
|
||||
| PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
|
||||
| PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
|
||||
| PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
|
||||
| PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
|
||||
| PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
|
||||
| PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
|
||||
| PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+
|
||||
| PD15 <-> FSMC_D1 |--------------------+
|
||||
+-------------------+
|
||||
*/
|
||||
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||
RCC->AHBENR = 0x000080D8;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);
|
||||
|
||||
/* Connect PDx pins to FSMC Alternate function */
|
||||
GPIOD->AFR[0] = 0x00CC00CC;
|
||||
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PDx pins in Alternate function mode */
|
||||
GPIOD->MODER = 0xAAAA0A0A;
|
||||
/* Configure PDx pins speed to 40 MHz */
|
||||
GPIOD->OSPEEDR = 0xFFFF0F0F;
|
||||
/* Configure PDx pins Output type to push-pull */
|
||||
GPIOD->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PDx pins */
|
||||
GPIOD->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PEx pins to FSMC Alternate function */
|
||||
GPIOE->AFR[0] = 0xC00000CC;
|
||||
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||
/* Configure PEx pins in Alternate function mode */
|
||||
GPIOE->MODER = 0xAAAA800A;
|
||||
/* Configure PEx pins speed to 40 MHz */
|
||||
GPIOE->OSPEEDR = 0xFFFFC00F;
|
||||
/* Configure PEx pins Output type to push-pull */
|
||||
GPIOE->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PEx pins */
|
||||
GPIOE->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PFx pins to FSMC Alternate function */
|
||||
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||
GPIOF->AFR[1] = 0xCCCC0000;
|
||||
/* Configure PFx pins in Alternate function mode */
|
||||
GPIOF->MODER = 0xAA000AAA;
|
||||
/* Configure PFx pins speed to 40 MHz */
|
||||
GPIOF->OSPEEDR = 0xFF000FFF;
|
||||
/* Configure PFx pins Output type to push-pull */
|
||||
GPIOF->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PFx pins */
|
||||
GPIOF->PUPDR = 0x00000000;
|
||||
|
||||
/* Connect PGx pins to FSMC Alternate function */
|
||||
GPIOG->AFR[0] = 0x00CCCCCC;
|
||||
GPIOG->AFR[1] = 0x00000C00;
|
||||
/* Configure PGx pins in Alternate function mode */
|
||||
GPIOG->MODER = 0x00200AAA;
|
||||
/* Configure PGx pins speed to 40 MHz */
|
||||
GPIOG->OSPEEDR = 0x00300FFF;
|
||||
/* Configure PGx pins Output type to push-pull */
|
||||
GPIOG->OTYPER = 0x00000000;
|
||||
/* No pull-up, pull-down for PGx pins */
|
||||
GPIOG->PUPDR = 0x00000000;
|
||||
|
||||
/*-- FSMC Configuration ------------------------------------------------------*/
|
||||
/* Enable the FSMC interface clock */
|
||||
RCC->AHBENR = 0x400080D8;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
|
||||
|
||||
(void)(tmpreg);
|
||||
|
||||
/* Configure and enable Bank1_SRAM3 */
|
||||
FSMC_Bank1->BTCR[4] = 0x00001011;
|
||||
FSMC_Bank1->BTCR[5] = 0x00000300;
|
||||
FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
|
||||
/*
|
||||
Bank1_SRAM3 is configured as follow:
|
||||
|
||||
p.FSMC_AddressSetupTime = 0;
|
||||
p.FSMC_AddressHoldTime = 0;
|
||||
p.FSMC_DataSetupTime = 3;
|
||||
p.FSMC_BusTurnAroundDuration = 0;
|
||||
p.FSMC_CLKDivision = 0;
|
||||
p.FSMC_DataLatency = 0;
|
||||
p.FSMC_AccessMode = FSMC_AccessMode_A;
|
||||
|
||||
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
|
||||
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
|
||||
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
|
||||
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
|
||||
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
|
||||
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
|
||||
|
||||
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
|
||||
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
|
||||
*/
|
||||
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,409 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32l152xe.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32L152XE Devices vector table for GCC toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
*
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017 STMicroelectronics. All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMPER_STAMP_IRQHandler
|
||||
.word RTC_WKUP_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_IRQHandler
|
||||
.word USB_HP_IRQHandler
|
||||
.word USB_LP_IRQHandler
|
||||
.word DAC_IRQHandler
|
||||
.word COMP_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word LCD_IRQHandler
|
||||
.word TIM9_IRQHandler
|
||||
.word TIM10_IRQHandler
|
||||
.word TIM11_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USB_FS_WKUP_IRQHandler
|
||||
.word TIM6_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word 0
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_IRQHandler
|
||||
.word DMA2_Channel5_IRQHandler
|
||||
.word 0
|
||||
.word COMP_ACQ_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32L152XE devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_STAMP_IRQHandler
|
||||
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_IRQHandler
|
||||
.thumb_set ADC1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_IRQHandler
|
||||
.thumb_set USB_HP_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_IRQHandler
|
||||
.thumb_set USB_LP_IRQHandler,Default_Handler
|
||||
|
||||
.weak DAC_IRQHandler
|
||||
.thumb_set DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_IRQHandler
|
||||
.thumb_set COMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak LCD_IRQHandler
|
||||
.thumb_set LCD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM9_IRQHandler
|
||||
.thumb_set TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM10_IRQHandler
|
||||
.thumb_set TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM11_IRQHandler
|
||||
.thumb_set TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_FS_WKUP_IRQHandler
|
||||
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_IRQHandler
|
||||
.thumb_set TIM6_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_IRQHandler
|
||||
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel5_IRQHandler
|
||||
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak COMP_ACQ_IRQHandler
|
||||
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
@ -1,47 +1,48 @@
|
||||
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
|
||||
../Core/Inc/stm32f4xx_hal_conf.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm4.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
|
||||
|
||||
../Core/Inc/main.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
../Core/Inc/stm32f4xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
../Drivers/CMSIS/Include/core_cm4.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
@ -51,34 +52,36 @@ Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
../Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
|
||||
|
||||
Binary file not shown.
@ -1,6 +1,15 @@
|
||||
main.c:71:5:main 16 static
|
||||
main.c:136:6:SystemClock_Config 96 static
|
||||
main.c:186:13:MX_RTC_Init 8 static
|
||||
main.c:245:13:MX_USART2_UART_Init 8 static
|
||||
main.c:278:13:MX_GPIO_Init 48 static
|
||||
main.c:314:6:Error_Handler 4 static
|
||||
main.c:81:8:deg_to_rad 32 static
|
||||
main.c:92:8:rad_to_deg 32 static
|
||||
main.c:103:5:leap_year_check 16 static
|
||||
main.c:118:5:calc_day_of_year 40 static
|
||||
main.c:174:6:calc_sunrise_sunset 168 static
|
||||
main.c:276:6:calc_tomorrows_date 24 static
|
||||
main.c:309:6:set_Alarm 24 static
|
||||
main.c:330:6:transmit_uart 24 static
|
||||
main.c:342:5:main 200 static
|
||||
main.c:448:6:SystemClock_Config 104 static
|
||||
main.c:501:13:MX_RTC_Init 8 static
|
||||
main.c:561:13:MX_USART2_UART_Init 8 static
|
||||
main.c:594:13:MX_GPIO_Init 48 static
|
||||
main.c:630:6:Error_Handler 4 static,ignoring_inline_asm
|
||||
main.c:646:6:HAL_RTC_AlarmAEventCallback 16 static
|
||||
|
||||
@ -1,84 +0,0 @@
|
||||
Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c \
|
||||
../Core/Inc/main.h ../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
|
||||
|
||||
../Core/Inc/main.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,5 +0,0 @@
|
||||
stm32l1xx_hal_msp.c:64:6:HAL_MspInit 24 static
|
||||
stm32l1xx_hal_msp.c:89:6:HAL_RTC_MspInit 16 static
|
||||
stm32l1xx_hal_msp.c:111:6:HAL_RTC_MspDeInit 16 static
|
||||
stm32l1xx_hal_msp.c:133:6:HAL_UART_MspInit 48 static
|
||||
stm32l1xx_hal_msp.c:169:6:HAL_UART_MspDeInit 16 static
|
||||
@ -1,87 +0,0 @@
|
||||
Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c ../Core/Inc/main.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h \
|
||||
../Core/Inc/stm32l1xx_it.h
|
||||
|
||||
../Core/Inc/main.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_it.h:
|
||||
Binary file not shown.
@ -1,9 +0,0 @@
|
||||
stm32l1xx_it.c:70:6:NMI_Handler 4 static
|
||||
stm32l1xx_it.c:83:6:HardFault_Handler 4 static
|
||||
stm32l1xx_it.c:98:6:MemManage_Handler 4 static
|
||||
stm32l1xx_it.c:113:6:BusFault_Handler 4 static
|
||||
stm32l1xx_it.c:128:6:UsageFault_Handler 4 static
|
||||
stm32l1xx_it.c:143:6:SVC_Handler 4 static
|
||||
stm32l1xx_it.c:156:6:DebugMon_Handler 4 static
|
||||
stm32l1xx_it.c:169:6:PendSV_Handler 4 static
|
||||
stm32l1xx_it.c:182:6:SysTick_Handler 8 static
|
||||
@ -5,40 +5,40 @@
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../Core/Src/main.c \
|
||||
../Core/Src/stm32l1xx_hal_msp.c \
|
||||
../Core/Src/stm32l1xx_it.c \
|
||||
../Core/Src/stm32f4xx_hal_msp.c \
|
||||
../Core/Src/stm32f4xx_it.c \
|
||||
../Core/Src/syscalls.c \
|
||||
../Core/Src/sysmem.c \
|
||||
../Core/Src/system_stm32l1xx.c
|
||||
../Core/Src/system_stm32f4xx.c
|
||||
|
||||
OBJS += \
|
||||
./Core/Src/main.o \
|
||||
./Core/Src/stm32l1xx_hal_msp.o \
|
||||
./Core/Src/stm32l1xx_it.o \
|
||||
./Core/Src/stm32f4xx_hal_msp.o \
|
||||
./Core/Src/stm32f4xx_it.o \
|
||||
./Core/Src/syscalls.o \
|
||||
./Core/Src/sysmem.o \
|
||||
./Core/Src/system_stm32l1xx.o
|
||||
./Core/Src/system_stm32f4xx.o
|
||||
|
||||
C_DEPS += \
|
||||
./Core/Src/main.d \
|
||||
./Core/Src/stm32l1xx_hal_msp.d \
|
||||
./Core/Src/stm32l1xx_it.d \
|
||||
./Core/Src/stm32f4xx_hal_msp.d \
|
||||
./Core/Src/stm32f4xx_it.d \
|
||||
./Core/Src/syscalls.d \
|
||||
./Core/Src/sysmem.d \
|
||||
./Core/Src/system_stm32l1xx.d
|
||||
./Core/Src/system_stm32f4xx.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Core/Src/main.o: ../Core/Src/main.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_it.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
Core/Src/stm32f4xx_hal_msp.o: ../Core/Src/stm32f4xx_hal_msp.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f4xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
Core/Src/stm32f4xx_it.o: ../Core/Src/stm32f4xx_it.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32f4xx_it.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
Core/Src/syscalls.o: ../Core/Src/syscalls.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
Core/Src/sysmem.o: ../Core/Src/sysmem.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l1xx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
Core/Src/system_stm32f4xx.o: ../Core/Src/system_stm32f4xx.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m4 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32F401xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc -I../Drivers/STM32F4xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32F4xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32f4xx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@"
|
||||
|
||||
|
||||
Binary file not shown.
Binary file not shown.
@ -1,82 +0,0 @@
|
||||
Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,2 +0,0 @@
|
||||
system_stm32l1xx.c:140:6:SystemInit 4 static
|
||||
system_stm32l1xx.c:191:6:SystemCoreClockUpdate 32 static
|
||||
@ -1,2 +0,0 @@
|
||||
Core/Startup/startup_stm32l152retx.o: \
|
||||
../Core/Startup/startup_stm32l152retx.s
|
||||
Binary file not shown.
@ -4,16 +4,16 @@
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
S_SRCS += \
|
||||
../Core/Startup/startup_stm32l152retx.s
|
||||
../Core/Startup/startup_stm32f401retx.s
|
||||
|
||||
OBJS += \
|
||||
./Core/Startup/startup_stm32l152retx.o
|
||||
./Core/Startup/startup_stm32f401retx.o
|
||||
|
||||
S_DEPS += \
|
||||
./Core/Startup/startup_stm32l152retx.d
|
||||
./Core/Startup/startup_stm32f401retx.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Core/Startup/startup_stm32l152retx.o: ../Core/Startup/startup_stm32l152retx.s
|
||||
arm-none-eabi-gcc -mcpu=cortex-m3 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32l152retx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
|
||||
Core/Startup/startup_stm32f401retx.o: ../Core/Startup/startup_stm32f401retx.s
|
||||
arm-none-eabi-gcc -mcpu=cortex-m4 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32f401retx.d" -MT"$@" --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -o "$@" "$<"
|
||||
|
||||
|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o: \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,25 +0,0 @@
|
||||
stm32l1xx_hal.c:140:19:HAL_Init 16 static
|
||||
stm32l1xx_hal.c:173:19:HAL_DeInit 8 static
|
||||
stm32l1xx_hal.c:196:13:HAL_MspInit 4 static
|
||||
stm32l1xx_hal.c:207:13:HAL_MspDeInit 4 static
|
||||
stm32l1xx_hal.c:230:26:HAL_InitTick 24 static
|
||||
stm32l1xx_hal.c:298:13:HAL_IncTick 4 static
|
||||
stm32l1xx_hal.c:309:17:HAL_GetTick 4 static
|
||||
stm32l1xx_hal.c:318:10:HAL_GetTickPrio 4 static
|
||||
stm32l1xx_hal.c:328:19:HAL_SetTickFreq 24 static
|
||||
stm32l1xx_hal.c:360:10:HAL_GetTickFreq 4 static
|
||||
stm32l1xx_hal.c:376:13:HAL_Delay 24 static
|
||||
stm32l1xx_hal.c:402:13:HAL_SuspendTick 4 static
|
||||
stm32l1xx_hal.c:418:13:HAL_ResumeTick 4 static
|
||||
stm32l1xx_hal.c:428:10:HAL_GetHalVersion 4 static
|
||||
stm32l1xx_hal.c:437:10:HAL_GetREVID 4 static
|
||||
stm32l1xx_hal.c:446:10:HAL_GetDEVID 4 static
|
||||
stm32l1xx_hal.c:455:10:HAL_GetUIDw0 4 static
|
||||
stm32l1xx_hal.c:464:10:HAL_GetUIDw1 4 static
|
||||
stm32l1xx_hal.c:473:10:HAL_GetUIDw2 4 static
|
||||
stm32l1xx_hal.c:502:6:HAL_DBGMCU_EnableDBGSleepMode 4 static
|
||||
stm32l1xx_hal.c:511:6:HAL_DBGMCU_DisableDBGSleepMode 4 static
|
||||
stm32l1xx_hal.c:520:6:HAL_DBGMCU_EnableDBGStopMode 4 static
|
||||
stm32l1xx_hal.c:529:6:HAL_DBGMCU_DisableDBGStopMode 4 static
|
||||
stm32l1xx_hal.c:538:6:HAL_DBGMCU_EnableDBGStandbyMode 4 static
|
||||
stm32l1xx_hal.c:547:6:HAL_DBGMCU_DisableDBGStandbyMode 4 static
|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o: \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,32 +0,0 @@
|
||||
core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 24 static
|
||||
core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 4 static
|
||||
core_cm3.h:1511:22:__NVIC_EnableIRQ 16 static
|
||||
core_cm3.h:1547:22:__NVIC_DisableIRQ 16 static,ignoring_inline_asm
|
||||
core_cm3.h:1566:26:__NVIC_GetPendingIRQ 16 static
|
||||
core_cm3.h:1585:22:__NVIC_SetPendingIRQ 16 static
|
||||
core_cm3.h:1600:22:__NVIC_ClearPendingIRQ 16 static
|
||||
core_cm3.h:1617:26:__NVIC_GetActive 16 static
|
||||
core_cm3.h:1639:22:__NVIC_SetPriority 16 static
|
||||
core_cm3.h:1661:26:__NVIC_GetPriority 16 static
|
||||
core_cm3.h:1686:26:NVIC_EncodePriority 40 static
|
||||
core_cm3.h:1713:22:NVIC_DecodePriority 40 static
|
||||
core_cm3.h:1762:34:__NVIC_SystemReset 4 static,ignoring_inline_asm
|
||||
core_cm3.h:1834:26:SysTick_Config 16 static
|
||||
stm32l1xx_hal_cortex.c:169:6:HAL_NVIC_SetPriorityGrouping 16 static
|
||||
stm32l1xx_hal_cortex.c:191:6:HAL_NVIC_SetPriority 32 static
|
||||
stm32l1xx_hal_cortex.c:213:6:HAL_NVIC_EnableIRQ 16 static
|
||||
stm32l1xx_hal_cortex.c:229:6:HAL_NVIC_DisableIRQ 16 static
|
||||
stm32l1xx_hal_cortex.c:242:6:HAL_NVIC_SystemReset 8 static
|
||||
stm32l1xx_hal_cortex.c:255:10:HAL_SYSTICK_Config 16 static
|
||||
stm32l1xx_hal_cortex.c:291:6:HAL_MPU_Enable 16 static,ignoring_inline_asm
|
||||
stm32l1xx_hal_cortex.c:305:6:HAL_MPU_Disable 4 static,ignoring_inline_asm
|
||||
stm32l1xx_hal_cortex.c:320:6:HAL_MPU_ConfigRegion 16 static
|
||||
stm32l1xx_hal_cortex.c:364:10:HAL_NVIC_GetPriorityGrouping 8 static
|
||||
stm32l1xx_hal_cortex.c:391:6:HAL_NVIC_GetPriority 24 static
|
||||
stm32l1xx_hal_cortex.c:406:6:HAL_NVIC_SetPendingIRQ 16 static
|
||||
stm32l1xx_hal_cortex.c:421:10:HAL_NVIC_GetPendingIRQ 16 static
|
||||
stm32l1xx_hal_cortex.c:434:6:HAL_NVIC_ClearPendingIRQ 16 static
|
||||
stm32l1xx_hal_cortex.c:448:10:HAL_NVIC_GetActive 16 static
|
||||
stm32l1xx_hal_cortex.c:462:6:HAL_SYSTICK_CLKSourceConfig 16 static
|
||||
stm32l1xx_hal_cortex.c:480:6:HAL_SYSTICK_IRQHandler 8 static
|
||||
stm32l1xx_hal_cortex.c:489:13:HAL_SYSTICK_Callback 4 static
|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o: \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
|
||||
../Drivers/CMSIS/Include/core_cm3.h \
|
||||
../Drivers/CMSIS/Include/cmsis_version.h \
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h \
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h \
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,13 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,9 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o: \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,13 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
stm32l1xx_hal_flash.c:597:10:HAL_FLASH_GetError 4 static
|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o: \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
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|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,31 +0,0 @@
|
||||
stm32l1xx_hal_flash_ex.c:187:19:HAL_FLASHEx_Erase 24 static
|
||||
stm32l1xx_hal_flash_ex.c:283:19:HAL_FLASHEx_Erase_IT 24 static
|
||||
stm32l1xx_hal_flash_ex.c:406:19:HAL_FLASHEx_OBProgram 24 static
|
||||
stm32l1xx_hal_flash_ex.c:488:6:HAL_FLASHEx_OBGetConfig 16 static
|
||||
stm32l1xx_hal_flash_ex.c:542:19:HAL_FLASHEx_AdvOBProgram 24 static
|
||||
stm32l1xx_hal_flash_ex.c:599:6:HAL_FLASHEx_AdvOBGetConfig 16 static
|
||||
stm32l1xx_hal_flash_ex.c:751:19:HAL_FLASHEx_DATAEEPROM_Unlock 4 static
|
||||
stm32l1xx_hal_flash_ex.c:770:19:HAL_FLASHEx_DATAEEPROM_Lock 4 static
|
||||
stm32l1xx_hal_flash_ex.c:790:19:HAL_FLASHEx_DATAEEPROM_Erase 24 static
|
||||
stm32l1xx_hal_flash_ex.c:848:21:HAL_FLASHEx_DATAEEPROM_Program 32 static
|
||||
stm32l1xx_hal_flash_ex.c:913:6:HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram 4 static
|
||||
stm32l1xx_hal_flash_ex.c:922:6:HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram 4 static
|
||||
stm32l1xx_hal_flash_ex.c:958:26:FLASH_OB_RDPConfig 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1022:26:FLASH_OB_BORConfig 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1060:16:FLASH_OB_GetUser 4 static
|
||||
stm32l1xx_hal_flash_ex.c:1074:16:FLASH_OB_GetRDP 16 static
|
||||
stm32l1xx_hal_flash_ex.c:1092:16:FLASH_OB_GetBOR 4 static
|
||||
stm32l1xx_hal_flash_ex.c:1106:26:FLASH_OB_WRPConfig 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1237:13:FLASH_OB_WRPConfigWRP1OrPCROP1 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1283:13:FLASH_OB_WRPConfigWRP2OrPCROP2 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1329:13:FLASH_OB_WRPConfigWRP3 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1374:13:FLASH_OB_WRPConfigWRP4 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1424:26:FLASH_OB_UserConfig 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1477:26:FLASH_OB_BootConfig 32 static
|
||||
stm32l1xx_hal_flash_ex.c:1526:26:FLASH_DATAEEPROM_FastProgramByte 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1586:26:FLASH_DATAEEPROM_FastProgramHalfWord 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1654:26:FLASH_DATAEEPROM_FastProgramWord 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1685:26:FLASH_DATAEEPROM_ProgramByte 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1739:26:FLASH_DATAEEPROM_ProgramHalfWord 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1800:26:FLASH_DATAEEPROM_ProgramWord 24 static
|
||||
stm32l1xx_hal_flash_ex.c:1845:6:FLASH_PageErase 16 static
|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o: \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
|
||||
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|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h \
|
||||
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|
||||
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|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
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|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,10 +0,0 @@
|
||||
stm32l1xx_hal_flash_ramfunc.c:115:30:HAL_FLASHEx_EnableRunPowerDown 4 static
|
||||
stm32l1xx_hal_flash_ramfunc.c:128:30:HAL_FLASHEx_DisableRunPowerDown 4 static
|
||||
stm32l1xx_hal_flash_ramfunc.c:165:30:HAL_FLASHEx_EraseParallelPage 24 static
|
||||
stm32l1xx_hal_flash_ramfunc.c:226:30:HAL_FLASHEx_ProgramParallelHalfPage 48 static,ignoring_inline_asm
|
||||
stm32l1xx_hal_flash_ramfunc.c:304:30:HAL_FLASHEx_HalfPageProgram 40 static,ignoring_inline_asm
|
||||
stm32l1xx_hal_flash_ramfunc.c:396:30:HAL_FLASHEx_GetError 16 static
|
||||
stm32l1xx_hal_flash_ramfunc.c:428:30:HAL_FLASHEx_DATAEEPROM_EraseDoubleWord 32 static,ignoring_inline_asm
|
||||
stm32l1xx_hal_flash_ramfunc.c:488:30:HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord 48 static,ignoring_inline_asm
|
||||
stm32l1xx_hal_flash_ramfunc.c:588:37:FLASHRAM_WaitForLastOperation 16 static
|
||||
stm32l1xx_hal_flash_ramfunc.c:542:37:FLASHRAM_SetErrorCode 16 static
|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o: \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
../Core/Inc/stm32l1xx_hal_conf.h \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
|
||||
|
||||
../Core/Inc/stm32l1xx_hal_conf.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
|
||||
|
||||
../Drivers/CMSIS/Include/core_cm3.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_version.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_compiler.h:
|
||||
|
||||
../Drivers/CMSIS/Include/cmsis_gcc.h:
|
||||
|
||||
../Drivers/CMSIS/Include/mpu_armv7.h:
|
||||
|
||||
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
|
||||
|
||||
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|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rtc_ex.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
|
||||
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
|
||||
Binary file not shown.
@ -1,8 +0,0 @@
|
||||
stm32l1xx_hal_gpio.c:178:6:HAL_GPIO_Init 32 static
|
||||
stm32l1xx_hal_gpio.c:304:6:HAL_GPIO_DeInit 32 static
|
||||
stm32l1xx_hal_gpio.c:384:15:HAL_GPIO_ReadPin 24 static
|
||||
stm32l1xx_hal_gpio.c:416:6:HAL_GPIO_WritePin 16 static
|
||||
stm32l1xx_hal_gpio.c:438:6:HAL_GPIO_TogglePin 24 static
|
||||
stm32l1xx_hal_gpio.c:472:19:HAL_GPIO_LockPin 24 static
|
||||
stm32l1xx_hal_gpio.c:507:6:HAL_GPIO_EXTI_IRQHandler 16 static
|
||||
stm32l1xx_hal_gpio.c:522:13:HAL_GPIO_EXTI_Callback 16 static
|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o: \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
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||||
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||||
|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,17 +0,0 @@
|
||||
stm32l1xx_hal_pwr.c:85:6:HAL_PWR_DeInit 4 static
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
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||||
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||||
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||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,7 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,15 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,8 +0,0 @@
|
||||
stm32l1xx_hal_rcc_ex.c:92:19:HAL_RCCEx_PeriphCLKConfig 32 static
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.o: \
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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||||
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||||
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||||
|
||||
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|
||||
|
||||
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||||
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||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,20 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,37 +0,0 @@
|
||||
stm32l1xx_hal_rtc_ex.c:128:19:HAL_RTCEx_SetTimeStamp 24 static
|
||||
stm32l1xx_hal_rtc_ex.c:178:19:HAL_RTCEx_SetTimeStamp_IT 24 static
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
stm32l1xx_hal_rtc_ex.c:565:13:HAL_RTCEx_TimeStampEventCallback 16 static
|
||||
stm32l1xx_hal_rtc_ex.c:580:13:HAL_RTCEx_Tamper1EventCallback 16 static
|
||||
stm32l1xx_hal_rtc_ex.c:596:13:HAL_RTCEx_Tamper2EventCallback 16 static
|
||||
stm32l1xx_hal_rtc_ex.c:611:13:HAL_RTCEx_Tamper3EventCallback 16 static
|
||||
stm32l1xx_hal_rtc_ex.c:628:19:HAL_RTCEx_PollForTimeStampEvent 24 static
|
||||
stm32l1xx_hal_rtc_ex.c:667:19:HAL_RTCEx_PollForTamper1Event 24 static
|
||||
stm32l1xx_hal_rtc_ex.c:700:19:HAL_RTCEx_PollForTamper2Event 24 static
|
||||
stm32l1xx_hal_rtc_ex.c:732:19:HAL_RTCEx_PollForTamper3Event 24 static
|
||||
stm32l1xx_hal_rtc_ex.c:784:19:HAL_RTCEx_SetWakeUpTimer 32 static
|
||||
stm32l1xx_hal_rtc_ex.c:874:19:HAL_RTCEx_SetWakeUpTimer_IT 32 static
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,83 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
|
||||
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|
||||
Binary file not shown.
@ -1,55 +0,0 @@
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
stm32l1xx_hal_uart.c:1738:19:HAL_UART_Abort_IT 24 static
|
||||
stm32l1xx_hal_uart.c:1866:19:HAL_UART_AbortTransmit_IT 16 static
|
||||
stm32l1xx_hal_uart.c:1943:19:HAL_UART_AbortReceive_IT 16 static
|
||||
stm32l1xx_hal_uart.c:2013:6:HAL_UART_IRQHandler 40 static
|
||||
stm32l1xx_hal_uart.c:2159:13:HAL_UART_TxCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2174:13:HAL_UART_TxHalfCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2189:13:HAL_UART_RxCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2204:13:HAL_UART_RxHalfCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2219:13:HAL_UART_ErrorCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2233:13:HAL_UART_AbortCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2248:13:HAL_UART_AbortTransmitCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2263:13:HAL_UART_AbortReceiveCpltCallback 16 static
|
||||
stm32l1xx_hal_uart.c:2302:19:HAL_LIN_SendBreak 16 static
|
||||
stm32l1xx_hal_uart.c:2329:19:HAL_MultiProcessor_EnterMuteMode 16 static
|
||||
stm32l1xx_hal_uart.c:2356:19:HAL_MultiProcessor_ExitMuteMode 16 static
|
||||
stm32l1xx_hal_uart.c:2383:19:HAL_HalfDuplex_EnableTransmitter 24 static
|
||||
stm32l1xx_hal_uart.c:2418:19:HAL_HalfDuplex_EnableReceiver 24 static
|
||||
stm32l1xx_hal_uart.c:2475:23:HAL_UART_GetState 24 static
|
||||
stm32l1xx_hal_uart.c:2490:10:HAL_UART_GetError 16 static
|
||||
stm32l1xx_hal_uart.c:2534:13:UART_DMATransmitCplt 24 static
|
||||
stm32l1xx_hal_uart.c:2569:13:UART_DMATxHalfCplt 24 static
|
||||
stm32l1xx_hal_uart.c:2588:13:UART_DMAReceiveCplt 24 static
|
||||
stm32l1xx_hal_uart.c:2622:13:UART_DMARxHalfCplt 24 static
|
||||
stm32l1xx_hal_uart.c:2641:13:UART_DMAError 24 static
|
||||
stm32l1xx_hal_uart.c:2682:26:UART_WaitOnFlagUntilTimeout 24 static
|
||||
stm32l1xx_hal_uart.c:2714:13:UART_EndTxTransfer 16 static
|
||||
stm32l1xx_hal_uart.c:2728:13:UART_EndRxTransfer 16 static
|
||||
stm32l1xx_hal_uart.c:2745:13:UART_DMAAbortOnError 24 static
|
||||
stm32l1xx_hal_uart.c:2769:13:UART_DMATxAbortCallback 24 static
|
||||
stm32l1xx_hal_uart.c:2814:13:UART_DMARxAbortCallback 24 static
|
||||
stm32l1xx_hal_uart.c:2859:13:UART_DMATxOnlyAbortCallback 24 static
|
||||
stm32l1xx_hal_uart.c:2887:13:UART_DMARxOnlyAbortCallback 24 static
|
||||
stm32l1xx_hal_uart.c:2912:26:UART_Transmit_IT 24 static
|
||||
stm32l1xx_hal_uart.c:2959:26:UART_EndTransmit_IT 16 static
|
||||
stm32l1xx_hal_uart.c:2984:26:UART_Receive_IT 24 static
|
||||
stm32l1xx_hal_uart.c:3055:13:UART_SetConfig 24 static
|
||||
@ -1,99 +0,0 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c \
|
||||
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c
|
||||
|
||||
OBJS += \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o
|
||||
|
||||
C_DEPS += \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.d \
|
||||
./Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.d
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o: ../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c
|
||||
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
|
||||
|
||||
Binary file not shown.
Binary file not shown.
15234
RTC/Debug/RTC.list
15234
RTC/Debug/RTC.list
File diff suppressed because it is too large
Load Diff
5634
RTC/Debug/RTC.map
5634
RTC/Debug/RTC.map
File diff suppressed because it is too large
Load Diff
@ -8,7 +8,7 @@ RM := rm -rf
|
||||
|
||||
# All of the sources participating in the build are defined here
|
||||
-include sources.mk
|
||||
-include Drivers/STM32L1xx_HAL_Driver/Src/subdir.mk
|
||||
-include Drivers/STM32F4xx_HAL_Driver/Src/subdir.mk
|
||||
-include Core/Startup/subdir.mk
|
||||
-include Core/Src/subdir.mk
|
||||
-include subdir.mk
|
||||
@ -28,6 +28,11 @@ endif
|
||||
|
||||
-include ../makefile.defs
|
||||
|
||||
BUILD_ARTIFACT_NAME := RTC
|
||||
BUILD_ARTIFACT_EXTENSION := elf
|
||||
BUILD_ARTIFACT_PREFIX :=
|
||||
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME).$(BUILD_ARTIFACT_EXTENSION)
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
EXECUTABLES += \
|
||||
RTC.elf \
|
||||
@ -43,11 +48,14 @@ RTC.bin \
|
||||
|
||||
|
||||
# All Target
|
||||
all: RTC.elf secondary-outputs
|
||||
all: main-build
|
||||
|
||||
# Main-build Target
|
||||
main-build: RTC.elf secondary-outputs
|
||||
|
||||
# Tool invocations
|
||||
RTC.elf: $(OBJS) $(USER_OBJS) C:\Users\Gregor\Desktop\Projektarbeit\Workspace_Solar_Panel\RTC\STM32L152RETX_FLASH.ld
|
||||
arm-none-eabi-gcc -o "RTC.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m3 -T"C:\Users\Gregor\Desktop\Projektarbeit\Workspace_Solar_Panel\RTC\STM32L152RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RTC.map" -Wl,--gc-sections -static --specs=nano.specs -mfloat-abi=soft -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
RTC.elf: $(OBJS) $(USER_OBJS) C:\Users\Gregor\Desktop\Projektarbeit\Workspace\RTC\STM32F401RETX_FLASH.ld
|
||||
arm-none-eabi-gcc -o "RTC.elf" @"objects.list" $(USER_OBJS) $(LIBS) -mcpu=cortex-m4 -T"C:\Users\Gregor\Desktop\Projektarbeit\Workspace\RTC\STM32F401RETX_FLASH.ld" --specs=nosys.specs -Wl,-Map="RTC.map" -Wl,--gc-sections -static --specs=nano.specs -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb -Wl,--start-group -lc -lm -Wl,--end-group
|
||||
@echo 'Finished building target: $@'
|
||||
@echo ' '
|
||||
|
||||
@ -73,7 +81,14 @@ clean:
|
||||
|
||||
secondary-outputs: $(SIZE_OUTPUT) $(OBJDUMP_LIST) $(OBJCOPY_BIN)
|
||||
|
||||
.PHONY: all clean dependents
|
||||
fail-specified-linker-script-missing:
|
||||
@echo 'Error: Cannot find the specified linker script. Check the linker settings in the build configuration.'
|
||||
@exit 2
|
||||
|
||||
warn-no-linker-script-specified:
|
||||
@echo 'Warning: No linker script specified. Check the linker settings in the build configuration.'
|
||||
|
||||
.PHONY: all clean dependents fail-specified-linker-script-missing warn-no-linker-script-specified
|
||||
.SECONDARY:
|
||||
|
||||
-include ../makefile.targets
|
||||
|
||||
@ -1,24 +1,25 @@
|
||||
"Core/Src/main.o"
|
||||
"Core/Src/stm32l1xx_hal_msp.o"
|
||||
"Core/Src/stm32l1xx_it.o"
|
||||
"Core/Src/stm32f4xx_hal_msp.o"
|
||||
"Core/Src/stm32f4xx_it.o"
|
||||
"Core/Src/syscalls.o"
|
||||
"Core/Src/sysmem.o"
|
||||
"Core/Src/system_stm32l1xx.o"
|
||||
"Core/Startup/startup_stm32l152retx.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rtc_ex.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.o"
|
||||
"Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.o"
|
||||
"Core/Src/system_stm32f4xx.o"
|
||||
"Core/Startup/startup_stm32f401retx.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.o"
|
||||
"Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.o"
|
||||
|
||||
@ -21,5 +21,5 @@ OBJCOPY_BIN :=
|
||||
SUBDIRS := \
|
||||
Core/Src \
|
||||
Core/Startup \
|
||||
Drivers/STM32L1xx_HAL_Driver/Src \
|
||||
Drivers/STM32F4xx_HAL_Driver/Src \
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,246 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS STM32L1xx Device Peripheral Access Layer Header File.
|
||||
*
|
||||
* The file is the unique include file that the application programmer
|
||||
* is using in the C source code, usually in main.c. This file contains:
|
||||
* - Configuration section that allows to select:
|
||||
* - The STM32L1xx device used in the target application
|
||||
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||
* code will be based on direct access to peripheral’s registers
|
||||
* rather than drivers API), this option is controlled by
|
||||
* "#define USE_HAL_DRIVER"
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l1xx
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef __STM32L1XX_H
|
||||
#define __STM32L1XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/** @addtogroup Library_configuration_section
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief STM32 Family
|
||||
*/
|
||||
#if !defined (STM32L1)
|
||||
#define STM32L1
|
||||
#endif /* STM32L1 */
|
||||
|
||||
|
||||
/* Uncomment the line below according to the target STM32L device used in your
|
||||
application
|
||||
*/
|
||||
|
||||
#if !defined (STM32L100xB) && !defined (STM32L100xBA) && !defined (STM32L100xC) && \
|
||||
!defined (STM32L151xB) && !defined (STM32L151xBA) && !defined (STM32L151xC) && !defined (STM32L151xCA) && !defined (STM32L151xD) && !defined (STM32L151xDX) && !defined (STM32L151xE) && \
|
||||
!defined (STM32L152xB) && !defined (STM32L152xBA) && !defined (STM32L152xC) && !defined (STM32L152xCA) && !defined (STM32L152xD) && !defined (STM32L152xDX) && !defined (STM32L152xE) && \
|
||||
!defined (STM32L162xC) && !defined (STM32L162xCA) && !defined (STM32L162xD) && !defined (STM32L162xDX) && !defined (STM32L162xE)
|
||||
/* #define STM32L100xB */ /*!< STM32L100C6, STM32L100R and STM32L100RB Devices */
|
||||
/* #define STM32L100xBA */ /*!< STM32L100C6-A, STM32L100R8-A and STM32L100RB-A Devices */
|
||||
/* #define STM32L100xC */ /*!< STM32L100RC Devices */
|
||||
/* #define STM32L151xB */ /*!< STM32L151C6, STM32L151R6, STM32L151C8, STM32L151R8, STM32L151V8, STM32L151CB, STM32L151RB and STM32L151VB */
|
||||
/* #define STM32L151xBA */ /*!< STM32L151C6-A, STM32L151R6-A, STM32L151C8-A, STM32L151R8-A, STM32L151V8-A, STM32L151CB-A, STM32L151RB-A and STM32L151VB-A */
|
||||
/* #define STM32L151xC */ /*!< STM32L151CC, STM32L151UC, STM32L151RC and STM32L151VC */
|
||||
/* #define STM32L151xCA */ /*!< STM32L151RC-A, STM32L151VC-A, STM32L151QC and STM32L151ZC */
|
||||
/* #define STM32L151xD */ /*!< STM32L151QD, STM32L151RD, STM32L151VD & STM32L151ZD */
|
||||
/* #define STM32L151xDX */ /*!< STM32L151VD-X Devices */
|
||||
/* #define STM32L151xE */ /*!< STM32L151QE, STM32L151RE, STM32L151VE and STM32L151ZE */
|
||||
/* #define STM32L152xB */ /*!< STM32L152C6, STM32L152R6, STM32L152C8, STM32L152R8, STM32L152V8, STM32L152CB, STM32L152RB and STM32L152VB */
|
||||
/* #define STM32L152xBA */ /*!< STM32L152C6-A, STM32L152R6-A, STM32L152C8-A, STM32L152R8-A, STM32L152V8-A, STM32L152CB-A, STM32L152RB-A and STM32L152VB-A */
|
||||
/* #define STM32L152xC */ /*!< STM32L152CC, STM32L152UC, STM32L152RC and STM32L152VC */
|
||||
/* #define STM32L152xCA */ /*!< STM32L152RC-A, STM32L152VC-A, STM32L152QC and STM32L152ZC */
|
||||
/* #define STM32L152xD */ /*!< STM32L152QD, STM32L152RD, STM32L152VD and STM32L152ZD */
|
||||
/* #define STM32L152xDX */ /*!< STM32L152VD-X Devices */
|
||||
/* #define STM32L152xE */ /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */
|
||||
/* #define STM32L162xC */ /*!< STM32L162RC and STM32L162VC */
|
||||
/* #define STM32L162xCA */ /*!< STM32L162RC-A, STM32L162VC-A, STM32L162QC and STM32L162ZC */
|
||||
/* #define STM32L162xD */ /*!< STM32L162QD, STM32L162RD, STM32L162VD and STM32L162ZD */
|
||||
/* #define STM32L162xDX */ /*!< STM32L162VD-X Devices */
|
||||
/* #define STM32L162xE */ /*!< STM32L162RE, STM32L162VE and STM32L162ZE */
|
||||
#endif
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||
devices, you can define the device in your toolchain compiler preprocessor.
|
||||
*/
|
||||
|
||||
#if !defined (USE_HAL_DRIVER)
|
||||
/**
|
||||
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||
In this case, these drivers will not be included and the application code will
|
||||
be based on direct access to peripherals registers
|
||||
*/
|
||||
/*#define USE_HAL_DRIVER */
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
/**
|
||||
* @brief CMSIS Device version number V2.3.1
|
||||
*/
|
||||
#define __STM32L1xx_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */
|
||||
#define __STM32L1xx_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
|
||||
#define __STM32L1xx_CMSIS_VERSION_SUB2 (0x01) /*!< [15:8] sub2 version */
|
||||
#define __STM32L1xx_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||
#define __STM32L1xx_CMSIS_VERSION ((__STM32L1xx_CMSIS_VERSION_MAIN << 24)\
|
||||
|(__STM32L1xx_CMSIS_VERSION_SUB1 << 16)\
|
||||
|(__STM32L1xx_CMSIS_VERSION_SUB2 << 8 )\
|
||||
|(__STM32L1xx_CMSIS_VERSION_RC))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Device_Included
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32L100xB)
|
||||
#include "stm32l100xb.h"
|
||||
#elif defined(STM32L100xBA)
|
||||
#include "stm32l100xba.h"
|
||||
#elif defined(STM32L100xC)
|
||||
#include "stm32l100xc.h"
|
||||
#elif defined(STM32L151xB)
|
||||
#include "stm32l151xb.h"
|
||||
#elif defined(STM32L151xBA)
|
||||
#include "stm32l151xba.h"
|
||||
#elif defined(STM32L151xC)
|
||||
#include "stm32l151xc.h"
|
||||
#elif defined(STM32L151xCA)
|
||||
#include "stm32l151xca.h"
|
||||
#elif defined(STM32L151xD)
|
||||
#include "stm32l151xd.h"
|
||||
#elif defined(STM32L151xDX)
|
||||
#include "stm32l151xdx.h"
|
||||
#elif defined(STM32L151xE)
|
||||
#include "stm32l151xe.h"
|
||||
#elif defined(STM32L152xB)
|
||||
#include "stm32l152xb.h"
|
||||
#elif defined(STM32L152xBA)
|
||||
#include "stm32l152xba.h"
|
||||
#elif defined(STM32L152xC)
|
||||
#include "stm32l152xc.h"
|
||||
#elif defined(STM32L152xCA)
|
||||
#include "stm32l152xca.h"
|
||||
#elif defined(STM32L152xD)
|
||||
#include "stm32l152xd.h"
|
||||
#elif defined(STM32L152xDX)
|
||||
#include "stm32l152xdx.h"
|
||||
#elif defined(STM32L152xE)
|
||||
#include "stm32l152xe.h"
|
||||
#elif defined(STM32L162xC)
|
||||
#include "stm32l162xc.h"
|
||||
#elif defined(STM32L162xCA)
|
||||
#include "stm32l162xca.h"
|
||||
#elif defined(STM32L162xD)
|
||||
#include "stm32l162xd.h"
|
||||
#elif defined(STM32L162xDX)
|
||||
#include "stm32l162xdx.h"
|
||||
#elif defined(STM32L162xE)
|
||||
#include "stm32l162xe.h"
|
||||
#else
|
||||
#error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup Exported_types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
RESET = 0,
|
||||
SET = !RESET
|
||||
} FlagStatus, ITStatus;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DISABLE = 0,
|
||||
ENABLE = !DISABLE
|
||||
} FunctionalState;
|
||||
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SUCCESS = 0,
|
||||
ERROR = !SUCCESS
|
||||
} ErrorStatus;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup Exported_macros
|
||||
* @{
|
||||
*/
|
||||
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||
|
||||
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||
|
||||
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||
|
||||
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||
|
||||
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||
|
||||
#define READ_REG(REG) ((REG))
|
||||
|
||||
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||
|
||||
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined (USE_HAL_DRIVER)
|
||||
#include "stm32l1xx_hal.h"
|
||||
#endif /* USE_HAL_DRIVER */
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* __STM32L1xx_H */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,108 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32l1xx.h
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M3 Device System Source File for STM32L1xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32l1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32L1XX_H
|
||||
#define __SYSTEM_STM32L1XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
/*
|
||||
*/
|
||||
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
|
||||
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
|
||||
extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32L1xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32L1XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,996 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains all the functions prototypes for the HAL
|
||||
* module driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_HAL_H
|
||||
#define __STM32L1xx_HAL_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal_conf.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup HAL
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup HAL_Exported_Constants HAL Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup HAL_TICK_FREQ Tick Frequency
|
||||
* @{
|
||||
*/
|
||||
#define HAL_TICK_FREQ_10HZ 100U
|
||||
#define HAL_TICK_FREQ_100HZ 10U
|
||||
#define HAL_TICK_FREQ_1KHZ 1U
|
||||
#define HAL_TICK_FREQ_DEFAULT HAL_TICK_FREQ_1KHZ
|
||||
|
||||
#define IS_TICKFREQ(__FREQ__) (((__FREQ__) == HAL_TICK_FREQ_10HZ) || \
|
||||
((__FREQ__) == HAL_TICK_FREQ_100HZ) || \
|
||||
((__FREQ__) == HAL_TICK_FREQ_1KHZ))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Constants SYSCFG: SYStem ConFiG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_BootMode Boot Mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define SYSCFG_BOOT_MAINFLASH (0x00000000U)
|
||||
#define SYSCFG_BOOT_SYSTEMFLASH ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE_0)
|
||||
#if defined(FSMC_R_BASE)
|
||||
#define SYSCFG_BOOT_FSMC ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE_1)
|
||||
#endif /* FSMC_R_BASE */
|
||||
#define SYSCFG_BOOT_SRAM ((uint32_t)SYSCFG_MEMRMP_BOOT_MODE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_Constants RI: Routing Interface
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RI_InputCapture Input Capture
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define RI_INPUTCAPTURE_IC1 RI_ICR_IC1 /*!< Input Capture 1 */
|
||||
#define RI_INPUTCAPTURE_IC2 RI_ICR_IC2 /*!< Input Capture 2 */
|
||||
#define RI_INPUTCAPTURE_IC3 RI_ICR_IC3 /*!< Input Capture 3 */
|
||||
#define RI_INPUTCAPTURE_IC4 RI_ICR_IC4 /*!< Input Capture 4 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup TIM_Select TIM Select
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define TIM_SELECT_NONE (0x00000000U) /*!< None selected */
|
||||
#define TIM_SELECT_TIM2 ((uint32_t)RI_ICR_TIM_0) /*!< Timer 2 selected */
|
||||
#define TIM_SELECT_TIM3 ((uint32_t)RI_ICR_TIM_1) /*!< Timer 3 selected */
|
||||
#define TIM_SELECT_TIM4 ((uint32_t)RI_ICR_TIM) /*!< Timer 4 selected */
|
||||
|
||||
#define IS_RI_TIM(__TIM__) (((__TIM__) == TIM_SELECT_NONE) || \
|
||||
((__TIM__) == TIM_SELECT_TIM2) || \
|
||||
((__TIM__) == TIM_SELECT_TIM3) || \
|
||||
((__TIM__) == TIM_SELECT_TIM4))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_InputCaptureRouting Input Capture Routing
|
||||
* @{
|
||||
*/
|
||||
/* TIMx_IC1 TIMx_IC2 TIMx_IC3 TIMx_IC4 */
|
||||
#define RI_INPUTCAPTUREROUTING_0 (0x00000000U) /* PA0 PA1 PA2 PA3 */
|
||||
#define RI_INPUTCAPTUREROUTING_1 (0x00000001U) /* PA4 PA5 PA6 PA7 */
|
||||
#define RI_INPUTCAPTUREROUTING_2 (0x00000002U) /* PA8 PA9 PA10 PA11 */
|
||||
#define RI_INPUTCAPTUREROUTING_3 (0x00000003U) /* PA12 PA13 PA14 PA15 */
|
||||
#define RI_INPUTCAPTUREROUTING_4 (0x00000004U) /* PC0 PC1 PC2 PC3 */
|
||||
#define RI_INPUTCAPTUREROUTING_5 (0x00000005U) /* PC4 PC5 PC6 PC7 */
|
||||
#define RI_INPUTCAPTUREROUTING_6 (0x00000006U) /* PC8 PC9 PC10 PC11 */
|
||||
#define RI_INPUTCAPTUREROUTING_7 (0x00000007U) /* PC12 PC13 PC14 PC15 */
|
||||
#define RI_INPUTCAPTUREROUTING_8 (0x00000008U) /* PD0 PD1 PD2 PD3 */
|
||||
#define RI_INPUTCAPTUREROUTING_9 (0x00000009U) /* PD4 PD5 PD6 PD7 */
|
||||
#define RI_INPUTCAPTUREROUTING_10 (0x0000000AU) /* PD8 PD9 PD10 PD11 */
|
||||
#define RI_INPUTCAPTUREROUTING_11 (0x0000000BU) /* PD12 PD13 PD14 PD15 */
|
||||
#define RI_INPUTCAPTUREROUTING_12 (0x0000000CU) /* PE0 PE1 PE2 PE3 */
|
||||
#define RI_INPUTCAPTUREROUTING_13 (0x0000000DU) /* PE4 PE5 PE6 PE7 */
|
||||
#define RI_INPUTCAPTUREROUTING_14 (0x0000000EU) /* PE8 PE9 PE10 PE11 */
|
||||
#define RI_INPUTCAPTUREROUTING_15 (0x0000000FU) /* PE12 PE13 PE14 PE15 */
|
||||
|
||||
#define IS_RI_INPUTCAPTURE_ROUTING(__ROUTING__) (((__ROUTING__) == RI_INPUTCAPTUREROUTING_0) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_1) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_2) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_3) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_4) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_5) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_6) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_7) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_8) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_9) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_10) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_11) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_12) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_13) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_14) || \
|
||||
((__ROUTING__) == RI_INPUTCAPTUREROUTING_15))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_IOSwitch IO Switch
|
||||
* @{
|
||||
*/
|
||||
#define RI_ASCR1_REGISTER (0x80000000U)
|
||||
/* ASCR1 I/O switch: bit 31 is set to '1' to indicate that the mask is in ASCR1 register */
|
||||
#define RI_IOSWITCH_CH0 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_0)
|
||||
#define RI_IOSWITCH_CH1 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_1)
|
||||
#define RI_IOSWITCH_CH2 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_2)
|
||||
#define RI_IOSWITCH_CH3 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_3)
|
||||
#define RI_IOSWITCH_CH4 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_4)
|
||||
#define RI_IOSWITCH_CH5 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_5)
|
||||
#define RI_IOSWITCH_CH6 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_6)
|
||||
#define RI_IOSWITCH_CH7 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_7)
|
||||
#define RI_IOSWITCH_CH8 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_8)
|
||||
#define RI_IOSWITCH_CH9 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_9)
|
||||
#define RI_IOSWITCH_CH10 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_10)
|
||||
#define RI_IOSWITCH_CH11 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_11)
|
||||
#define RI_IOSWITCH_CH12 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_12)
|
||||
#define RI_IOSWITCH_CH13 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_13)
|
||||
#define RI_IOSWITCH_CH14 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_14)
|
||||
#define RI_IOSWITCH_CH15 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_15)
|
||||
#define RI_IOSWITCH_CH18 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_18)
|
||||
#define RI_IOSWITCH_CH19 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_19)
|
||||
#define RI_IOSWITCH_CH20 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_20)
|
||||
#define RI_IOSWITCH_CH21 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_21)
|
||||
#define RI_IOSWITCH_CH22 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_22)
|
||||
#define RI_IOSWITCH_CH23 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_23)
|
||||
#define RI_IOSWITCH_CH24 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_24)
|
||||
#define RI_IOSWITCH_CH25 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_25)
|
||||
#define RI_IOSWITCH_VCOMP ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_VCOMP) /* VCOMP (ADC channel 26) is an internal switch used to connect selected channel to COMP1 non inverting input */
|
||||
#if defined (RI_ASCR2_CH1b) /* STM32L1 devices category Cat.4 and Cat.5 */
|
||||
#define RI_IOSWITCH_CH27 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_27)
|
||||
#define RI_IOSWITCH_CH28 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_28)
|
||||
#define RI_IOSWITCH_CH29 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_29)
|
||||
#define RI_IOSWITCH_CH30 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_30)
|
||||
#define RI_IOSWITCH_CH31 ((uint32_t)RI_ASCR1_REGISTER | RI_ASCR1_CH_31)
|
||||
#endif /* RI_ASCR2_CH1b */
|
||||
|
||||
/* ASCR2 IO switch: bit 31 is set to '0' to indicate that the mask is in ASCR2 register */
|
||||
#define RI_IOSWITCH_GR10_1 ((uint32_t)RI_ASCR2_GR10_1)
|
||||
#define RI_IOSWITCH_GR10_2 ((uint32_t)RI_ASCR2_GR10_2)
|
||||
#define RI_IOSWITCH_GR10_3 ((uint32_t)RI_ASCR2_GR10_3)
|
||||
#define RI_IOSWITCH_GR10_4 ((uint32_t)RI_ASCR2_GR10_4)
|
||||
#define RI_IOSWITCH_GR6_1 ((uint32_t)RI_ASCR2_GR6_1)
|
||||
#define RI_IOSWITCH_GR6_2 ((uint32_t)RI_ASCR2_GR6_2)
|
||||
#define RI_IOSWITCH_GR5_1 ((uint32_t)RI_ASCR2_GR5_1)
|
||||
#define RI_IOSWITCH_GR5_2 ((uint32_t)RI_ASCR2_GR5_2)
|
||||
#define RI_IOSWITCH_GR5_3 ((uint32_t)RI_ASCR2_GR5_3)
|
||||
#define RI_IOSWITCH_GR4_1 ((uint32_t)RI_ASCR2_GR4_1)
|
||||
#define RI_IOSWITCH_GR4_2 ((uint32_t)RI_ASCR2_GR4_2)
|
||||
#define RI_IOSWITCH_GR4_3 ((uint32_t)RI_ASCR2_GR4_3)
|
||||
#if defined (RI_ASCR2_CH0b) /* STM32L1 devices category Cat.3, Cat.4 and Cat.5 */
|
||||
#define RI_IOSWITCH_CH0b ((uint32_t)RI_ASCR2_CH0b)
|
||||
#if defined (RI_ASCR2_CH1b) /* STM32L1 devices category Cat.4 and Cat.5 */
|
||||
#define RI_IOSWITCH_CH1b ((uint32_t)RI_ASCR2_CH1b)
|
||||
#define RI_IOSWITCH_CH2b ((uint32_t)RI_ASCR2_CH2b)
|
||||
#define RI_IOSWITCH_CH3b ((uint32_t)RI_ASCR2_CH3b)
|
||||
#define RI_IOSWITCH_CH6b ((uint32_t)RI_ASCR2_CH6b)
|
||||
#define RI_IOSWITCH_CH7b ((uint32_t)RI_ASCR2_CH7b)
|
||||
#define RI_IOSWITCH_CH8b ((uint32_t)RI_ASCR2_CH8b)
|
||||
#define RI_IOSWITCH_CH9b ((uint32_t)RI_ASCR2_CH9b)
|
||||
#define RI_IOSWITCH_CH10b ((uint32_t)RI_ASCR2_CH10b)
|
||||
#define RI_IOSWITCH_CH11b ((uint32_t)RI_ASCR2_CH11b)
|
||||
#define RI_IOSWITCH_CH12b ((uint32_t)RI_ASCR2_CH12b)
|
||||
#endif /* RI_ASCR2_CH1b */
|
||||
#define RI_IOSWITCH_GR6_3 ((uint32_t)RI_ASCR2_GR6_3)
|
||||
#define RI_IOSWITCH_GR6_4 ((uint32_t)RI_ASCR2_GR6_4)
|
||||
#endif /* RI_ASCR2_CH0b */
|
||||
|
||||
|
||||
#if defined (RI_ASCR2_CH1b) /* STM32L1 devices category Cat.4 and Cat.5 */
|
||||
|
||||
#define IS_RI_IOSWITCH(__IOSWITCH__) (((__IOSWITCH__) == RI_IOSWITCH_CH0) || ((__IOSWITCH__) == RI_IOSWITCH_CH1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH2) || ((__IOSWITCH__) == RI_IOSWITCH_CH3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH4) || ((__IOSWITCH__) == RI_IOSWITCH_CH5) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH6) || ((__IOSWITCH__) == RI_IOSWITCH_CH7) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH8) || ((__IOSWITCH__) == RI_IOSWITCH_CH9) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH10) || ((__IOSWITCH__) == RI_IOSWITCH_CH11) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH12) || ((__IOSWITCH__) == RI_IOSWITCH_CH13) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH14) || ((__IOSWITCH__) == RI_IOSWITCH_CH15) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH18) || ((__IOSWITCH__) == RI_IOSWITCH_CH19) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH20) || ((__IOSWITCH__) == RI_IOSWITCH_CH21) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH22) || ((__IOSWITCH__) == RI_IOSWITCH_CH23) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH24) || ((__IOSWITCH__) == RI_IOSWITCH_CH25) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_VCOMP) || ((__IOSWITCH__) == RI_IOSWITCH_CH27) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH28) || ((__IOSWITCH__) == RI_IOSWITCH_CH29) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH30) || ((__IOSWITCH__) == RI_IOSWITCH_CH31) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR10_1) || ((__IOSWITCH__) == RI_IOSWITCH_GR10_2) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR10_3) || ((__IOSWITCH__) == RI_IOSWITCH_GR10_4) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR6_1) || ((__IOSWITCH__) == RI_IOSWITCH_GR6_2) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR6_3) || ((__IOSWITCH__) == RI_IOSWITCH_GR6_4) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR5_1) || ((__IOSWITCH__) == RI_IOSWITCH_GR5_2) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR5_3) || ((__IOSWITCH__) == RI_IOSWITCH_GR4_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR4_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR4_3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH0b) || ((__IOSWITCH__) == RI_IOSWITCH_CH1b) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH2b) || ((__IOSWITCH__) == RI_IOSWITCH_CH3b) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH6b) || ((__IOSWITCH__) == RI_IOSWITCH_CH7b) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH8b) || ((__IOSWITCH__) == RI_IOSWITCH_CH9b) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH10b) || ((__IOSWITCH__) == RI_IOSWITCH_CH11b) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH12b))
|
||||
|
||||
#else /* !RI_ASCR2_CH1b */
|
||||
|
||||
#if defined (RI_ASCR2_CH0b) /* STM32L1 devices category Cat.3 */
|
||||
|
||||
#define IS_RI_IOSWITCH(__IOSWITCH__) (((__IOSWITCH__) == RI_IOSWITCH_CH0) || ((__IOSWITCH__) == RI_IOSWITCH_CH1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH2) || ((__IOSWITCH__) == RI_IOSWITCH_CH3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH4) || ((__IOSWITCH__) == RI_IOSWITCH_CH5) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH6) || ((__IOSWITCH__) == RI_IOSWITCH_CH7) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH8) || ((__IOSWITCH__) == RI_IOSWITCH_CH9) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH10) || ((__IOSWITCH__) == RI_IOSWITCH_CH11) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH12) || ((__IOSWITCH__) == RI_IOSWITCH_CH13) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH14) || ((__IOSWITCH__) == RI_IOSWITCH_CH15) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH18) || ((__IOSWITCH__) == RI_IOSWITCH_CH19) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH20) || ((__IOSWITCH__) == RI_IOSWITCH_CH21) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH22) || ((__IOSWITCH__) == RI_IOSWITCH_CH23) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH24) || ((__IOSWITCH__) == RI_IOSWITCH_CH25) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_VCOMP) || ((__IOSWITCH__) == RI_IOSWITCH_GR10_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR10_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR10_3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR10_4) || ((__IOSWITCH__) == RI_IOSWITCH_GR6_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR6_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR5_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR5_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR5_3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR4_1) || ((__IOSWITCH__) == RI_IOSWITCH_GR4_2) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR4_3) || ((__IOSWITCH__) == RI_IOSWITCH_CH0b))
|
||||
|
||||
#else /* !RI_ASCR2_CH0b */ /* STM32L1 devices category Cat.1 and Cat.2 */
|
||||
|
||||
#define IS_RI_IOSWITCH(__IOSWITCH__) (((__IOSWITCH__) == RI_IOSWITCH_CH0) || ((__IOSWITCH__) == RI_IOSWITCH_CH1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH2) || ((__IOSWITCH__) == RI_IOSWITCH_CH3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH4) || ((__IOSWITCH__) == RI_IOSWITCH_CH5) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH6) || ((__IOSWITCH__) == RI_IOSWITCH_CH7) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH8) || ((__IOSWITCH__) == RI_IOSWITCH_CH9) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH10) || ((__IOSWITCH__) == RI_IOSWITCH_CH11) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH12) || ((__IOSWITCH__) == RI_IOSWITCH_CH13) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH14) || ((__IOSWITCH__) == RI_IOSWITCH_CH15) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH18) || ((__IOSWITCH__) == RI_IOSWITCH_CH19) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH20) || ((__IOSWITCH__) == RI_IOSWITCH_CH21) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH22) || ((__IOSWITCH__) == RI_IOSWITCH_CH23) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_CH24) || ((__IOSWITCH__) == RI_IOSWITCH_CH25) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_VCOMP) || ((__IOSWITCH__) == RI_IOSWITCH_GR10_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR10_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR10_3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR10_4) || ((__IOSWITCH__) == RI_IOSWITCH_GR6_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR6_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR5_1) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR5_2) || ((__IOSWITCH__) == RI_IOSWITCH_GR5_3) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR4_1) || ((__IOSWITCH__) == RI_IOSWITCH_GR4_2) || \
|
||||
((__IOSWITCH__) == RI_IOSWITCH_GR4_3))
|
||||
|
||||
#endif /* RI_ASCR2_CH0b */
|
||||
#endif /* RI_ASCR2_CH1b */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_Pin PIN define
|
||||
* @{
|
||||
*/
|
||||
#define RI_PIN_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
||||
#define RI_PIN_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
||||
#define RI_PIN_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
||||
#define RI_PIN_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
||||
#define RI_PIN_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
||||
#define RI_PIN_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
||||
#define RI_PIN_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
||||
#define RI_PIN_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
||||
#define RI_PIN_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
||||
#define RI_PIN_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
||||
#define RI_PIN_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
||||
#define RI_PIN_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
||||
#define RI_PIN_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
||||
#define RI_PIN_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
||||
#define RI_PIN_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
||||
#define RI_PIN_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
||||
#define RI_PIN_ALL ((uint16_t)0xFFFF) /*!< All pins selected */
|
||||
|
||||
#define IS_RI_PIN(__PIN__) ((__PIN__) != (uint16_t)0x00)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
|
||||
/** @defgroup HAL_Exported_Macros HAL Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DBGMCU_Macros DBGMCU: Debug MCU
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DBGMCU_Freeze_Unfreeze Freeze Unfreeze Peripherals in Debug mode
|
||||
* @brief Freeze/Unfreeze Peripherals in Debug mode
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief TIM2 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_TIM2_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM2_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM2_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM3 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_TIM3_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM3() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM3_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM3() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM3_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM4 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_TIM4_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM4() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM4_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM4() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM4_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM5 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_TIM5_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM5() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM5_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM5() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM5_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM6 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_TIM6_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM6_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM7 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_TIM7_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_TIM7_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief RTC Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_RTC_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_RTC_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief WWDG Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_WWDG_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_WWDG_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief IWDG Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_IWDG_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_IWDG_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C1 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
|
||||
#define __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
|
||||
#define __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief I2C2 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
|
||||
#define __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
|
||||
#define __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZ, DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM9 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB2_FZ_DBG_TIM9_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM9() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM9_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM9() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM9_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM10 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB2_FZ_DBG_TIM10_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM10() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM10_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM10() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM10_STOP)
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief TIM11 Peripherals Debug mode
|
||||
*/
|
||||
#if defined (DBGMCU_APB2_FZ_DBG_TIM11_STOP)
|
||||
#define __HAL_DBGMCU_FREEZE_TIM11() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM11_STOP)
|
||||
#define __HAL_DBGMCU_UNFREEZE_TIM11() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2_FZ_DBG_TIM11_STOP)
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_Macros SYSCFG: SYStem ConFiG
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_VrefInt VREFINT configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the output of internal reference voltage
|
||||
* (VrefInt) on I/O pin.
|
||||
* @note The VrefInt output can be routed to any I/O in group 3:
|
||||
* - For Cat.1 and Cat.2 devices: CH8 (PB0) or CH9 (PB1).
|
||||
* - For Cat.3 devices: CH8 (PB0), CH9 (PB1) or CH0b (PB2).
|
||||
* - For Cat.4 and Cat.5 devices: CH8 (PB0), CH9 (PB1), CH0b (PB2),
|
||||
* CH1b (PF11) or CH2b (PF12).
|
||||
* Note: Comparator peripheral clock must be preliminarily enabled,
|
||||
* either in COMP user function "HAL_COMP_MspInit()" (should be
|
||||
* done if comparators are used) or by direct clock enable:
|
||||
* Refer to macro "__HAL_RCC_COMP_CLK_ENABLE()".
|
||||
* Note: In addition with this macro, VrefInt output buffer must be
|
||||
* connected to the selected I/O pin. Refer to macro
|
||||
* "__HAL_RI_IOSWITCH_CLOSE()".
|
||||
* @note VrefInt output enable: Internal reference voltage connected to I/O group 3
|
||||
* VrefInt output disable: Internal reference voltage disconnected from I/O group 3
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_SYSCFG_VREFINT_OUT_ENABLE() SET_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
|
||||
#define __HAL_SYSCFG_VREFINT_OUT_DISABLE() CLEAR_BIT(COMP->CSR, COMP_CSR_VREFOUTEN)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_BootModeConfig Boot Mode Configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Main Flash memory mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
|
||||
|
||||
/** @brief System Flash memory mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0)
|
||||
|
||||
/** @brief Embedded SRAM mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1)
|
||||
|
||||
#if defined(FSMC_R_BASE)
|
||||
/** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
|
||||
*/
|
||||
#define __HAL_SYSCFG_REMAPMEMORY_FSMC() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_1)
|
||||
|
||||
#endif /* FSMC_R_BASE */
|
||||
|
||||
/**
|
||||
* @brief Returns the boot mode as configured by user.
|
||||
* @retval The boot mode as configured by user. The returned value can be one
|
||||
* of the following values:
|
||||
* @arg SYSCFG_BOOT_MAINFLASH
|
||||
* @arg SYSCFG_BOOT_SYSTEMFLASH
|
||||
* @arg SYSCFG_BOOT_FSMC (available only for STM32L151xD, STM32L152xD & STM32L162xD)
|
||||
* @arg SYSCFG_BOOT_SRAM
|
||||
*/
|
||||
#define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_BOOT_MODE)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup SYSCFG_USBConfig USB DP line Configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Control the internal pull-up on USB DP line.
|
||||
*/
|
||||
#define __HAL_SYSCFG_USBPULLUP_ENABLE() SET_BIT(SYSCFG->PMC, SYSCFG_PMC_USB_PU)
|
||||
|
||||
#define __HAL_SYSCFG_USBPULLUP_DISABLE() CLEAR_BIT(SYSCFG->PMC, SYSCFG_PMC_USB_PU)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_Macris RI: Routing Interface
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RI_InputCaputureConfig Input Capture configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Configures the routing interface to map Input Capture 1 of TIMx to a selected I/O pin.
|
||||
* @param __TIMSELECT__ Timer select.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
|
||||
* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
|
||||
* @param __INPUT__ selects which pin to be routed to Input Capture.
|
||||
* This parameter must be a value of @ref RI_InputCaptureRouting
|
||||
* e.g.
|
||||
* __HAL_RI_REMAP_INPUTCAPTURE1(TIM_SELECT_TIM2, RI_INPUTCAPTUREROUTING_1)
|
||||
* allows routing of Input capture IC1 of TIM2 to PA4.
|
||||
* For details about correspondence between RI_INPUTCAPTUREROUTING_x
|
||||
* and I/O pins refer to the parameters' description in the header file
|
||||
* or refer to the product reference manual.
|
||||
* @note Input capture selection bits are not reset by this function.
|
||||
* To reset input capture selection bits, use SYSCFG_RIDeInit() function.
|
||||
* @note The I/O should be configured in alternate function mode (AF14) using
|
||||
* GPIO_PinAFConfig() function.
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_RI_REMAP_INPUTCAPTURE1(__TIMSELECT__, __INPUT__) \
|
||||
do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
|
||||
assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
|
||||
SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC1); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_IC1OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC1OS)); \
|
||||
}while(0)
|
||||
|
||||
/**
|
||||
* @brief Configures the routing interface to map Input Capture 2 of TIMx to a selected I/O pin.
|
||||
* @param __TIMSELECT__ Timer select.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
|
||||
* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
|
||||
* @param __INPUT__ selects which pin to be routed to Input Capture.
|
||||
* This parameter must be a value of @ref RI_InputCaptureRouting
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_RI_REMAP_INPUTCAPTURE2(__TIMSELECT__, __INPUT__) \
|
||||
do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
|
||||
assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
|
||||
SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC2); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_IC2OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC2OS)); \
|
||||
}while(0)
|
||||
|
||||
/**
|
||||
* @brief Configures the routing interface to map Input Capture 3 of TIMx to a selected I/O pin.
|
||||
* @param __TIMSELECT__ Timer select.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
|
||||
* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
|
||||
* @param __INPUT__ selects which pin to be routed to Input Capture.
|
||||
* This parameter must be a value of @ref RI_InputCaptureRouting
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_RI_REMAP_INPUTCAPTURE3(__TIMSELECT__, __INPUT__) \
|
||||
do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
|
||||
assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
|
||||
SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC3); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_IC3OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC3OS)); \
|
||||
}while(0)
|
||||
|
||||
/**
|
||||
* @brief Configures the routing interface to map Input Capture 4 of TIMx to a selected I/O pin.
|
||||
* @param __TIMSELECT__ Timer select.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg TIM_SELECT_NONE: No timer selected and default Timer mapping is enabled.
|
||||
* @arg TIM_SELECT_TIM2: Timer 2 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM3: Timer 3 Input Captures to be routed.
|
||||
* @arg TIM_SELECT_TIM4: Timer 4 Input Captures to be routed.
|
||||
* @param __INPUT__ selects which pin to be routed to Input Capture.
|
||||
* This parameter must be a value of @ref RI_InputCaptureRouting
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_RI_REMAP_INPUTCAPTURE4(__TIMSELECT__, __INPUT__) \
|
||||
do {assert_param(IS_RI_TIM(__TIMSELECT__)); \
|
||||
assert_param(IS_RI_INPUTCAPTURE_ROUTING(__INPUT__)); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_TIM, (__TIMSELECT__)); \
|
||||
SET_BIT(RI->ICR, RI_INPUTCAPTURE_IC4); \
|
||||
MODIFY_REG(RI->ICR, RI_ICR_IC4OS, (__INPUT__) << POSITION_VAL(RI_ICR_IC4OS)); \
|
||||
}while(0)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_SwitchControlConfig Switch Control configuration
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable or disable the switch control mode.
|
||||
* @note ENABLE: ADC analog switches closed if the corresponding
|
||||
* I/O switch is also closed.
|
||||
* When using COMP1, switch control mode must be enabled.
|
||||
* @note DISABLE: ADC analog switches open or controlled by the ADC interface.
|
||||
* When using the ADC for acquisition, switch control mode
|
||||
* must be disabled.
|
||||
* @note COMP1 comparator and ADC cannot be used at the same time since
|
||||
* they share the ADC switch matrix.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_SWITCHCONTROLMODE_ENABLE() SET_BIT(RI->ASCR1, RI_ASCR1_SCM)
|
||||
|
||||
#define __HAL_RI_SWITCHCONTROLMODE_DISABLE() CLEAR_BIT(RI->ASCR1, RI_ASCR1_SCM)
|
||||
|
||||
/*
|
||||
* @brief Close or Open the routing interface Input Output switches.
|
||||
* @param __IOSWITCH__ selects the I/O analog switch number.
|
||||
* This parameter must be a value of @ref RI_IOSwitch
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_IOSWITCH_CLOSE(__IOSWITCH__) do { assert_param(IS_RI_IOSWITCH(__IOSWITCH__)); \
|
||||
if ((__IOSWITCH__) >> 31 != 0 ) \
|
||||
{ \
|
||||
SET_BIT(RI->ASCR1, (__IOSWITCH__) & 0x7FFFFFFF); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
SET_BIT(RI->ASCR2, (__IOSWITCH__)); \
|
||||
} \
|
||||
}while(0)
|
||||
|
||||
#define __HAL_RI_IOSWITCH_OPEN(__IOSWITCH__) do { assert_param(IS_RI_IOSWITCH(__IOSWITCH__)); \
|
||||
if ((__IOSWITCH__) >> 31 != 0 ) \
|
||||
{ \
|
||||
CLEAR_BIT(RI->ASCR1, (__IOSWITCH__) & 0x7FFFFFFF); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
CLEAR_BIT(RI->ASCR2, (__IOSWITCH__)); \
|
||||
} \
|
||||
}while(0)
|
||||
|
||||
#if defined (COMP_CSR_SW1)
|
||||
/**
|
||||
* @brief Close or open the internal switch COMP1_SW1.
|
||||
* This switch connects I/O pin PC3 (can be used as ADC channel 13)
|
||||
* and OPAMP3 ouput to ADC switch matrix (ADC channel VCOMP, channel
|
||||
* 26) and COMP1 non-inverting input.
|
||||
* Pin PC3 connection depends on another switch setting, refer to
|
||||
* macro "__HAL_ADC_CHANNEL_SPEED_FAST()".
|
||||
* @retval None.
|
||||
*/
|
||||
#define __HAL_RI_SWITCH_COMP1_SW1_CLOSE() SET_BIT(COMP->CSR, COMP_CSR_SW1)
|
||||
|
||||
#define __HAL_RI_SWITCH_COMP1_SW1_OPEN() CLEAR_BIT(COMP->CSR, COMP_CSR_SW1)
|
||||
#endif /* COMP_CSR_SW1 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup RI_HystConfig Hysteresis Activation and Deactivation
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports A
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTA_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR1, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTA_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR1, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports B
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTB_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR1, (__IOPIN__) << 16 ); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTB_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR1, (__IOPIN__) << 16 ); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports C
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTC_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR2, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTC_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR2, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports D
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTD_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR2, (__IOPIN__) << 16 ); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTD_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR2, (__IOPIN__) << 16 ); \
|
||||
} while(0)
|
||||
|
||||
#if defined (GPIOE_BASE)
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports E
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTE_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR3, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTE_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR3, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
#endif /* GPIOE_BASE */
|
||||
|
||||
#if defined(GPIOF_BASE) || defined(GPIOG_BASE)
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports F
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTF_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR3, (__IOPIN__) << 16 ); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTF_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR3, (__IOPIN__) << 16 ); \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports G
|
||||
* When the I/Os are programmed in input mode by standard I/O port
|
||||
* registers, the Schmitt trigger and the hysteresis are enabled by default.
|
||||
* When hysteresis is disabled, it is possible to read the
|
||||
* corresponding port with a trigger level of VDDIO/2.
|
||||
* @param __IOPIN__ : Selects the pin(s) on which to enable or disable hysteresis.
|
||||
* This parameter must be a value of @ref RI_Pin
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RI_HYSTERIS_PORTG_ON(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
CLEAR_BIT(RI->HYSCR4, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
#define __HAL_RI_HYSTERIS_PORTG_OFF(__IOPIN__) do {assert_param(IS_RI_PIN(__IOPIN__)); \
|
||||
SET_BIT(RI->HYSCR4, (__IOPIN__)); \
|
||||
} while(0)
|
||||
|
||||
#endif /* GPIOF_BASE || GPIOG_BASE */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported variables --------------------------------------------------------*/
|
||||
/** @defgroup HAL_Exported_Variables HAL Exported Variables
|
||||
* @{
|
||||
*/
|
||||
extern __IO uint32_t uwTick;
|
||||
extern uint32_t uwTickPrio;
|
||||
extern uint32_t uwTickFreq;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup HAL_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup HAL_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Initialization and de-initialization functions ******************************/
|
||||
HAL_StatusTypeDef HAL_Init(void);
|
||||
HAL_StatusTypeDef HAL_DeInit(void);
|
||||
void HAL_MspInit(void);
|
||||
void HAL_MspDeInit(void);
|
||||
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HAL_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Peripheral Control functions ************************************************/
|
||||
void HAL_IncTick(void);
|
||||
void HAL_Delay(uint32_t Delay);
|
||||
uint32_t HAL_GetTick(void);
|
||||
uint32_t HAL_GetTickPrio(void);
|
||||
HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq);
|
||||
uint32_t HAL_GetTickFreq(void);
|
||||
void HAL_SuspendTick(void);
|
||||
void HAL_ResumeTick(void);
|
||||
uint32_t HAL_GetHalVersion(void);
|
||||
uint32_t HAL_GetREVID(void);
|
||||
uint32_t HAL_GetDEVID(void);
|
||||
uint32_t HAL_GetUIDw0(void);
|
||||
uint32_t HAL_GetUIDw1(void);
|
||||
uint32_t HAL_GetUIDw2(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup HAL_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* DBGMCU Peripheral Control functions *****************************************/
|
||||
void HAL_DBGMCU_EnableDBGSleepMode(void);
|
||||
void HAL_DBGMCU_DisableDBGSleepMode(void);
|
||||
void HAL_DBGMCU_EnableDBGStopMode(void);
|
||||
void HAL_DBGMCU_DisableDBGStopMode(void);
|
||||
void HAL_DBGMCU_EnableDBGStandbyMode(void);
|
||||
void HAL_DBGMCU_DisableDBGStandbyMode(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_HAL_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,437 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_cortex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of CORTEX HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_HAL_CORTEX_H
|
||||
#define __STM32L1xx_HAL_CORTEX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CORTEX
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Types Cortex Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
|
||||
* @brief MPU Region initialization structure
|
||||
* @{
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint8_t Enable; /*!< Specifies the status of the region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
|
||||
uint8_t Number; /*!< Specifies the number of the region to protect.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Number */
|
||||
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
|
||||
uint8_t Size; /*!< Specifies the size of the region to protect.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Size */
|
||||
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
|
||||
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
|
||||
uint8_t TypeExtField; /*!< Specifies the TEX field level.
|
||||
This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
|
||||
uint8_t AccessPermission; /*!< Specifies the region access permission type.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
|
||||
uint8_t DisableExec; /*!< Specifies the instruction access status.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
|
||||
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
|
||||
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
|
||||
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
|
||||
This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
|
||||
}MPU_Region_InitTypeDef;
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define NVIC_PRIORITYGROUP_0 (0x00000007U) /*!< 0 bits for pre-emption priority
|
||||
4 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_1 (0x00000006U) /*!< 1 bits for pre-emption priority
|
||||
3 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_2 (0x00000005U) /*!< 2 bits for pre-emption priority
|
||||
2 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_3 (0x00000004U) /*!< 3 bits for pre-emption priority
|
||||
1 bits for subpriority */
|
||||
#define NVIC_PRIORITYGROUP_4 (0x00000003U) /*!< 4 bits for pre-emption priority
|
||||
0 bits for subpriority */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source
|
||||
* @{
|
||||
*/
|
||||
#define SYSTICK_CLKSOURCE_HCLK_DIV8 (0x00000000U)
|
||||
#define SYSTICK_CLKSOURCE_HCLK (0x00000004U)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control MPU HFNMI and PRIVILEGED Access control
|
||||
* @{
|
||||
*/
|
||||
#define MPU_HFNMI_PRIVDEF_NONE (0x00000000U)
|
||||
#define MPU_HARDFAULT_NMI (MPU_CTRL_HFNMIENA_Msk)
|
||||
#define MPU_PRIVILEGED_DEFAULT (MPU_CTRL_PRIVDEFENA_Msk)
|
||||
#define MPU_HFNMI_PRIVDEF (MPU_CTRL_HFNMIENA_Msk | MPU_CTRL_PRIVDEFENA_Msk)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_ENABLE ((uint8_t)0x01)
|
||||
#define MPU_REGION_DISABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
|
||||
* @{
|
||||
*/
|
||||
#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
|
||||
#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
|
||||
#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
|
||||
#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
|
||||
* @{
|
||||
*/
|
||||
#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
|
||||
#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_TEX_Levels MPU TEX Levels
|
||||
* @{
|
||||
*/
|
||||
#define MPU_TEX_LEVEL0 ((uint8_t)0x00)
|
||||
#define MPU_TEX_LEVEL1 ((uint8_t)0x01)
|
||||
#define MPU_TEX_LEVEL2 ((uint8_t)0x02)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_SIZE_32B ((uint8_t)0x04)
|
||||
#define MPU_REGION_SIZE_64B ((uint8_t)0x05)
|
||||
#define MPU_REGION_SIZE_128B ((uint8_t)0x06)
|
||||
#define MPU_REGION_SIZE_256B ((uint8_t)0x07)
|
||||
#define MPU_REGION_SIZE_512B ((uint8_t)0x08)
|
||||
#define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
|
||||
#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
|
||||
#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
|
||||
#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
|
||||
#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
|
||||
#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
|
||||
#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
|
||||
#define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
|
||||
#define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
|
||||
#define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
|
||||
#define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
|
||||
#define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
|
||||
#define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
|
||||
#define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
|
||||
#define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
|
||||
#define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
|
||||
#define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
|
||||
#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
|
||||
#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
|
||||
#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
|
||||
#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
|
||||
#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
|
||||
#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
|
||||
#define MPU_REGION_PRIV_RW ((uint8_t)0x01)
|
||||
#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
|
||||
#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
|
||||
#define MPU_REGION_PRIV_RO ((uint8_t)0x05)
|
||||
#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
|
||||
* @{
|
||||
*/
|
||||
#define MPU_REGION_NUMBER0 ((uint8_t)0x00)
|
||||
#define MPU_REGION_NUMBER1 ((uint8_t)0x01)
|
||||
#define MPU_REGION_NUMBER2 ((uint8_t)0x02)
|
||||
#define MPU_REGION_NUMBER3 ((uint8_t)0x03)
|
||||
#define MPU_REGION_NUMBER4 ((uint8_t)0x04)
|
||||
#define MPU_REGION_NUMBER5 ((uint8_t)0x05)
|
||||
#define MPU_REGION_NUMBER6 ((uint8_t)0x06)
|
||||
#define MPU_REGION_NUMBER7 ((uint8_t)0x07)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* __MPU_PRESENT */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported Macros -----------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_Preemption_Priority_Group_Macro CORTEX Preemption Priority Group
|
||||
* @{
|
||||
*/
|
||||
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_1) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_2) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_3) || \
|
||||
((GROUP) == NVIC_PRIORITYGROUP_4))
|
||||
|
||||
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
||||
|
||||
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
|
||||
|
||||
#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Private_Macros CORTEX Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup CORTEX_SysTick_clock_source_Macro_Private CORTEX SysTick clock source
|
||||
* @{
|
||||
*/
|
||||
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
|
||||
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if (__MPU_PRESENT == 1)
|
||||
#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
|
||||
((STATE) == MPU_REGION_DISABLE))
|
||||
|
||||
#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
|
||||
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_SHAREABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_CACHEABLE))
|
||||
|
||||
#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
|
||||
((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
|
||||
|
||||
#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
|
||||
((TYPE) == MPU_TEX_LEVEL1) || \
|
||||
((TYPE) == MPU_TEX_LEVEL2))
|
||||
|
||||
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RW) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RW_URO) || \
|
||||
((TYPE) == MPU_REGION_FULL_ACCESS) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RO) || \
|
||||
((TYPE) == MPU_REGION_PRIV_RO_URO))
|
||||
|
||||
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER1) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER2) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER3) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER4) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER5) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER6) || \
|
||||
((NUMBER) == MPU_REGION_NUMBER7))
|
||||
|
||||
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_64B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_128B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_256B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_512B) || \
|
||||
((SIZE) == MPU_REGION_SIZE_1KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_2KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_4KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_8KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_16KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_32KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_64KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_128KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_256KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_512KB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_1MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_2MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_4MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_8MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_16MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_32MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_64MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_128MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_256MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_512MB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_1GB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_2GB) || \
|
||||
((SIZE) == MPU_REGION_SIZE_4GB))
|
||||
|
||||
#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
|
||||
#endif /* __MPU_PRESENT */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
/** @defgroup CORTEX_Private_Functions CORTEX Private Functions
|
||||
* @brief CORTEX private functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup CORTEX_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup CORTEX_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
|
||||
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
|
||||
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_SystemReset(void);
|
||||
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup CORTEX_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
#if (__MPU_PRESENT == 1)
|
||||
void HAL_MPU_Enable(uint32_t MPU_Control);
|
||||
void HAL_MPU_Disable(void);
|
||||
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
|
||||
#endif /* __MPU_PRESENT */
|
||||
uint32_t HAL_NVIC_GetPriorityGrouping(void);
|
||||
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
|
||||
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
|
||||
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
|
||||
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
|
||||
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
|
||||
void HAL_SYSTICK_IRQHandler(void);
|
||||
void HAL_SYSTICK_Callback(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_HAL_CORTEX_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,198 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_def.h
|
||||
* @author MCD Application Team
|
||||
* @brief This file contains HAL common defines, enumeration, macros and
|
||||
* structures definitions.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_HAL_DEF
|
||||
#define __STM32L1xx_HAL_DEF
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx.h"
|
||||
#include "Legacy/stm32_hal_legacy.h"
|
||||
#include <stddef.h>
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @brief HAL Status structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_OK = 0x00U,
|
||||
HAL_ERROR = 0x01U,
|
||||
HAL_BUSY = 0x02U,
|
||||
HAL_TIMEOUT = 0x03U
|
||||
} HAL_StatusTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL Lock structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_UNLOCKED = 0x00U,
|
||||
HAL_LOCKED = 0x01U
|
||||
} HAL_LockTypeDef;
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
#define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
|
||||
|
||||
#define HAL_MAX_DELAY 0xFFFFFFFFU
|
||||
|
||||
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
|
||||
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
|
||||
|
||||
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD_, __DMA_HANDLE_) \
|
||||
do{ \
|
||||
(__HANDLE__)->__PPP_DMA_FIELD_ = &(__DMA_HANDLE_); \
|
||||
(__DMA_HANDLE_).Parent = (__HANDLE__); \
|
||||
} while(0)
|
||||
|
||||
/** @brief Reset the Handle's State field.
|
||||
* @param __HANDLE__: specifies the Peripheral Handle.
|
||||
* @note This macro can be used for the following purpose:
|
||||
* - When the Handle is declared as local variable; before passing it as parameter
|
||||
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro
|
||||
* to set to 0 the Handle's "State" field.
|
||||
* Otherwise, "State" field may have any random value and the first time the function
|
||||
* HAL_PPP_Init() is called, the low level hardware initialization will be missed
|
||||
* (i.e. HAL_PPP_MspInit() will not be executed).
|
||||
* - When there is a need to reconfigure the low level hardware: instead of calling
|
||||
* HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
|
||||
* In this later function, when the Handle's "State" field is set to 0, it will execute the function
|
||||
* HAL_PPP_MspInit() which will reconfigure the low level hardware.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0U)
|
||||
|
||||
#if (USE_RTOS == 1)
|
||||
|
||||
/* Reserved for future use */
|
||||
#error "USE_RTOS should be 0 in the current HAL release"
|
||||
|
||||
#else
|
||||
#define __HAL_LOCK(__HANDLE__) \
|
||||
do{ \
|
||||
if((__HANDLE__)->Lock == HAL_LOCKED) \
|
||||
{ \
|
||||
return HAL_BUSY; \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
(__HANDLE__)->Lock = HAL_LOCKED; \
|
||||
} \
|
||||
}while (0)
|
||||
|
||||
#define __HAL_UNLOCK(__HANDLE__) \
|
||||
do{ \
|
||||
(__HANDLE__)->Lock = HAL_UNLOCKED; \
|
||||
}while (0)
|
||||
#endif /* USE_RTOS */
|
||||
|
||||
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
|
||||
#ifndef __weak
|
||||
#define __weak __attribute__((weak))
|
||||
#endif /* __weak */
|
||||
#ifndef __packed
|
||||
#define __packed __attribute__((__packed__))
|
||||
#endif /* __packed */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
|
||||
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
|
||||
#if defined (__GNUC__) && !defined (__CC_ARM) /* GNU Compiler */
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END __attribute__ ((aligned (4)))
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#else
|
||||
#ifndef __ALIGN_END
|
||||
#define __ALIGN_END
|
||||
#endif /* __ALIGN_END */
|
||||
#ifndef __ALIGN_BEGIN
|
||||
#if defined (__CC_ARM) /* ARM Compiler */
|
||||
#define __ALIGN_BEGIN __align(4)
|
||||
#elif defined (__ICCARM__) /* IAR Compiler */
|
||||
#define __ALIGN_BEGIN
|
||||
#endif /* __CC_ARM */
|
||||
#endif /* __ALIGN_BEGIN */
|
||||
#endif /* __GNUC__ */
|
||||
|
||||
/**
|
||||
* @brief __RAM_FUNC definition
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
/* ARM Compiler
|
||||
------------
|
||||
RAM functions are defined using the toolchain options.
|
||||
Functions that are executed in RAM should reside in a separate source module.
|
||||
Using the 'Options for File' dialog you can simply change the 'Code / Const'
|
||||
area of a module to a memory space in physical RAM.
|
||||
Available memory areas are declared in the 'Target' tab of the 'Options for Target'
|
||||
dialog.
|
||||
*/
|
||||
#define __RAM_FUNC
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
RAM functions are defined using a specific toolchain keyword "__ramfunc".
|
||||
*/
|
||||
#define __RAM_FUNC __ramfunc
|
||||
|
||||
#elif defined ( __GNUC__ )
|
||||
/* GNU Compiler
|
||||
------------
|
||||
RAM functions are defined using a specific toolchain attribute
|
||||
"__attribute__((section(".RamFunc")))".
|
||||
*/
|
||||
#define __RAM_FUNC __attribute__((section(".RamFunc")))
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief __NOINLINE definition
|
||||
*/
|
||||
#if defined ( __CC_ARM ) || defined ( __GNUC__ )
|
||||
/* ARM & GNUCompiler
|
||||
----------------
|
||||
*/
|
||||
#define __NOINLINE __attribute__ ( (noinline) )
|
||||
|
||||
#elif defined ( __ICCARM__ )
|
||||
/* ICCARM Compiler
|
||||
---------------
|
||||
*/
|
||||
#define __NOINLINE _Pragma("optimize = no_inline")
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* ___STM32L1xx_HAL_DEF */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,652 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_dma.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of DMA HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32L1xx_HAL_DMA_H
|
||||
#define STM32L1xx_HAL_DMA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DMA
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup DMA_Exported_Types DMA Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief DMA Configuration Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
|
||||
from memory to memory or from peripheral to memory.
|
||||
This parameter can be a value of @ref DMA_Data_transfer_direction */
|
||||
|
||||
uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
|
||||
This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
|
||||
|
||||
uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
|
||||
This parameter can be a value of @ref DMA_Memory_incremented_mode */
|
||||
|
||||
uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
|
||||
This parameter can be a value of @ref DMA_Peripheral_data_size */
|
||||
|
||||
uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
|
||||
This parameter can be a value of @ref DMA_Memory_data_size */
|
||||
|
||||
uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
|
||||
This parameter can be a value of @ref DMA_mode
|
||||
@note The circular buffer mode cannot be used if the memory-to-memory
|
||||
data transfer is configured on the selected Channel */
|
||||
|
||||
uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
|
||||
This parameter can be a value of @ref DMA_Priority_level */
|
||||
} DMA_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL DMA State structures definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
|
||||
HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
|
||||
HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
|
||||
HAL_DMA_STATE_TIMEOUT = 0x03U, /*!< DMA timeout state */
|
||||
}HAL_DMA_StateTypeDef;
|
||||
|
||||
/**
|
||||
* @brief HAL DMA Error Code structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_DMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */
|
||||
HAL_DMA_HALF_TRANSFER = 0x01U /*!< Half Transfer */
|
||||
}HAL_DMA_LevelCompleteTypeDef;
|
||||
|
||||
|
||||
/**
|
||||
* @brief HAL DMA Callback ID structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_DMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */
|
||||
HAL_DMA_XFER_HALFCPLT_CB_ID = 0x01U, /*!< Half transfer */
|
||||
HAL_DMA_XFER_ERROR_CB_ID = 0x02U, /*!< Error */
|
||||
HAL_DMA_XFER_ABORT_CB_ID = 0x03U, /*!< Abort */
|
||||
HAL_DMA_XFER_ALL_CB_ID = 0x04U /*!< All */
|
||||
}HAL_DMA_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief DMA handle Structure definition
|
||||
*/
|
||||
typedef struct __DMA_HandleTypeDef
|
||||
{
|
||||
DMA_Channel_TypeDef *Instance; /*!< Register base address */
|
||||
|
||||
DMA_InitTypeDef Init; /*!< DMA communication parameters */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< DMA locking object */
|
||||
|
||||
__IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
|
||||
|
||||
void *Parent; /*!< Parent object state */
|
||||
|
||||
void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
|
||||
|
||||
void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
|
||||
|
||||
void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
|
||||
|
||||
void (* XferAbortCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< DMA Error code */
|
||||
|
||||
DMA_TypeDef *DmaBaseAddress; /*!< DMA Channel Base Address */
|
||||
|
||||
uint32_t ChannelIndex; /*!< DMA Channel Index */
|
||||
|
||||
}DMA_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup DMA_Exported_Constants DMA Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Error_Code DMA Error Code
|
||||
* @{
|
||||
*/
|
||||
#define HAL_DMA_ERROR_NONE 0x00000000U /*!< No error */
|
||||
#define HAL_DMA_ERROR_TE 0x00000001U /*!< Transfer error */
|
||||
#define HAL_DMA_ERROR_NO_XFER 0x00000004U /*!< Abort requested with no Xfer ongoing */
|
||||
#define HAL_DMA_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
|
||||
#define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U /*!< Not supported mode */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
|
||||
* @{
|
||||
*/
|
||||
#define DMA_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direction */
|
||||
#define DMA_MEMORY_TO_PERIPH DMA_CCR_DIR /*!< Memory to peripheral direction */
|
||||
#define DMA_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /*!< Memory to memory direction */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
|
||||
* @{
|
||||
*/
|
||||
#define DMA_PINC_ENABLE DMA_CCR_PINC /*!< Peripheral increment mode Enable */
|
||||
#define DMA_PINC_DISABLE 0x00000000U /*!< Peripheral increment mode Disable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
|
||||
* @{
|
||||
*/
|
||||
#define DMA_MINC_ENABLE DMA_CCR_MINC /*!< Memory increment mode Enable */
|
||||
#define DMA_MINC_DISABLE 0x00000000U /*!< Memory increment mode Disable */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
|
||||
* @{
|
||||
*/
|
||||
#define DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment : Byte */
|
||||
#define DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /*!< Peripheral data alignment : HalfWord */
|
||||
#define DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /*!< Peripheral data alignment : Word */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Memory_data_size DMA Memory data size
|
||||
* @{
|
||||
*/
|
||||
#define DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : Byte */
|
||||
#define DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /*!< Memory data alignment : HalfWord */
|
||||
#define DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /*!< Memory data alignment : Word */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_mode DMA mode
|
||||
* @{
|
||||
*/
|
||||
#define DMA_NORMAL 0x00000000U /*!< Normal mode */
|
||||
#define DMA_CIRCULAR DMA_CCR_CIRC /*!< Circular mode */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_Priority_level DMA Priority level
|
||||
* @{
|
||||
*/
|
||||
#define DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low */
|
||||
#define DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /*!< Priority level : Medium */
|
||||
#define DMA_PRIORITY_HIGH DMA_CCR_PL_1 /*!< Priority level : High */
|
||||
#define DMA_PRIORITY_VERY_HIGH DMA_CCR_PL /*!< Priority level : Very_High */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
|
||||
* @{
|
||||
*/
|
||||
#define DMA_IT_TC DMA_CCR_TCIE
|
||||
#define DMA_IT_HT DMA_CCR_HTIE
|
||||
#define DMA_IT_TE DMA_CCR_TEIE
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup DMA_flag_definitions DMA flag definitions
|
||||
* @{
|
||||
*/
|
||||
#define DMA_FLAG_GL1 DMA_ISR_GIF1
|
||||
#define DMA_FLAG_TC1 DMA_ISR_TCIF1
|
||||
#define DMA_FLAG_HT1 DMA_ISR_HTIF1
|
||||
#define DMA_FLAG_TE1 DMA_ISR_TEIF1
|
||||
#define DMA_FLAG_GL2 DMA_ISR_GIF2
|
||||
#define DMA_FLAG_TC2 DMA_ISR_TCIF2
|
||||
#define DMA_FLAG_HT2 DMA_ISR_HTIF2
|
||||
#define DMA_FLAG_TE2 DMA_ISR_TEIF2
|
||||
#define DMA_FLAG_GL3 DMA_ISR_GIF3
|
||||
#define DMA_FLAG_TC3 DMA_ISR_TCIF3
|
||||
#define DMA_FLAG_HT3 DMA_ISR_HTIF3
|
||||
#define DMA_FLAG_TE3 DMA_ISR_TEIF3
|
||||
#define DMA_FLAG_GL4 DMA_ISR_GIF4
|
||||
#define DMA_FLAG_TC4 DMA_ISR_TCIF4
|
||||
#define DMA_FLAG_HT4 DMA_ISR_HTIF4
|
||||
#define DMA_FLAG_TE4 DMA_ISR_TEIF4
|
||||
#define DMA_FLAG_GL5 DMA_ISR_GIF5
|
||||
#define DMA_FLAG_TC5 DMA_ISR_TCIF5
|
||||
#define DMA_FLAG_HT5 DMA_ISR_HTIF5
|
||||
#define DMA_FLAG_TE5 DMA_ISR_TEIF5
|
||||
#define DMA_FLAG_GL6 DMA_ISR_GIF6
|
||||
#define DMA_FLAG_TC6 DMA_ISR_TCIF6
|
||||
#define DMA_FLAG_HT6 DMA_ISR_HTIF6
|
||||
#define DMA_FLAG_TE6 DMA_ISR_TEIF6
|
||||
#define DMA_FLAG_GL7 DMA_ISR_GIF7
|
||||
#define DMA_FLAG_TC7 DMA_ISR_TCIF7
|
||||
#define DMA_FLAG_HT7 DMA_ISR_HTIF7
|
||||
#define DMA_FLAG_TE7 DMA_ISR_TEIF7
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macros -----------------------------------------------------------*/
|
||||
/** @defgroup DMA_Exported_Macros DMA Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @brief Reset DMA handle state.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
|
||||
|
||||
/**
|
||||
* @brief Enable the specified DMA Channel.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
|
||||
|
||||
/**
|
||||
* @brief Disable the specified DMA Channel.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
|
||||
|
||||
|
||||
/* Interrupt & Flag management */
|
||||
#if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || \
|
||||
defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || \
|
||||
defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel transfer complete flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified transfer complete flag index.
|
||||
*/
|
||||
|
||||
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
|
||||
DMA_FLAG_TC7)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel half transfer complete flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified half transfer complete flag index.
|
||||
*/
|
||||
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
|
||||
DMA_FLAG_HT7)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel transfer error flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified transfer error flag index.
|
||||
*/
|
||||
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
|
||||
DMA_FLAG_TE7)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel Global interrupt flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified transfer error flag index.
|
||||
*/
|
||||
#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
|
||||
DMA_ISR_GIF7)
|
||||
|
||||
/**
|
||||
* @brief Get the DMA Channel pending flags.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __FLAG__ Get the specified flag.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DMA_FLAG_TCx: Transfer complete flag
|
||||
* @arg DMA_FLAG_HTx: Half transfer complete flag
|
||||
* @arg DMA_FLAG_TEx: Transfer error flag
|
||||
* @arg DMA_FLAG_GLx: Global interrupt flag
|
||||
* Where x can be from 1 to 7 to select the DMA Channel x flag.
|
||||
* @retval The state of FLAG (SET or RESET).
|
||||
*/
|
||||
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
|
||||
(DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__)))
|
||||
|
||||
/**
|
||||
* @brief Clear the DMA Channel pending flags.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __FLAG__ specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DMA_FLAG_TCx: Transfer complete flag
|
||||
* @arg DMA_FLAG_HTx: Half transfer complete flag
|
||||
* @arg DMA_FLAG_TEx: Transfer error flag
|
||||
* @arg DMA_FLAG_GLx: Global interrupt flag
|
||||
* Where x can be from 1 to 7 to select the DMA Channel x flag.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
|
||||
(DMA2->IFCR = (__FLAG__)) : (DMA1->IFCR = (__FLAG__)))
|
||||
|
||||
#else
|
||||
/**
|
||||
* @brief Return the current DMA Channel transfer complete flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified transfer complete flag index.
|
||||
*/
|
||||
|
||||
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
|
||||
DMA_FLAG_TC7)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel half transfer complete flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified half transfer complete flag index.
|
||||
*/
|
||||
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
|
||||
DMA_FLAG_HT7)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel transfer error flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified transfer error flag index.
|
||||
*/
|
||||
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
|
||||
DMA_FLAG_TE7)
|
||||
|
||||
/**
|
||||
* @brief Return the current DMA Channel Global interrupt flag.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The specified transfer error flag index.
|
||||
*/
|
||||
#define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
|
||||
(((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
|
||||
((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
|
||||
DMA_ISR_GIF7)
|
||||
|
||||
/**
|
||||
* @brief Get the DMA Channel pending flags.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __FLAG__ Get the specified flag.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DMA_FLAG_TCIFx: Transfer complete flag
|
||||
* @arg DMA_FLAG_HTIFx: Half transfer complete flag
|
||||
* @arg DMA_FLAG_TEIFx: Transfer error flag
|
||||
* @arg DMA_ISR_GIFx: Global interrupt flag
|
||||
* Where x can be from 1 to 7 to select the DMA Channel x flag.
|
||||
* @retval The state of FLAG (SET or RESET).
|
||||
*/
|
||||
#define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (DMA1->ISR & (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Clear the DMA Channel pending flags.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __FLAG__ specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DMA_FLAG_TCx: Transfer complete flag
|
||||
* @arg DMA_FLAG_HTx: Half transfer complete flag
|
||||
* @arg DMA_FLAG_TEx: Transfer error flag
|
||||
* @arg DMA_FLAG_GLx: Global interrupt flag
|
||||
* Where x can be from 1 to 7 to select the DMA Channel x flag.
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (DMA1->IFCR = (__FLAG__))
|
||||
|
||||
#endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC || STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */
|
||||
|
||||
/**
|
||||
* @brief Enable the specified DMA Channel interrupts.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DMA_IT_TC: Transfer complete interrupt mask
|
||||
* @arg DMA_IT_HT: Half transfer complete interrupt mask
|
||||
* @arg DMA_IT_TE: Transfer error interrupt mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Disable the specified DMA Channel interrupts.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __INTERRUPT__ specifies the DMA interrupt sources to be enabled or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg DMA_IT_TC: Transfer complete interrupt mask
|
||||
* @arg DMA_IT_HT: Half transfer complete interrupt mask
|
||||
* @arg DMA_IT_TE: Transfer error interrupt mask
|
||||
* @retval None
|
||||
*/
|
||||
#define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Check whether the specified DMA Channel interrupt is enabled or not.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @param __INTERRUPT__ specifies the DMA interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg DMA_IT_TC: Transfer complete interrupt mask
|
||||
* @arg DMA_IT_HT: Half transfer complete interrupt mask
|
||||
* @arg DMA_IT_TE: Transfer error interrupt mask
|
||||
* @retval The state of DMA_IT (SET or RESET).
|
||||
*/
|
||||
#define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
|
||||
|
||||
/**
|
||||
* @brief Return the number of remaining data units in the current DMA Channel transfer.
|
||||
* @param __HANDLE__ DMA handle
|
||||
* @retval The number of remaining data units in the current DMA Channel transfer.
|
||||
*/
|
||||
#define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup DMA_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DMA_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* Initialization and de-initialization functions *****************************/
|
||||
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
|
||||
HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DMA_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
|
||||
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
|
||||
HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
|
||||
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
|
||||
HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout);
|
||||
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
|
||||
HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID, void (* pCallback)( DMA_HandleTypeDef * _hdma));
|
||||
HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef CallbackID);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup DMA_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
|
||||
uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup DMA_Private_Macros DMA Private Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
|
||||
((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
|
||||
((DIRECTION) == DMA_MEMORY_TO_MEMORY))
|
||||
|
||||
#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U))
|
||||
|
||||
#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
|
||||
((STATE) == DMA_PINC_DISABLE))
|
||||
|
||||
#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
|
||||
((STATE) == DMA_MINC_DISABLE))
|
||||
|
||||
#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
|
||||
((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
|
||||
((SIZE) == DMA_PDATAALIGN_WORD))
|
||||
|
||||
#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
|
||||
((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
|
||||
((SIZE) == DMA_MDATAALIGN_WORD ))
|
||||
|
||||
#define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
|
||||
((MODE) == DMA_CIRCULAR))
|
||||
|
||||
#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
|
||||
((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
|
||||
((PRIORITY) == DMA_PRIORITY_HIGH) || \
|
||||
((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32L1xx_HAL_DMA_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,316 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_exti.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of EXTI HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef STM32L1xx_HAL_EXTI_H
|
||||
#define STM32L1xx_HAL_EXTI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI EXTI
|
||||
* @brief EXTI HAL module driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Types EXTI Exported Types
|
||||
* @{
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
HAL_EXTI_COMMON_CB_ID = 0x00U
|
||||
} EXTI_CallbackIDTypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI Handle structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Line; /*!< Exti line number */
|
||||
void (* PendingCallback)(void); /*!< Exti pending callback */
|
||||
} EXTI_HandleTypeDef;
|
||||
|
||||
/**
|
||||
* @brief EXTI Configuration structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t Line; /*!< The Exti line to be configured. This parameter
|
||||
can be a value of @ref EXTI_Line */
|
||||
uint32_t Mode; /*!< The Exit Mode to be configured for a core.
|
||||
This parameter can be a combination of @ref EXTI_Mode */
|
||||
uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter
|
||||
can be a value of @ref EXTI_Trigger */
|
||||
uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured.
|
||||
This parameter is only possible for line 0 to 15. It
|
||||
can be a value of @ref EXTI_GPIOSel */
|
||||
} EXTI_ConfigTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Constants EXTI Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Line EXTI Line
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_LINE_0 (EXTI_GPIO | 0x00u) /*!< External interrupt line 0 */
|
||||
#define EXTI_LINE_1 (EXTI_GPIO | 0x01u) /*!< External interrupt line 1 */
|
||||
#define EXTI_LINE_2 (EXTI_GPIO | 0x02u) /*!< External interrupt line 2 */
|
||||
#define EXTI_LINE_3 (EXTI_GPIO | 0x03u) /*!< External interrupt line 3 */
|
||||
#define EXTI_LINE_4 (EXTI_GPIO | 0x04u) /*!< External interrupt line 4 */
|
||||
#define EXTI_LINE_5 (EXTI_GPIO | 0x05u) /*!< External interrupt line 5 */
|
||||
#define EXTI_LINE_6 (EXTI_GPIO | 0x06u) /*!< External interrupt line 6 */
|
||||
#define EXTI_LINE_7 (EXTI_GPIO | 0x07u) /*!< External interrupt line 7 */
|
||||
#define EXTI_LINE_8 (EXTI_GPIO | 0x08u) /*!< External interrupt line 8 */
|
||||
#define EXTI_LINE_9 (EXTI_GPIO | 0x09u) /*!< External interrupt line 9 */
|
||||
#define EXTI_LINE_10 (EXTI_GPIO | 0x0Au) /*!< External interrupt line 10 */
|
||||
#define EXTI_LINE_11 (EXTI_GPIO | 0x0Bu) /*!< External interrupt line 11 */
|
||||
#define EXTI_LINE_12 (EXTI_GPIO | 0x0Cu) /*!< External interrupt line 12 */
|
||||
#define EXTI_LINE_13 (EXTI_GPIO | 0x0Du) /*!< External interrupt line 13 */
|
||||
#define EXTI_LINE_14 (EXTI_GPIO | 0x0Eu) /*!< External interrupt line 14 */
|
||||
#define EXTI_LINE_15 (EXTI_GPIO | 0x0Fu) /*!< External interrupt line 15 */
|
||||
#define EXTI_LINE_16 (EXTI_CONFIG | 0x10u) /*!< External interrupt line 16 Connected to the PVD Output */
|
||||
#define EXTI_LINE_17 (EXTI_CONFIG | 0x11u) /*!< External interrupt line 17 Connected to the RTC Alarm event */
|
||||
#define EXTI_LINE_18 (EXTI_CONFIG | 0x12u) /*!< External interrupt line 18 Connected to the USB Device FS Wakeup from suspend event */
|
||||
#define EXTI_LINE_19 (EXTI_CONFIG | 0x13u) /*!< External interrupt line 19 Connected to the RTC Tamper and Time Stamp events */
|
||||
#define EXTI_LINE_20 (EXTI_CONFIG | 0x14u) /*!< External interrupt line 20 Connected to the RTC Wakeup event */
|
||||
#define EXTI_LINE_21 (EXTI_CONFIG | 0x15u) /*!< External interrupt line 21 Connected to the Comparator 1 output */
|
||||
#define EXTI_LINE_22 (EXTI_CONFIG | 0x16u) /*!< External interrupt line 22 Connected to the Comparator 2 output */
|
||||
#if defined(EXTI_IMR_IM23)
|
||||
#define EXTI_LINE_23 (EXTI_CONFIG | 0x17u) /*!< External interrupt line 23 Connected to the channel acquisition interrupt */
|
||||
#endif /* EXTI_IMR_IM23 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Mode EXTI Mode
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_MODE_NONE 0x00000000u
|
||||
#define EXTI_MODE_INTERRUPT 0x00000001u
|
||||
#define EXTI_MODE_EVENT 0x00000002u
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Trigger EXTI Trigger
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define EXTI_TRIGGER_NONE 0x00000000u
|
||||
#define EXTI_TRIGGER_RISING 0x00000001u
|
||||
#define EXTI_TRIGGER_FALLING 0x00000002u
|
||||
#define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_GPIOSel EXTI GPIOSel
|
||||
* @brief
|
||||
* @{
|
||||
*/
|
||||
#define EXTI_GPIOA 0x00000000u
|
||||
#define EXTI_GPIOB 0x00000001u
|
||||
#define EXTI_GPIOC 0x00000002u
|
||||
#define EXTI_GPIOD 0x00000003u
|
||||
#if defined (GPIOE)
|
||||
#define EXTI_GPIOE 0x00000004u
|
||||
#endif /* GPIOE */
|
||||
#if defined (GPIOF)
|
||||
#define EXTI_GPIOF 0x00000005u
|
||||
#endif /* GPIOF */
|
||||
#if defined (GPIOG)
|
||||
#define EXTI_GPIOG 0x00000006u
|
||||
#endif /* GPIOG */
|
||||
#define EXTI_GPIOH 0x00000007u
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Macros EXTI Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private constants --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Constants EXTI Private Constants
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief EXTI Line property definition
|
||||
*/
|
||||
#define EXTI_PROPERTY_SHIFT 24u
|
||||
#define EXTI_CONFIG (0x02uL << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_GPIO ((0x04uL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG)
|
||||
#define EXTI_RESERVED (0x08uL << EXTI_PROPERTY_SHIFT)
|
||||
#define EXTI_PROPERTY_MASK (EXTI_CONFIG | EXTI_GPIO)
|
||||
|
||||
/**
|
||||
* @brief EXTI bit usage
|
||||
*/
|
||||
#define EXTI_PIN_MASK 0x0000001Fu
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for interrupt & event mode
|
||||
*/
|
||||
#define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT)
|
||||
|
||||
/**
|
||||
* @brief EXTI Mask for trigger possibilities
|
||||
*/
|
||||
#define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING)
|
||||
|
||||
/**
|
||||
* @brief EXTI Line number
|
||||
*/
|
||||
#if defined(EXTI_IMR_IM23)
|
||||
#define EXTI_LINE_NB 24UL
|
||||
#else
|
||||
#define EXTI_LINE_NB 23UL
|
||||
#endif /* EXTI_IMR_IM23 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Private_Macros EXTI Private Macros
|
||||
* @{
|
||||
*/
|
||||
#define IS_EXTI_LINE(__LINE__) ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_PIN_MASK)) == 0x00u) && \
|
||||
((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
|
||||
(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
|
||||
(((__LINE__) & EXTI_PIN_MASK) < EXTI_LINE_NB))
|
||||
|
||||
#define IS_EXTI_MODE(__LINE__) ((((__LINE__) & EXTI_MODE_MASK) != 0x00u) && \
|
||||
(((__LINE__) & ~EXTI_MODE_MASK) == 0x00u))
|
||||
|
||||
#define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
|
||||
|
||||
#define IS_EXTI_PENDING_EDGE(__LINE__) ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)
|
||||
|
||||
#define IS_EXTI_CONFIG_LINE(__LINE__) (((__LINE__) & EXTI_CONFIG) != 0x00u)
|
||||
|
||||
#if !defined (GPIOE)
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOH))
|
||||
#elif !defined (GPIOF)
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOH))
|
||||
#else
|
||||
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \
|
||||
((__PORT__) == EXTI_GPIOB) || \
|
||||
((__PORT__) == EXTI_GPIOC) || \
|
||||
((__PORT__) == EXTI_GPIOD) || \
|
||||
((__PORT__) == EXTI_GPIOE) || \
|
||||
((__PORT__) == EXTI_GPIOF) || \
|
||||
((__PORT__) == EXTI_GPIOG) || \
|
||||
((__PORT__) == EXTI_GPIOH))
|
||||
#endif /* GPIOE */
|
||||
|
||||
#define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16U)
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @defgroup EXTI_Exported_Functions EXTI Exported Functions
|
||||
* @brief EXTI Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions_Group1 Configuration functions
|
||||
* @brief Configuration functions
|
||||
* @{
|
||||
*/
|
||||
/* Configuration functions ****************************************************/
|
||||
HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
|
||||
HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig);
|
||||
HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti);
|
||||
HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void));
|
||||
HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI_Exported_Functions_Group2 IO operation functions
|
||||
* @brief IO operation functions
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti);
|
||||
uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
|
||||
void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge);
|
||||
void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32l1xx_HAL_EXTI_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@ -1,409 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_flash.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of Flash HAL module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_HAL_FLASH_H
|
||||
#define __STM32L1xx_HAL_FLASH_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH_Private_Constants
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_TIMEOUT_VALUE (50000U) /* 50 s */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_FLASH_TYPEPROGRAM(_VALUE_) ((_VALUE_) == FLASH_TYPEPROGRAM_WORD)
|
||||
|
||||
#define IS_FLASH_LATENCY(__LATENCY__) (((__LATENCY__) == FLASH_LATENCY_0) || \
|
||||
((__LATENCY__) == FLASH_LATENCY_1))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/** @defgroup FLASH_Exported_Types FLASH Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FLASH Procedure structure definition
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
FLASH_PROC_NONE = 0U,
|
||||
FLASH_PROC_PAGEERASE = 1U,
|
||||
FLASH_PROC_PROGRAM = 2U,
|
||||
} FLASH_ProcedureTypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH handle Structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
__IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */
|
||||
|
||||
__IO uint32_t NbPagesToErase; /*!< Internal variable to save the remaining sectors to erase in IT context*/
|
||||
|
||||
__IO uint32_t Address; /*!< Internal variable to save address selected for program or erase */
|
||||
|
||||
__IO uint32_t Page; /*!< Internal variable to define the current page which is erasing */
|
||||
|
||||
HAL_LockTypeDef Lock; /*!< FLASH locking object */
|
||||
|
||||
__IO uint32_t ErrorCode; /*!< FLASH error code
|
||||
This parameter can be a value of @ref FLASH_Error_Codes */
|
||||
} FLASH_ProcessTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/** @defgroup FLASH_Exported_Constants FLASH Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Error_Codes FLASH Error Codes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define HAL_FLASH_ERROR_NONE 0x00U /*!< No error */
|
||||
#define HAL_FLASH_ERROR_PGA 0x01U /*!< Programming alignment error */
|
||||
#define HAL_FLASH_ERROR_WRP 0x02U /*!< Write protection error */
|
||||
#define HAL_FLASH_ERROR_OPTV 0x04U /*!< Option validity error */
|
||||
#define HAL_FLASH_ERROR_SIZE 0x08U /*!< */
|
||||
#define HAL_FLASH_ERROR_RD 0x10U /*!< Read protected error */
|
||||
#define HAL_FLASH_ERROR_OPTVUSR 0x20U /*!< Option UserValidity Error. */
|
||||
#define HAL_FLASH_ERROR_OPERATION 0x40U /*!< Not used */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Page_Size FLASH size information
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define FLASH_SIZE (uint32_t)((*((uint32_t *)FLASHSIZE_BASE)&0xFFFFU) * 1024U)
|
||||
#define FLASH_PAGE_SIZE (256U) /*!< FLASH Page Size in bytes */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Type_Program FLASH Type Program
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_TYPEPROGRAM_WORD (0x02U) /*!<Program a word (32-bit) at a specified address.*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Latency FLASH Latency
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_LATENCY_0 (0x00000000U) /*!< FLASH Zero Latency cycle */
|
||||
#define FLASH_LATENCY_1 FLASH_ACR_LATENCY /*!< FLASH One Latency cycle */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Interrupts FLASH Interrupts
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define FLASH_IT_EOP FLASH_PECR_EOPIE /*!< End of programming interrupt source */
|
||||
#define FLASH_IT_ERR FLASH_PECR_ERRIE /*!< Error interrupt source */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Flags FLASH Flags
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */
|
||||
#define FLASH_FLAG_EOP FLASH_SR_EOP /*!< FLASH End of Programming flag */
|
||||
#define FLASH_FLAG_ENDHV FLASH_SR_ENDHV /*!< FLASH End of High Voltage flag */
|
||||
#define FLASH_FLAG_READY FLASH_SR_READY /*!< FLASH Ready flag after low power mode */
|
||||
#define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< FLASH Write protected error flag */
|
||||
#define FLASH_FLAG_PGAERR FLASH_SR_PGAERR /*!< FLASH Programming Alignment error flag */
|
||||
#define FLASH_FLAG_SIZERR FLASH_SR_SIZERR /*!< FLASH Size error flag */
|
||||
#define FLASH_FLAG_OPTVERR FLASH_SR_OPTVERR /*!< FLASH Option Validity error flag */
|
||||
/* Cat2 & Cat3*/
|
||||
#if defined(FLASH_SR_RDERR)
|
||||
#define FLASH_FLAG_RDERR FLASH_SR_RDERR /*!< Read protected error flag */
|
||||
#endif /* FLASH_SR_RDERR */
|
||||
/* Cat3, Cat4 & Cat5*/
|
||||
#if defined(FLASH_SR_OPTVERRUSR)
|
||||
#define FLASH_FLAG_OPTVERRUSR FLASH_SR_OPTVERRUSR /*!< FLASH Option User Validity error flag */
|
||||
#endif /* FLASH_SR_OPTVERRUSR */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASH_Keys FLASH Keys
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define FLASH_PDKEY1 (0x04152637U) /*!< Flash power down key1 */
|
||||
#define FLASH_PDKEY2 (0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1
|
||||
to unlock the RUN_PD bit in FLASH_ACR */
|
||||
|
||||
#define FLASH_PEKEY1 (0x89ABCDEFU) /*!< Flash program erase key1 */
|
||||
#define FLASH_PEKEY2 (0x02030405U) /*!< Flash program erase key: used with FLASH_PEKEY2
|
||||
to unlock the write access to the FLASH_PECR register and
|
||||
data EEPROM */
|
||||
|
||||
#define FLASH_PRGKEY1 (0x8C9DAEBFU) /*!< Flash program memory key1 */
|
||||
#define FLASH_PRGKEY2 (0x13141516U) /*!< Flash program memory key2: used with FLASH_PRGKEY2
|
||||
to unlock the program memory */
|
||||
|
||||
#define FLASH_OPTKEY1 (0xFBEAD9C8U) /*!< Flash option key1 */
|
||||
#define FLASH_OPTKEY2 (0x24252627U) /*!< Flash option key2: used with FLASH_OPTKEY1 to
|
||||
unlock the write access to the option byte block */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup FLASH_Exported_Macros FLASH Exported Macros
|
||||
* @brief macros to control FLASH features
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup FLASH_Interrupt FLASH Interrupts
|
||||
* @brief macros to handle FLASH interrupts
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Enable the specified FLASH interrupt.
|
||||
* @param __INTERRUPT__ FLASH interrupt
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
|
||||
* @arg @ref FLASH_IT_ERR Error Interrupt
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) SET_BIT((FLASH->PECR), (__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Disable the specified FLASH interrupt.
|
||||
* @param __INTERRUPT__ FLASH interrupt
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref FLASH_IT_EOP End of FLASH Operation Interrupt
|
||||
* @arg @ref FLASH_IT_ERR Error Interrupt
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) CLEAR_BIT((FLASH->PECR), (uint32_t)(__INTERRUPT__))
|
||||
|
||||
/**
|
||||
* @brief Get the specified FLASH flag status.
|
||||
* @param __FLAG__ specifies the FLASH flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref FLASH_FLAG_BSY FLASH Busy flag
|
||||
* @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag
|
||||
* @arg @ref FLASH_FLAG_ENDHV FLASH End of High Voltage flag
|
||||
* @arg @ref FLASH_FLAG_READY FLASH Ready flag after low power mode
|
||||
* @arg @ref FLASH_FLAG_PGAERR FLASH Programming Alignment error flag
|
||||
* @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag
|
||||
* @arg @ref FLASH_FLAG_OPTVERR FLASH Option validity error error flag
|
||||
@if STM32L100xB
|
||||
@elif STM32L100xBA
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
@elif STM32L151xB
|
||||
@elif STM32L151xBA
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
@elif STM32L152xB
|
||||
@elif STM32L152xBA
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
@elif STM32L100xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@elif STM32L151xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@elif STM32L152xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@elif STM32L162xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@else
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@endif
|
||||
* @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag
|
||||
* @retval The new state of __FLAG__ (SET or RESET).
|
||||
*/
|
||||
#define __HAL_FLASH_GET_FLAG(__FLAG__) (((FLASH->SR) & (__FLAG__)) == (__FLAG__))
|
||||
|
||||
/**
|
||||
* @brief Clear the specified FLASH flag.
|
||||
* @param __FLAG__ specifies the FLASH flags to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg @ref FLASH_FLAG_EOP FLASH End of Operation flag
|
||||
* @arg @ref FLASH_FLAG_PGAERR FLASH Programming Alignment error flag
|
||||
* @arg @ref FLASH_FLAG_SIZERR FLASH Size error flag
|
||||
* @arg @ref FLASH_FLAG_OPTVERR FLASH Option validity error error flag
|
||||
@if STM32L100xB
|
||||
@elif STM32L100xBA
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
@elif STM32L151xB
|
||||
@elif STM32L151xBA
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
@elif STM32L152xB
|
||||
@elif STM32L152xBA
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
@elif STM32L100xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@elif STM32L151xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@elif STM32L152xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@elif STM32L162xC
|
||||
* @arg @ref FLASH_FLAG_RDERR FLASH Read Protection error flag (PCROP)
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@else
|
||||
* @arg @ref FLASH_FLAG_OPTVERRUSR FLASH Option User validity error
|
||||
@endif
|
||||
* @arg @ref FLASH_FLAG_WRPERR FLASH Write protected error flag
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_CLEAR_FLAG(__FLAG__) ((FLASH->SR) = (__FLAG__))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Include FLASH HAL Extended module */
|
||||
#include "stm32l1xx_hal_flash_ex.h"
|
||||
#include "stm32l1xx_hal_flash_ramfunc.h"
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
/** @addtogroup FLASH_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
/* IO operation functions *****************************************************/
|
||||
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
|
||||
HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
|
||||
|
||||
/* FLASH IRQ handler function */
|
||||
void HAL_FLASH_IRQHandler(void);
|
||||
/* Callbacks in non blocking modes */
|
||||
void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue);
|
||||
void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral Control functions ***********************************************/
|
||||
HAL_StatusTypeDef HAL_FLASH_Unlock(void);
|
||||
HAL_StatusTypeDef HAL_FLASH_Lock(void);
|
||||
HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void);
|
||||
HAL_StatusTypeDef HAL_FLASH_OB_Lock(void);
|
||||
HAL_StatusTypeDef HAL_FLASH_OB_Launch(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASH_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
/* Peripheral State and Error functions ***************************************/
|
||||
uint32_t HAL_FLASH_GetError(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Private function -------------------------------------------------*/
|
||||
/** @addtogroup FLASH_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_HAL_FLASH_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
@ -1,968 +0,0 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32l1xx_hal_flash_ex.h
|
||||
* @author MCD Application Team
|
||||
* @brief Header file of Flash HAL Extended module.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32L1xx_HAL_FLASH_EX_H
|
||||
#define __STM32L1xx_HAL_FLASH_EX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32l1xx_hal_def.h"
|
||||
|
||||
/** @addtogroup STM32L1xx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx_Private_Constants
|
||||
* @{
|
||||
*/
|
||||
#if defined(FLASH_SR_RDERR) && defined(FLASH_SR_OPTVERRUSR)
|
||||
|
||||
#define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
|
||||
FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
|
||||
FLASH_FLAG_OPTVERRUSR | FLASH_FLAG_RDERR)
|
||||
|
||||
#elif defined(FLASH_SR_RDERR)
|
||||
|
||||
#define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
|
||||
FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
|
||||
FLASH_FLAG_RDERR)
|
||||
|
||||
#elif defined(FLASH_SR_OPTVERRUSR)
|
||||
|
||||
#define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
|
||||
FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \
|
||||
FLASH_FLAG_OPTVERRUSR)
|
||||
|
||||
#else
|
||||
|
||||
#define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \
|
||||
FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR)
|
||||
|
||||
#endif /* FLASH_SR_RDERR & FLASH_SR_OPTVERRUSR */
|
||||
|
||||
#if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \
|
||||
|| defined(STM32L151xBA) || defined(STM32L152xBA)
|
||||
|
||||
/******* Devices with FLASH 128K *******/
|
||||
#define FLASH_NBPAGES_MAX 512U /* 512 pages from page 0 to page 511U */
|
||||
|
||||
#elif defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
|
||||
|| defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA)
|
||||
|
||||
/******* Devices with FLASH 256K *******/
|
||||
#define FLASH_NBPAGES_MAX 1025U /* 1025 pages from page 0 to page 1024U */
|
||||
|
||||
#elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
|
||||
|| defined(STM32L162xD) || defined(STM32L162xDX)
|
||||
|
||||
/******* Devices with FLASH 384K *******/
|
||||
#define FLASH_NBPAGES_MAX 1536U /* 1536 pages from page 0 to page 1535U */
|
||||
|
||||
#elif defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
|
||||
|
||||
/******* Devices with FLASH 512K *******/
|
||||
#define FLASH_NBPAGES_MAX 2048U /* 2048 pages from page 0 to page 2047U */
|
||||
|
||||
#endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */
|
||||
|
||||
#define WRP_MASK_LOW (0x0000FFFFU)
|
||||
#define WRP_MASK_HIGH (0xFFFF0000U)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES))
|
||||
|
||||
#define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
|
||||
|
||||
#define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \
|
||||
((__VALUE__) == OB_WRPSTATE_ENABLE))
|
||||
|
||||
#define IS_OB_WRP(__PAGE__) (((__PAGE__) != 0x0000000U))
|
||||
|
||||
#define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\
|
||||
((__LEVEL__) == OB_RDP_LEVEL_1) ||\
|
||||
((__LEVEL__) == OB_RDP_LEVEL_2))
|
||||
|
||||
#define IS_OB_BOR_LEVEL(__LEVEL__) (((__LEVEL__) == OB_BOR_OFF) || \
|
||||
((__LEVEL__) == OB_BOR_LEVEL1) || \
|
||||
((__LEVEL__) == OB_BOR_LEVEL2) || \
|
||||
((__LEVEL__) == OB_BOR_LEVEL3) || \
|
||||
((__LEVEL__) == OB_BOR_LEVEL4) || \
|
||||
((__LEVEL__) == OB_BOR_LEVEL5))
|
||||
|
||||
#define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW))
|
||||
|
||||
#define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST))
|
||||
|
||||
#define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST))
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
#define IS_OBEX(__VALUE__) (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG))
|
||||
|
||||
#elif defined(FLASH_OBR_SPRMOD) && !defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
#define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_PCROP)
|
||||
|
||||
#elif !defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
#define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)
|
||||
|
||||
#endif /* FLASH_OBR_SPRMOD && FLASH_OBR_nRST_BFB2 */
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD)
|
||||
|
||||
#define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \
|
||||
((__VALUE__) == OB_PCROP_STATE_ENABLE))
|
||||
|
||||
#define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U))
|
||||
#endif /* FLASH_OBR_SPRMOD */
|
||||
|
||||
#if defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
#define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1))
|
||||
|
||||
#endif /* FLASH_OBR_nRST_BFB2 */
|
||||
|
||||
#define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEERASEDATA_BYTE) || \
|
||||
((__VALUE__) == FLASH_TYPEERASEDATA_HALFWORD) || \
|
||||
((__VALUE__) == FLASH_TYPEERASEDATA_WORD))
|
||||
#define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \
|
||||
((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \
|
||||
((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD) || \
|
||||
((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTBYTE) || \
|
||||
((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTHALFWORD) || \
|
||||
((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTWORD))
|
||||
|
||||
|
||||
/** @defgroup FLASHEx_Address FLASHEx Address
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END))
|
||||
|
||||
#if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \
|
||||
|| defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L100xC) || defined(STM32L151xC) \
|
||||
|| defined(STM32L152xC) || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L152xCA) \
|
||||
|| defined(STM32L162xCA)
|
||||
|
||||
#define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END))
|
||||
|
||||
#else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
|
||||
|
||||
#define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
|
||||
#define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END))
|
||||
#define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END))
|
||||
|
||||
#endif /* STM32L100xB || STM32L151xB || STM32L152xB || (...) || STM32L151xCA || STM32L152xCA || STM32L162xCA */
|
||||
|
||||
#define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1U) && ((__PAGES__) <= FLASH_NBPAGES_MAX))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief FLASH Erase structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t TypeErase; /*!< TypeErase: Page Erase only.
|
||||
This parameter can be a value of @ref FLASHEx_Type_Erase */
|
||||
|
||||
uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased
|
||||
This parameter must be a value belonging to FLASH Programm address (depending on the devices) */
|
||||
|
||||
uint32_t NbPages; /*!< NbPages: Number of pages to be erased.
|
||||
This parameter must be a value between 1 and (max number of pages - value of Initial page)*/
|
||||
|
||||
} FLASH_EraseInitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief FLASH Option Bytes PROGRAM structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t OptionType; /*!< OptionType: Option byte to be configured.
|
||||
This parameter can be a value of @ref FLASHEx_Option_Type */
|
||||
|
||||
uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation.
|
||||
This parameter can be a value of @ref FLASHEx_WRP_State */
|
||||
|
||||
uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31
|
||||
This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */
|
||||
|
||||
#if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
|
||||
|| defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \
|
||||
|| defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \
|
||||
|| defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
|
||||
uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63
|
||||
This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */
|
||||
#endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L151xE || STM32L152xE || STM32L162xE */
|
||||
|
||||
#if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
|
||||
|| defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \
|
||||
|| defined(STM32L162xE)
|
||||
uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95
|
||||
This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */
|
||||
#endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
|
||||
|
||||
#if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \
|
||||
|| defined(STM32L152xDX) || defined(STM32L162xDX)
|
||||
uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 or
|
||||
Sectors 96 to 111 for STM32L1xxxDX devices.
|
||||
This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */
|
||||
#endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */
|
||||
|
||||
uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.
|
||||
This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
|
||||
|
||||
uint8_t BORLevel; /*!< BORLevel: Set the BOR Level.
|
||||
This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */
|
||||
|
||||
uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
|
||||
This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog,
|
||||
@ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/
|
||||
} FLASH_OBProgramInitTypeDef;
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2)
|
||||
/**
|
||||
* @brief FLASH Advanced Option Bytes Program structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension .
|
||||
This parameter can be a value of @ref FLASHEx_OptionAdv_Type */
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD)
|
||||
uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation.
|
||||
This parameter can be a value of @ref FLASHEx_PCROP_State */
|
||||
|
||||
uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP
|
||||
This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */
|
||||
|
||||
#if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC)
|
||||
uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP
|
||||
This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */
|
||||
#endif /* STM32L151xC || STM32L152xC || STM32L162xC */
|
||||
#endif /* FLASH_OBR_SPRMOD */
|
||||
|
||||
#if defined(FLASH_OBR_nRST_BFB2)
|
||||
uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config
|
||||
This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */
|
||||
#endif /* FLASH_OBR_nRST_BFB2*/
|
||||
} FLASH_AdvOBProgramInitTypeDef;
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
|
||||
/** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_TYPEERASE_PAGES (0x00U) /*!<Page erase only*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Option_Type FLASHEx Option Type
|
||||
* @{
|
||||
*/
|
||||
#define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/
|
||||
#define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/
|
||||
#define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/
|
||||
#define OPTIONBYTE_BOR (0x08U) /*!<BOR option byte configuration*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_WRP_State FLASHEx WRP State
|
||||
* @{
|
||||
*/
|
||||
#define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired sectors*/
|
||||
#define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired sectors*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
|
||||
#define OB_WRP1_PAGES0TO15 (0x00000001U) /* Write protection of Sector0 */
|
||||
#define OB_WRP1_PAGES16TO31 (0x00000002U) /* Write protection of Sector1 */
|
||||
#define OB_WRP1_PAGES32TO47 (0x00000004U) /* Write protection of Sector2 */
|
||||
#define OB_WRP1_PAGES48TO63 (0x00000008U) /* Write protection of Sector3 */
|
||||
#define OB_WRP1_PAGES64TO79 (0x00000010U) /* Write protection of Sector4 */
|
||||
#define OB_WRP1_PAGES80TO95 (0x00000020U) /* Write protection of Sector5 */
|
||||
#define OB_WRP1_PAGES96TO111 (0x00000040U) /* Write protection of Sector6 */
|
||||
#define OB_WRP1_PAGES112TO127 (0x00000080U) /* Write protection of Sector7 */
|
||||
#define OB_WRP1_PAGES128TO143 (0x00000100U) /* Write protection of Sector8 */
|
||||
#define OB_WRP1_PAGES144TO159 (0x00000200U) /* Write protection of Sector9 */
|
||||
#define OB_WRP1_PAGES160TO175 (0x00000400U) /* Write protection of Sector10 */
|
||||
#define OB_WRP1_PAGES176TO191 (0x00000800U) /* Write protection of Sector11 */
|
||||
#define OB_WRP1_PAGES192TO207 (0x00001000U) /* Write protection of Sector12 */
|
||||
#define OB_WRP1_PAGES208TO223 (0x00002000U) /* Write protection of Sector13 */
|
||||
#define OB_WRP1_PAGES224TO239 (0x00004000U) /* Write protection of Sector14 */
|
||||
#define OB_WRP1_PAGES240TO255 (0x00008000U) /* Write protection of Sector15 */
|
||||
#define OB_WRP1_PAGES256TO271 (0x00010000U) /* Write protection of Sector16 */
|
||||
#define OB_WRP1_PAGES272TO287 (0x00020000U) /* Write protection of Sector17 */
|
||||
#define OB_WRP1_PAGES288TO303 (0x00040000U) /* Write protection of Sector18 */
|
||||
#define OB_WRP1_PAGES304TO319 (0x00080000U) /* Write protection of Sector19 */
|
||||
#define OB_WRP1_PAGES320TO335 (0x00100000U) /* Write protection of Sector20 */
|
||||
#define OB_WRP1_PAGES336TO351 (0x00200000U) /* Write protection of Sector21 */
|
||||
#define OB_WRP1_PAGES352TO367 (0x00400000U) /* Write protection of Sector22 */
|
||||
#define OB_WRP1_PAGES368TO383 (0x00800000U) /* Write protection of Sector23 */
|
||||
#define OB_WRP1_PAGES384TO399 (0x01000000U) /* Write protection of Sector24 */
|
||||
#define OB_WRP1_PAGES400TO415 (0x02000000U) /* Write protection of Sector25 */
|
||||
#define OB_WRP1_PAGES416TO431 (0x04000000U) /* Write protection of Sector26 */
|
||||
#define OB_WRP1_PAGES432TO447 (0x08000000U) /* Write protection of Sector27 */
|
||||
#define OB_WRP1_PAGES448TO463 (0x10000000U) /* Write protection of Sector28 */
|
||||
#define OB_WRP1_PAGES464TO479 (0x20000000U) /* Write protection of Sector29 */
|
||||
#define OB_WRP1_PAGES480TO495 (0x40000000U) /* Write protection of Sector30 */
|
||||
#define OB_WRP1_PAGES496TO511 (0x80000000U) /* Write protection of Sector31 */
|
||||
|
||||
#define OB_WRP1_ALLPAGES ((uint32_t)FLASH_WRPR1_WRP) /*!< Write protection of all Sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
|
||||
|| defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \
|
||||
|| defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \
|
||||
|| defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Pages for Cat3, Cat4 & Cat5 devices*/
|
||||
#define OB_WRP2_PAGES512TO527 (0x00000001U) /* Write protection of Sector32 */
|
||||
#define OB_WRP2_PAGES528TO543 (0x00000002U) /* Write protection of Sector33 */
|
||||
#define OB_WRP2_PAGES544TO559 (0x00000004U) /* Write protection of Sector34 */
|
||||
#define OB_WRP2_PAGES560TO575 (0x00000008U) /* Write protection of Sector35 */
|
||||
#define OB_WRP2_PAGES576TO591 (0x00000010U) /* Write protection of Sector36 */
|
||||
#define OB_WRP2_PAGES592TO607 (0x00000020U) /* Write protection of Sector37 */
|
||||
#define OB_WRP2_PAGES608TO623 (0x00000040U) /* Write protection of Sector38 */
|
||||
#define OB_WRP2_PAGES624TO639 (0x00000080U) /* Write protection of Sector39 */
|
||||
#define OB_WRP2_PAGES640TO655 (0x00000100U) /* Write protection of Sector40 */
|
||||
#define OB_WRP2_PAGES656TO671 (0x00000200U) /* Write protection of Sector41 */
|
||||
#define OB_WRP2_PAGES672TO687 (0x00000400U) /* Write protection of Sector42 */
|
||||
#define OB_WRP2_PAGES688TO703 (0x00000800U) /* Write protection of Sector43 */
|
||||
#define OB_WRP2_PAGES704TO719 (0x00001000U) /* Write protection of Sector44 */
|
||||
#define OB_WRP2_PAGES720TO735 (0x00002000U) /* Write protection of Sector45 */
|
||||
#define OB_WRP2_PAGES736TO751 (0x00004000U) /* Write protection of Sector46 */
|
||||
#define OB_WRP2_PAGES752TO767 (0x00008000U) /* Write protection of Sector47 */
|
||||
|
||||
#if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \
|
||||
|| defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L152xCA) || defined(STM32L152xD) \
|
||||
|| defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L152xE) \
|
||||
|| defined(STM32L162xE)
|
||||
|
||||
#define OB_WRP2_PAGES768TO783 (0x00010000U) /* Write protection of Sector48 */
|
||||
#define OB_WRP2_PAGES784TO799 (0x00020000U) /* Write protection of Sector49 */
|
||||
#define OB_WRP2_PAGES800TO815 (0x00040000U) /* Write protection of Sector50 */
|
||||
#define OB_WRP2_PAGES816TO831 (0x00080000U) /* Write protection of Sector51 */
|
||||
#define OB_WRP2_PAGES832TO847 (0x00100000U) /* Write protection of Sector52 */
|
||||
#define OB_WRP2_PAGES848TO863 (0x00200000U) /* Write protection of Sector53 */
|
||||
#define OB_WRP2_PAGES864TO879 (0x00400000U) /* Write protection of Sector54 */
|
||||
#define OB_WRP2_PAGES880TO895 (0x00800000U) /* Write protection of Sector55 */
|
||||
#define OB_WRP2_PAGES896TO911 (0x01000000U) /* Write protection of Sector56 */
|
||||
#define OB_WRP2_PAGES912TO927 (0x02000000U) /* Write protection of Sector57 */
|
||||
#define OB_WRP2_PAGES928TO943 (0x04000000U) /* Write protection of Sector58 */
|
||||
#define OB_WRP2_PAGES944TO959 (0x08000000U) /* Write protection of Sector59 */
|
||||
#define OB_WRP2_PAGES960TO975 (0x10000000U) /* Write protection of Sector60 */
|
||||
#define OB_WRP2_PAGES976TO991 (0x20000000U) /* Write protection of Sector61 */
|
||||
#define OB_WRP2_PAGES992TO1007 (0x40000000U) /* Write protection of Sector62 */
|
||||
#define OB_WRP2_PAGES1008TO1023 (0x80000000U) /* Write protection of Sector63 */
|
||||
|
||||
#endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */
|
||||
|
||||
#define OB_WRP2_ALLPAGES ((uint32_t)FLASH_WRPR2_WRP) /*!< Write protection of all Sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xDX || STM32L152xE || STM32L162xE */
|
||||
|
||||
#if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \
|
||||
|| defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \
|
||||
|| defined(STM32L162xE)
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Pages for devices with FLASH >= 256KB*/
|
||||
#define OB_WRP3_PAGES1024TO1039 (0x00000001U) /* Write protection of Sector64 */
|
||||
#define OB_WRP3_PAGES1040TO1055 (0x00000002U) /* Write protection of Sector65 */
|
||||
#define OB_WRP3_PAGES1056TO1071 (0x00000004U) /* Write protection of Sector66 */
|
||||
#define OB_WRP3_PAGES1072TO1087 (0x00000008U) /* Write protection of Sector67 */
|
||||
#define OB_WRP3_PAGES1088TO1103 (0x00000010U) /* Write protection of Sector68 */
|
||||
#define OB_WRP3_PAGES1104TO1119 (0x00000020U) /* Write protection of Sector69 */
|
||||
#define OB_WRP3_PAGES1120TO1135 (0x00000040U) /* Write protection of Sector70 */
|
||||
#define OB_WRP3_PAGES1136TO1151 (0x00000080U) /* Write protection of Sector71 */
|
||||
#define OB_WRP3_PAGES1152TO1167 (0x00000100U) /* Write protection of Sector72 */
|
||||
#define OB_WRP3_PAGES1168TO1183 (0x00000200U) /* Write protection of Sector73 */
|
||||
#define OB_WRP3_PAGES1184TO1199 (0x00000400U) /* Write protection of Sector74 */
|
||||
#define OB_WRP3_PAGES1200TO1215 (0x00000800U) /* Write protection of Sector75 */
|
||||
#define OB_WRP3_PAGES1216TO1231 (0x00001000U) /* Write protection of Sector76 */
|
||||
#define OB_WRP3_PAGES1232TO1247 (0x00002000U) /* Write protection of Sector77 */
|
||||
#define OB_WRP3_PAGES1248TO1263 (0x00004000U) /* Write protection of Sector78 */
|
||||
#define OB_WRP3_PAGES1264TO1279 (0x00008000U) /* Write protection of Sector79 */
|
||||
#define OB_WRP3_PAGES1280TO1295 (0x00010000U) /* Write protection of Sector80 */
|
||||
#define OB_WRP3_PAGES1296TO1311 (0x00020000U) /* Write protection of Sector81 */
|
||||
#define OB_WRP3_PAGES1312TO1327 (0x00040000U) /* Write protection of Sector82 */
|
||||
#define OB_WRP3_PAGES1328TO1343 (0x00080000U) /* Write protection of Sector83 */
|
||||
#define OB_WRP3_PAGES1344TO1359 (0x00100000U) /* Write protection of Sector84 */
|
||||
#define OB_WRP3_PAGES1360TO1375 (0x00200000U) /* Write protection of Sector85 */
|
||||
#define OB_WRP3_PAGES1376TO1391 (0x00400000U) /* Write protection of Sector86 */
|
||||
#define OB_WRP3_PAGES1392TO1407 (0x00800000U) /* Write protection of Sector87 */
|
||||
#define OB_WRP3_PAGES1408TO1423 (0x01000000U) /* Write protection of Sector88 */
|
||||
#define OB_WRP3_PAGES1424TO1439 (0x02000000U) /* Write protection of Sector89 */
|
||||
#define OB_WRP3_PAGES1440TO1455 (0x04000000U) /* Write protection of Sector90 */
|
||||
#define OB_WRP3_PAGES1456TO1471 (0x08000000U) /* Write protection of Sector91 */
|
||||
#define OB_WRP3_PAGES1472TO1487 (0x10000000U) /* Write protection of Sector92 */
|
||||
#define OB_WRP3_PAGES1488TO1503 (0x20000000U) /* Write protection of Sector93 */
|
||||
#define OB_WRP3_PAGES1504TO1519 (0x40000000U) /* Write protection of Sector94 */
|
||||
#define OB_WRP3_PAGES1520TO1535 (0x80000000U) /* Write protection of Sector95 */
|
||||
|
||||
#define OB_WRP3_ALLPAGES ((uint32_t)FLASH_WRPR3_WRP) /*!< Write protection of all Sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/
|
||||
|
||||
#if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \
|
||||
|| defined(STM32L152xDX) || defined(STM32L162xDX)
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Pages for Cat5 devices*/
|
||||
#define OB_WRP4_PAGES1536TO1551 (0x00000001U)/* Write protection of Sector96*/
|
||||
#define OB_WRP4_PAGES1552TO1567 (0x00000002U)/* Write protection of Sector97*/
|
||||
#define OB_WRP4_PAGES1568TO1583 (0x00000004U)/* Write protection of Sector98*/
|
||||
#define OB_WRP4_PAGES1584TO1599 (0x00000008U)/* Write protection of Sector99*/
|
||||
#define OB_WRP4_PAGES1600TO1615 (0x00000010U) /* Write protection of Sector100*/
|
||||
#define OB_WRP4_PAGES1616TO1631 (0x00000020U) /* Write protection of Sector101*/
|
||||
#define OB_WRP4_PAGES1632TO1647 (0x00000040U) /* Write protection of Sector102*/
|
||||
#define OB_WRP4_PAGES1648TO1663 (0x00000080U) /* Write protection of Sector103*/
|
||||
#define OB_WRP4_PAGES1664TO1679 (0x00000100U) /* Write protection of Sector104*/
|
||||
#define OB_WRP4_PAGES1680TO1695 (0x00000200U) /* Write protection of Sector105*/
|
||||
#define OB_WRP4_PAGES1696TO1711 (0x00000400U) /* Write protection of Sector106*/
|
||||
#define OB_WRP4_PAGES1712TO1727 (0x00000800U) /* Write protection of Sector107*/
|
||||
#define OB_WRP4_PAGES1728TO1743 (0x00001000U) /* Write protection of Sector108*/
|
||||
#define OB_WRP4_PAGES1744TO1759 (0x00002000U) /* Write protection of Sector109*/
|
||||
#define OB_WRP4_PAGES1760TO1775 (0x00004000U) /* Write protection of Sector110*/
|
||||
#define OB_WRP4_PAGES1776TO1791 (0x00008000U) /* Write protection of Sector111*/
|
||||
|
||||
#if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE)
|
||||
|
||||
#define OB_WRP4_PAGES1792TO1807 (0x00010000U) /* Write protection of Sector112*/
|
||||
#define OB_WRP4_PAGES1808TO1823 (0x00020000U) /* Write protection of Sector113*/
|
||||
#define OB_WRP4_PAGES1824TO1839 (0x00040000U) /* Write protection of Sector114*/
|
||||
#define OB_WRP4_PAGES1840TO1855 (0x00080000U) /* Write protection of Sector115*/
|
||||
#define OB_WRP4_PAGES1856TO1871 (0x00100000U) /* Write protection of Sector116*/
|
||||
#define OB_WRP4_PAGES1872TO1887 (0x00200000U) /* Write protection of Sector117*/
|
||||
#define OB_WRP4_PAGES1888TO1903 (0x00400000U) /* Write protection of Sector118*/
|
||||
#define OB_WRP4_PAGES1904TO1919 (0x00800000U) /* Write protection of Sector119*/
|
||||
#define OB_WRP4_PAGES1920TO1935 (0x01000000U) /* Write protection of Sector120*/
|
||||
#define OB_WRP4_PAGES1936TO1951 (0x02000000U) /* Write protection of Sector121*/
|
||||
#define OB_WRP4_PAGES1952TO1967 (0x04000000U) /* Write protection of Sector122*/
|
||||
#define OB_WRP4_PAGES1968TO1983 (0x08000000U) /* Write protection of Sector123*/
|
||||
#define OB_WRP4_PAGES1984TO1999 (0x10000000U) /* Write protection of Sector124*/
|
||||
#define OB_WRP4_PAGES2000TO2015 (0x20000000U) /* Write protection of Sector125*/
|
||||
#define OB_WRP4_PAGES2016TO2031 (0x40000000U) /* Write protection of Sector126*/
|
||||
#define OB_WRP4_PAGES2032TO2047 (0x80000000U) /* Write protection of Sector127*/
|
||||
|
||||
#endif /* STM32L151xE || STM32L152xE || STM32L162xE */
|
||||
|
||||
#define OB_WRP4_ALLPAGES ((uint32_t)FLASH_WRPR4_WRP) /*!< Write protection of all Sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection
|
||||
* @{
|
||||
*/
|
||||
#define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
|
||||
#define OB_RDP_LEVEL_1 ((uint8_t)0xBBU)
|
||||
#define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2
|
||||
it is no more possible to go back to level 1 or 0 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD
|
||||
power supply reaches the PDR(Power Down Reset) threshold (1.5V) */
|
||||
#define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */
|
||||
#define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */
|
||||
#define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */
|
||||
#define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */
|
||||
#define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */
|
||||
#define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */
|
||||
#define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */
|
||||
#define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD)
|
||||
|
||||
/** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OPTIONBYTE_PCROP (0x01U) /*!<PCROP option byte configuration*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* FLASH_OBR_SPRMOD */
|
||||
|
||||
#if defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
/** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OPTIONBYTE_BOOTCONFIG (0x02U) /*!<BOOTConfig option byte configuration*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* FLASH_OBR_nRST_BFB2 */
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD)
|
||||
|
||||
/** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State
|
||||
* @{
|
||||
*/
|
||||
#define OB_PCROP_STATE_DISABLE (0x00U) /*!<Disable PCROP for selected sectors */
|
||||
#define OB_PCROP_STATE_ENABLE (0x01U) /*!<Enable PCROP for selected sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode
|
||||
* @{
|
||||
*/
|
||||
#define OB_PCROP_DESELECTED ((uint16_t)0x0000U) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */
|
||||
#define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* FLASH_OBR_SPRMOD */
|
||||
|
||||
#if defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L151xC) || defined(STM32L152xC) \
|
||||
|| defined(STM32L162xC)
|
||||
/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */
|
||||
#define OB_PCROP1_PAGES0TO15 (0x00000001U) /* PC Read/Write protection of Sector0 */
|
||||
#define OB_PCROP1_PAGES16TO31 (0x00000002U) /* PC Read/Write protection of Sector1 */
|
||||
#define OB_PCROP1_PAGES32TO47 (0x00000004U) /* PC Read/Write protection of Sector2 */
|
||||
#define OB_PCROP1_PAGES48TO63 (0x00000008U) /* PC Read/Write protection of Sector3 */
|
||||
#define OB_PCROP1_PAGES64TO79 (0x00000010U) /* PC Read/Write protection of Sector4 */
|
||||
#define OB_PCROP1_PAGES80TO95 (0x00000020U) /* PC Read/Write protection of Sector5 */
|
||||
#define OB_PCROP1_PAGES96TO111 (0x00000040U) /* PC Read/Write protection of Sector6 */
|
||||
#define OB_PCROP1_PAGES112TO127 (0x00000080U) /* PC Read/Write protection of Sector7 */
|
||||
#define OB_PCROP1_PAGES128TO143 (0x00000100U) /* PC Read/Write protection of Sector8 */
|
||||
#define OB_PCROP1_PAGES144TO159 (0x00000200U) /* PC Read/Write protection of Sector9 */
|
||||
#define OB_PCROP1_PAGES160TO175 (0x00000400U) /* PC Read/Write protection of Sector10 */
|
||||
#define OB_PCROP1_PAGES176TO191 (0x00000800U) /* PC Read/Write protection of Sector11 */
|
||||
#define OB_PCROP1_PAGES192TO207 (0x00001000U) /* PC Read/Write protection of Sector12 */
|
||||
#define OB_PCROP1_PAGES208TO223 (0x00002000U) /* PC Read/Write protection of Sector13 */
|
||||
#define OB_PCROP1_PAGES224TO239 (0x00004000U) /* PC Read/Write protection of Sector14 */
|
||||
#define OB_PCROP1_PAGES240TO255 (0x00008000U) /* PC Read/Write protection of Sector15 */
|
||||
#define OB_PCROP1_PAGES256TO271 (0x00010000U) /* PC Read/Write protection of Sector16 */
|
||||
#define OB_PCROP1_PAGES272TO287 (0x00020000U) /* PC Read/Write protection of Sector17 */
|
||||
#define OB_PCROP1_PAGES288TO303 (0x00040000U) /* PC Read/Write protection of Sector18 */
|
||||
#define OB_PCROP1_PAGES304TO319 (0x00080000U) /* PC Read/Write protection of Sector19 */
|
||||
#define OB_PCROP1_PAGES320TO335 (0x00100000U) /* PC Read/Write protection of Sector20 */
|
||||
#define OB_PCROP1_PAGES336TO351 (0x00200000U) /* PC Read/Write protection of Sector21 */
|
||||
#define OB_PCROP1_PAGES352TO367 (0x00400000U) /* PC Read/Write protection of Sector22 */
|
||||
#define OB_PCROP1_PAGES368TO383 (0x00800000U) /* PC Read/Write protection of Sector23 */
|
||||
#define OB_PCROP1_PAGES384TO399 (0x01000000U) /* PC Read/Write protection of Sector24 */
|
||||
#define OB_PCROP1_PAGES400TO415 (0x02000000U) /* PC Read/Write protection of Sector25 */
|
||||
#define OB_PCROP1_PAGES416TO431 (0x04000000U) /* PC Read/Write protection of Sector26 */
|
||||
#define OB_PCROP1_PAGES432TO447 (0x08000000U) /* PC Read/Write protection of Sector27 */
|
||||
#define OB_PCROP1_PAGES448TO463 (0x10000000U) /* PC Read/Write protection of Sector28 */
|
||||
#define OB_PCROP1_PAGES464TO479 (0x20000000U) /* PC Read/Write protection of Sector29 */
|
||||
#define OB_PCROP1_PAGES480TO495 (0x40000000U) /* PC Read/Write protection of Sector30 */
|
||||
#define OB_PCROP1_PAGES496TO511 (0x80000000U) /* PC Read/Write protection of Sector31 */
|
||||
|
||||
#define OB_PCROP1_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */
|
||||
|
||||
#if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC)
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Pages for Cat3, Cat4 & Cat5 devices*/
|
||||
#define OB_PCROP2_PAGES512TO527 (0x00000001U) /* PC Read/Write protection of Sector32 */
|
||||
#define OB_PCROP2_PAGES528TO543 (0x00000002U) /* PC Read/Write protection of Sector33 */
|
||||
#define OB_PCROP2_PAGES544TO559 (0x00000004U) /* PC Read/Write protection of Sector34 */
|
||||
#define OB_PCROP2_PAGES560TO575 (0x00000008U) /* PC Read/Write protection of Sector35 */
|
||||
#define OB_PCROP2_PAGES576TO591 (0x00000010U) /* PC Read/Write protection of Sector36 */
|
||||
#define OB_PCROP2_PAGES592TO607 (0x00000020U) /* PC Read/Write protection of Sector37 */
|
||||
#define OB_PCROP2_PAGES608TO623 (0x00000040U) /* PC Read/Write protection of Sector38 */
|
||||
#define OB_PCROP2_PAGES624TO639 (0x00000080U) /* PC Read/Write protection of Sector39 */
|
||||
#define OB_PCROP2_PAGES640TO655 (0x00000100U) /* PC Read/Write protection of Sector40 */
|
||||
#define OB_PCROP2_PAGES656TO671 (0x00000200U) /* PC Read/Write protection of Sector41 */
|
||||
#define OB_PCROP2_PAGES672TO687 (0x00000400U) /* PC Read/Write protection of Sector42 */
|
||||
#define OB_PCROP2_PAGES688TO703 (0x00000800U) /* PC Read/Write protection of Sector43 */
|
||||
#define OB_PCROP2_PAGES704TO719 (0x00001000U) /* PC Read/Write protection of Sector44 */
|
||||
#define OB_PCROP2_PAGES720TO735 (0x00002000U) /* PC Read/Write protection of Sector45 */
|
||||
#define OB_PCROP2_PAGES736TO751 (0x00004000U) /* PC Read/Write protection of Sector46 */
|
||||
#define OB_PCROP2_PAGES752TO767 (0x00008000U) /* PC Read/Write protection of Sector47 */
|
||||
#define OB_PCROP2_PAGES768TO783 (0x00010000U) /* PC Read/Write protection of Sector48 */
|
||||
#define OB_PCROP2_PAGES784TO799 (0x00020000U) /* PC Read/Write protection of Sector49 */
|
||||
#define OB_PCROP2_PAGES800TO815 (0x00040000U) /* PC Read/Write protection of Sector50 */
|
||||
#define OB_PCROP2_PAGES816TO831 (0x00080000U) /* PC Read/Write protection of Sector51 */
|
||||
#define OB_PCROP2_PAGES832TO847 (0x00100000U) /* PC Read/Write protection of Sector52 */
|
||||
#define OB_PCROP2_PAGES848TO863 (0x00200000U) /* PC Read/Write protection of Sector53 */
|
||||
#define OB_PCROP2_PAGES864TO879 (0x00400000U) /* PC Read/Write protection of Sector54 */
|
||||
#define OB_PCROP2_PAGES880TO895 (0x00800000U) /* PC Read/Write protection of Sector55 */
|
||||
#define OB_PCROP2_PAGES896TO911 (0x01000000U) /* PC Read/Write protection of Sector56 */
|
||||
#define OB_PCROP2_PAGES912TO927 (0x02000000U) /* PC Read/Write protection of Sector57 */
|
||||
#define OB_PCROP2_PAGES928TO943 (0x04000000U) /* PC Read/Write protection of Sector58 */
|
||||
#define OB_PCROP2_PAGES944TO959 (0x08000000U) /* PC Read/Write protection of Sector59 */
|
||||
#define OB_PCROP2_PAGES960TO975 (0x10000000U) /* PC Read/Write protection of Sector60 */
|
||||
#define OB_PCROP2_PAGES976TO991 (0x20000000U) /* PC Read/Write protection of Sector61 */
|
||||
#define OB_PCROP2_PAGES992TO1007 (0x40000000U) /* PC Read/Write protection of Sector62 */
|
||||
#define OB_PCROP2_PAGES1008TO1023 (0x80000000U) /* PC Read/Write protection of Sector63 */
|
||||
|
||||
#define OB_PCROP2_ALLPAGES (0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* STM32L151xC || STM32L152xC || STM32L162xC */
|
||||
|
||||
/** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_TYPEERASEDATA_BYTE (0x00U) /*!<Erase byte (8-bit) at a specified address.*/
|
||||
#define FLASH_TYPEERASEDATA_HALFWORD (0x01U) /*!<Erase a half-word (16-bit) at a specified address.*/
|
||||
#define FLASH_TYPEERASEDATA_WORD (0x02U) /*!<Erase a word (32-bit) at a specified address.*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data
|
||||
* @{
|
||||
*/
|
||||
#define FLASH_TYPEPROGRAMDATA_BYTE (0x00U) /*!<Program byte (8-bit) at a specified address.*/
|
||||
#define FLASH_TYPEPROGRAMDATA_HALFWORD (0x01U) /*!<Program a half-word (16-bit) at a specified address.*/
|
||||
#define FLASH_TYPEPROGRAMDATA_WORD (0x02U) /*!<Program a word (32-bit) at a specified address.*/
|
||||
#define FLASH_TYPEPROGRAMDATA_FASTBYTE (0x04U) /*!<Fast Program byte (8-bit) at a specified address.*/
|
||||
#define FLASH_TYPEPROGRAMDATA_FASTHALFWORD (0x08U) /*!<Fast Program a half-word (16-bit) at a specified address.*/
|
||||
#define FLASH_TYPEPROGRAMDATA_FASTWORD (0x10U) /*!<Fast Program a word (32-bit) at a specified address.*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#if defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
/** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define OB_BOOT_BANK2 ((uint8_t)0x00U) /*!< At startup, if boot pins are set in boot from user Flash position
|
||||
and this parameter is selected the device will boot from Bank 2
|
||||
or Bank 1, depending on the activation of the bank */
|
||||
#define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16U)) /*!< At startup, if boot pins are set in boot from user Flash position
|
||||
and this parameter is selected the device will boot from Bank1(Default) */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* FLASH_OBR_nRST_BFB2 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
|
||||
/** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set the FLASH Latency.
|
||||
* @param __LATENCY__ FLASH Latency
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle
|
||||
* @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \
|
||||
if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \
|
||||
MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \
|
||||
} while(0U)
|
||||
|
||||
/**
|
||||
* @brief Get the FLASH Latency.
|
||||
* @retval FLASH Latency
|
||||
* This parameter can be one of the following values:
|
||||
* @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle
|
||||
* @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle
|
||||
*/
|
||||
#define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))
|
||||
|
||||
/**
|
||||
* @brief Enable the FLASH 64-bit access.
|
||||
* @note Read access 64 bit is used.
|
||||
* @note This bit cannot be written at the same time as the LATENCY and
|
||||
* PRFTEN bits.
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64))
|
||||
|
||||
/**
|
||||
* @brief Disable the FLASH 64-bit access.
|
||||
* @note Read access 32 bit is used
|
||||
* @note To reset this bit, the LATENCY should be zero wait state and the
|
||||
* prefetch off.
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64))
|
||||
|
||||
/**
|
||||
* @brief Enable the FLASH prefetch buffer.
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \
|
||||
SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \
|
||||
} while(0U)
|
||||
|
||||
/**
|
||||
* @brief Disable the FLASH prefetch buffer.
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN)
|
||||
|
||||
/**
|
||||
* @brief Enable the FLASH power down during Sleep mode
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
|
||||
|
||||
/**
|
||||
* @brief Disable the FLASH power down during Sleep mode
|
||||
* @retval none
|
||||
*/
|
||||
#define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD)
|
||||
|
||||
/**
|
||||
* @brief Enable the Flash Run power down mode.
|
||||
* @note Writing this bit to 0 this bit, automatically the keys are
|
||||
* loss and a new unlock sequence is necessary to re-write it to 1.
|
||||
*/
|
||||
#define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
|
||||
FLASH->PDKEYR = FLASH_PDKEY2; \
|
||||
SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
* @brief Disable the Flash Run power down mode.
|
||||
* @note Writing this bit to 0 this bit, automatically the keys are
|
||||
* loss and a new unlock sequence is necessary to re-write it to 1.
|
||||
*/
|
||||
#define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \
|
||||
FLASH->PDKEYR = FLASH_PDKEY2; \
|
||||
CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup FLASHEx_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx_Exported_Functions_Group1
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx_Exported_Functions_Group2
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
|
||||
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2)
|
||||
|
||||
HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
|
||||
void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit);
|
||||
|
||||
#endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */
|
||||
|
||||
#if defined(FLASH_OBR_SPRMOD)
|
||||
|
||||
HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void);
|
||||
|
||||
#endif /* FLASH_OBR_SPRMOD */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup FLASHEx_Exported_Functions_Group3
|
||||
* @{
|
||||
*/
|
||||
|
||||
HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void);
|
||||
|
||||
HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address);
|
||||
HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data);
|
||||
void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void);
|
||||
void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32L1xx_HAL_FLASH_EX_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
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Reference in New Issue
Block a user