UrbaniakDo78593/signal_processing_vorlage
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zieglerhe 5efb80253b Fixed FFT Makefile Vorlage
2025-05-29 07:54:55 +02:00
hardware
Initial commit
2023-10-31 07:47:27 +01:00
software/signal_processing
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2023-10-31 07:47:27 +01:00
tests
Fixed FFT Makefile Vorlage
2025-05-29 07:54:55 +02:00
.gitignore
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data_channel_hw.tcl
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hardware_task_hw.tcl
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hardware_timestamp_hw.tcl
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hdl_sources.qsf
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init.sh
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Makefile
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niosII.qsys
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signal_processing.cdf
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signal_processing.qpf
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signal_processing.qsf
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2023-10-31 07:47:27 +01:00
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Description
Studentenversion des ESY6/A Praktikums "signal_processing".
251 KiB
Languages
VHDL 36.8%
C 17.6%
Verilog 15%
Python 10.7%
Makefile 8.2%
Other 11.6%