allamaaki80515/signal_processing
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allamaaki80515 44296a640b crc staengert
2025-12-23 10:56:59 +01:00
hardware
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software
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tests
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.gitignore
Initial commit
2023-10-31 07:47:27 +01:00
data_channel_hw.tcl
Initial commit
2023-10-31 07:47:27 +01:00
hardware_task_hw.tcl
Initial commit
2023-10-31 07:47:27 +01:00
hardware_timestamp_hw.tcl
Initial commit
2023-10-31 07:47:27 +01:00
hdl_sources.qsf
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2023-10-31 07:47:27 +01:00
init.sh
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2023-10-31 07:47:27 +01:00
Makefile
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2023-10-31 07:47:27 +01:00
niosII.qsys
Initial commit
2023-10-31 07:47:27 +01:00
signal_processing.cdf
Initial commit
2023-10-31 07:47:27 +01:00
signal_processing.qpf
Initial commit
2023-10-31 07:47:27 +01:00
signal_processing.qsf
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2023-10-31 07:47:27 +01:00
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Description
Lösung des Praktikums Systementwurf
25 MiB
Languages
C 44.1%
VHDL 17.7%
Python 9%
Makefile 7.4%
Verilog 7.1%
Other 14.7%