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kuntzschcl
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ESY1_Projekt_2022
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top_level_design
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2 Commits (top_level_design)
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sessleral71711
019dc2868e
Added parallelport, timer and ampelsteuerung
2 years ago
sessleral71711
026899b930
Added parallelport, timer and ampelsteuerung
2 years ago
Julian Uebler
37989e5bc1
Ampel
Ampelsteuerung mit toplevel_verbindungen sowie normaler TB und random TB
2 years ago