Studentenversion des ESY6/A Praktikums "signal_processing".
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data_tests.mk 224B

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  1. artifacts += data.py __pycache__
  2. CHECK_RESULTS = true
  3. include ../vhdl.mk
  4. plot: CHECK_RESULTS = false
  5. plot: sim
  6. @echo Plotting resulting signal vs. expected signal ...
  7. @../../scripts/plot.py ${expected_data} 2> /dev/null