Verwendeter Programmcode in Studienarbeit für ESY1B zum Thema "Verifikation mit SystemVerilog und Python"
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Makefile 3.0KB

3 years ago
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  1. # Makefile for Memory - Regression Testing
  2. RTL= ../rtl/counter.v
  3. work= work #library name
  4. COVOP= -coveropt 3 +cover +acc
  5. SVTB1= ../env/counter_if.sv ../env/counter_assertion.sv ../env/top.sv
  6. INC = +incdir+../env +incdir+../test
  7. SVTB2 = ../env/counter_pkg.sv
  8. TEST = ../test/test.sv
  9. #TEST1 = ../test/test1.sv
  10. #TEST2 = ../test/test2.sv
  11. VSIMOPT= -coverage -novopt -sva -sv_seed 2475652473 work.top
  12. VSIMCOV= coverage save -onexit -assert -directive -cvg -codeAll counter_cov
  13. VSIMBATCH= -c -do "$(VSIMCOV); run -all; exit"
  14. VSIMBATCH1 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov1;run -all;exit"
  15. VSIMBATCH2 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov2;run -all;exit"
  16. VSIMBATCH3 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov3;run -all;exit"
  17. VSIMBATCH4 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov4;run -all;exit"
  18. VSIMBATCH5 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov5;run -all;exit"
  19. VSIMBATCH6 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov6;run -all;exit"
  20. VSIMBATCH7 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov7;run -all;exit"
  21. VSIMBATCH8 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov8;run -all;exit"
  22. VSIMBATCH9 = -c -do "coverage save -onexit -assert -directive -cvg -codeAll counter_cov9;run -all;exit"
  23. html:
  24. firefox covhtmlreport/menu.html
  25. sv_cmp:
  26. vlib $(work)
  27. vmap work $(work)
  28. vlog -work $(work) $(COVOP) $(RTL) $(SVTB2) $(SVTB1) $(INC) #$(TEST)
  29. run_sim:
  30. vsim $(VSIMBATCH1) $(VSIMOPT) -l test1_sim.log +TEST1 +nowarn3829
  31. run_testg:
  32. vsim -novopt -sva -sv_seed random work.top +TEST1
  33. clear
  34. clean:
  35. rm -rf modelsim.* transcript* vlog.* work vsim.wlf counter_cov* fcover* covhtml* vcover* *.log
  36. clear
  37. TC2:
  38. vsim $(VSIMBATCH2) -coverage -novopt -sva -sv_seed 598761566 -l test2_sim.log work.top +TEST2
  39. TC3:
  40. vsim $(VSIMBATCH3) -coverage -novopt -sva -sv_seed 74473697 -l test3_sim.log work.top +TEST3
  41. TC4:
  42. vsim $(VSIMBATCH4) -coverage -novopt -sva -sv_seed 4275076933 -l test4_sim.log work.top +TEST4
  43. TC5:
  44. vsim $(VSIMBATCH5) -coverage -novopt -sva -sv_seed 3868229417 -l test5_sim.log work.top +TEST5
  45. TC6:
  46. vsim $(VSIMBATCH6) -coverage -novopt -sva -sv_seed 749764269 -l test6_sim.log work.top +TEST6
  47. TC7:
  48. vsim $(VSIMBATCH7) -coverage -novopt -sva -sv_seed 1982889551 -l test7_sim.log work.top +TEST7
  49. TC8:
  50. vsim $(VSIMBATCH8) -coverage -novopt -sva -sv_seed 1987083824 -l test8_sim.log work.top +TEST8
  51. TC9:
  52. vsim $(VSIMBATCH9) -coverage -novopt -sva -sv_seed 1987083824 -l test8_sim.log work.top +TEST9
  53. report:
  54. vcover merge counter_cov counter_cov1 counter_cov2 #counter_cov3 counter_cov4 counter_cov5 counter_cov6 counter_cov7
  55. vcover report -html counter_cov
  56. regress: clean run_test TC2 report html # TC3 TC4 TC5 TC6 TC7 report html
  57. gui:
  58. vsim $(VSIMOPT) -l test1_sim.log +TEST1 +nowarn3829
  59. run_gui: clean sv_cmp gui
  60. run_test: clean sv_cmp run_sim