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merge into: wuestgr61132/projekt_wuest_steiner:alice
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wuestgr61132/projekt_wuest_steiner:master wuestgr61132/projekt_wuest_steiner:stepper_dev wuestgr61132/projekt_wuest_steiner:alice wuestgr61132/projekt_wuest_steiner:gregor
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pull from: wuestgr61132/projekt_wuest_steiner:gregor
Branches Tags
wuestgr61132/projekt_wuest_steiner:master wuestgr61132/projekt_wuest_steiner:stepper_dev wuestgr61132/projekt_wuest_steiner:alice wuestgr61132/projekt_wuest_steiner:gregor
8 Commits
alice .. gregor
Author SHA1 Message Date
wuestgr61132 edf029fd31 implemented the calculation for the time that has to pass to make one step 2021-02-13 15:25:02 +01:00
wuestgr61132 c06ae5e360 -implemented basic button function 
->button press initiates 4 times 25 FULL STEPS forward (180 deg)
->reset to home position afterwards
 2021-01-11 17:26:07 +01:00
steineral61021 aceb30a237 Funktionierende Version 2021-01-08 13:38:16 +01:00
steineral61021 6307f72773 L152RE Pins Version (nicht funktionsfähig) 2021-01-06 12:48:09 +01:00
wuestgr61132 0915b62ae1 stepper project inserted 2020-12-29 17:06:35 +01:00
wuestgr61132 d11eea91e8 change 2020-12-29 16:28:35 +01:00
wuestgr61132 0a35867506 test change 2020-12-29 15:24:22 +01:00
wuestgr61132 1cc57bd43e test branch init 2020-12-29 15:22:42 +01:00
731 changed files with 221181 additions and 14505 deletions
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README.md
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# projekt_wuest_steiner # projekt_wuest_steiner
![meme](https://en.meming.world/images/en/1/17/Monkey_Puppet.jpg)
RTC/.mxproject
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File diff suppressed because one or more lines are too long
RTC/Core/Inc/fatfs_sd.h
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#ifndef __FATFS_SD_H
#define __FATFS_SD_H
/* Definitions for MMC/SDC command */
#define CMD0 (0x40+0) /* GO_IDLE_STATE */
#define CMD1 (0x40+1) /* SEND_OP_COND */
#define CMD8 (0x40+8) /* SEND_IF_COND */
#define CMD9 (0x40+9) /* SEND_CSD */
#define CMD10 (0x40+10) /* SEND_CID */
#define CMD12 (0x40+12) /* STOP_TRANSMISSION */
#define CMD16 (0x40+16) /* SET_BLOCKLEN */
#define CMD17 (0x40+17) /* READ_SINGLE_BLOCK */
#define CMD18 (0x40+18) /* READ_MULTIPLE_BLOCK */
#define CMD23 (0x40+23) /* SET_BLOCK_COUNT */
#define CMD24 (0x40+24) /* WRITE_BLOCK */
#define CMD25 (0x40+25) /* WRITE_MULTIPLE_BLOCK */
#define CMD41 (0x40+41) /* SEND_OP_COND (ACMD) */
#define CMD55 (0x40+55) /* APP_CMD */
#define CMD58 (0x40+58) /* READ_OCR */
/* MMC card type flags (MMC_GET_TYPE) */
#define CT_MMC 0x01 /* MMC ver 3 */
#define CT_SD1 0x02 /* SD ver 1 */
#define CT_SD2 0x04 /* SD ver 2 */
#define CT_SDC 0x06 /* SD */
#define CT_BLOCK 0x08 /* Block addressing */
/* Functions */
DSTATUS SD_disk_initialize (BYTE pdrv);
DSTATUS SD_disk_status (BYTE pdrv);
DRESULT SD_disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
DRESULT SD_disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
DRESULT SD_disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);
#define SPI_TIMEOUT 100
extern SPI_HandleTypeDef hspi1;
#define HSPI_SDCARD &hspi1
#define SD_CS_PORT GPIOB
#define SD_CS_PIN GPIO_PIN_6
#endif
RTC/Core/Inc/main.h
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
#include "x_nucleo_ihmxx.h"
#include "l6208.h"
#include "x_nucleo_ihm05a1_stm32f4xx.h"
#ifdef USE_STM32F4XX_NUCLEO
#include "x_nucleo_ihm05a1_stm32f4xx.h"
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define B1_Pin GPIO_PIN_13
#define B1_GPIO_Port GPIOC
#define USART_TX_Pin GPIO_PIN_2
#define USART_TX_GPIO_Port GPIOA
#define USART_RX_Pin GPIO_PIN_3
#define USART_RX_GPIO_Port GPIOA
#define LD2_Pin GPIO_PIN_5
#define LD2_GPIO_Port GPIOA
#define TMS_Pin GPIO_PIN_13
#define TMS_GPIO_Port GPIOA
#define TCK_Pin GPIO_PIN_14
#define TCK_GPIO_Port GPIOA
#define SWO_Pin GPIO_PIN_3
#define SWO_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Inc/stm32f4xx_hal_conf.h
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/**
******************************************************************************
* @file stm32f4xx_hal_conf_template.h
* @author MCD Application Team
* @brief HAL configuration template file.
* This file should be copied to the application folder and renamed
* to stm32f4xx_hal_conf.h.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_HAL_CONF_H
#define __STM32F4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_PCCARD_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
/* #define HAL_SDRAM_MODULE_ENABLED */
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED
/* #define HAL_SAI_MODULE_ENABLED */
/* #define HAL_SD_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* #define HAL_PCD_MODULE_ENABLED */
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_DSI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */
/* #define HAL_FMPI2C_MODULE_ENABLED */
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_DFSDM_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 1U
#define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */
#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */
#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## Ethernet peripheral configuration ##################### */
/* Section 1 : Ethernet peripheral configuration */
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
#define MAC_ADDR0 2U
#define MAC_ADDR1 0U
#define MAC_ADDR2 0U
#define MAC_ADDR3 0U
#define MAC_ADDR4 0U
#define MAC_ADDR5 0U
/* Definition of the Ethernet driver buffers size and count */
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
/* Section 2: PHY configuration section */
/* DP83848_PHY_ADDRESS Address*/
#define DP83848_PHY_ADDRESS 0x01U
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
/* PHY Configuration delay */
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
/* Section 3: Common PHY Registers */
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#include "stm32f4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
#include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
#include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
#include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32f4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32f4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f4xx_hal_cec.h"
#endif /* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_FMPI2C_MODULE_ENABLED
#include "stm32f4xx_hal_fmpi2c.h"
#endif /* HAL_FMPI2C_MODULE_ENABLED */
#ifdef HAL_SPDIFRX_MODULE_ENABLED
#include "stm32f4xx_hal_spdifrx.h"
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32f4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32f4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_MMC_MODULE_ENABLED
#include "stm32f4xx_hal_mmc.h"
#endif /* HAL_MMC_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Src/fatfs_sd.c
-544
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@@ -1,544 +0,0 @@
#define TRUE 1
#define FALSE 0
#define bool BYTE
#include "stm32f4xx_hal.h"
#include "diskio.h"
#include "fatfs_sd.h"
uint16_t Timer1, Timer2; /* 1ms Timer Counter */
static volatile DSTATUS Stat = STA_NOINIT; /* Disk Status */
static uint8_t CardType; /* Type 0:MMC, 1:SDC, 2:Block addressing */
static uint8_t PowerFlag = 0; /* Power flag */
/***************************************
* SPI functions
**************************************/
/* slave select */
static void SELECT(void)
{
HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_RESET);
HAL_Delay(1);
}
/* slave deselect */
static void DESELECT(void)
{
HAL_GPIO_WritePin(SD_CS_PORT, SD_CS_PIN, GPIO_PIN_SET);
HAL_Delay(1);
}
/* SPI transmit a byte */
static void SPI_TxByte(uint8_t data)
{
while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
HAL_SPI_Transmit(HSPI_SDCARD, &data, 1, SPI_TIMEOUT);
}
/* SPI transmit buffer */
static void SPI_TxBuffer(uint8_t *buffer, uint16_t len)
{
while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
HAL_SPI_Transmit(HSPI_SDCARD, buffer, len, SPI_TIMEOUT);
}
/* SPI receive a byte */
static uint8_t SPI_RxByte(void)
{
uint8_t dummy, data;
dummy = 0xFF;
while(!__HAL_SPI_GET_FLAG(HSPI_SDCARD, SPI_FLAG_TXE));
HAL_SPI_TransmitReceive(HSPI_SDCARD, &dummy, &data, 1, SPI_TIMEOUT);
return data;
}
/* SPI receive a byte via pointer */
static void SPI_RxBytePtr(uint8_t *buff)
{
*buff = SPI_RxByte();
}
/***************************************
* SD functions
**************************************/
/* wait SD ready */
static uint8_t SD_ReadyWait(void)
{
uint8_t res;
/* timeout 500ms */
Timer2 = 500;
/* if SD goes ready, receives 0xFF */
do {
res = SPI_RxByte();
} while ((res != 0xFF) && Timer2);
return res;
}
/* power on */
static void SD_PowerOn(void)
{
uint8_t args[6];
uint32_t cnt = 0x1FFF;
/* transmit bytes to wake up */
DESELECT();
for(int i = 0; i < 10; i++)
{
SPI_TxByte(0xFF);
}
/* slave select */
SELECT();
/* make idle state */
args[0] = CMD0; /* CMD0:GO_IDLE_STATE */
args[1] = 0;
args[2] = 0;
args[3] = 0;
args[4] = 0;
args[5] = 0x95; /* CRC */
SPI_TxBuffer(args, sizeof(args));
/* wait response */
while ((SPI_RxByte() != 0x01) && cnt)
{
cnt--;
}
DESELECT();
SPI_TxByte(0XFF);
PowerFlag = 1;
}
/* power off */
static void SD_PowerOff(void)
{
PowerFlag = 0;
}
/* check power flag */
static uint8_t SD_CheckPower(void)
{
return PowerFlag;
}
/* receive data block */
static bool SD_RxDataBlock(BYTE *buff, UINT len)
{
uint8_t token;
/* timeout 200ms */
Timer1 = 200;
/* loop until receive a response or timeout */
do {
token = SPI_RxByte();
} while((token == 0xFF) && Timer1);
/* invalid response */
if(token != 0xFE) return FALSE;
/* receive data */
do {
SPI_RxBytePtr(buff++);
} while(len--);
/* discard CRC */
SPI_RxByte();
SPI_RxByte();
return TRUE;
}
/* transmit data block */
#if _USE_WRITE == 1
static bool SD_TxDataBlock(const uint8_t *buff, BYTE token)
{
uint8_t resp;
uint8_t i = 0;
/* wait SD ready */
if (SD_ReadyWait() != 0xFF) return FALSE;
/* transmit token */
SPI_TxByte(token);
/* if it's not STOP token, transmit data */
if (token != 0xFD)
{
SPI_TxBuffer((uint8_t*)buff, 512);
/* discard CRC */
SPI_RxByte();
SPI_RxByte();
/* receive response */
while (i <= 64)
{
resp = SPI_RxByte();
/* transmit 0x05 accepted */
if ((resp & 0x1F) == 0x05) break;
i++;
}
/* recv buffer clear */
while (SPI_RxByte() == 0);
}
/* transmit 0x05 accepted */
if ((resp & 0x1F) == 0x05) return TRUE;
return FALSE;
}
#endif /* _USE_WRITE */
/* transmit command */
static BYTE SD_SendCmd(BYTE cmd, uint32_t arg)
{
uint8_t crc, res;
/* wait SD ready */
if (SD_ReadyWait() != 0xFF) return 0xFF;
/* transmit command */
SPI_TxByte(cmd); /* Command */
SPI_TxByte((uint8_t)(arg >> 24)); /* Argument[31..24] */
SPI_TxByte((uint8_t)(arg >> 16)); /* Argument[23..16] */
SPI_TxByte((uint8_t)(arg >> 8)); /* Argument[15..8] */
SPI_TxByte((uint8_t)arg); /* Argument[7..0] */
/* prepare CRC */
if(cmd == CMD0) crc = 0x95; /* CRC for CMD0(0) */
else if(cmd == CMD8) crc = 0x87; /* CRC for CMD8(0x1AA) */
else crc = 1;
/* transmit CRC */
SPI_TxByte(crc);
/* Skip a stuff byte when STOP_TRANSMISSION */
if (cmd == CMD12) SPI_RxByte();
/* receive response */
uint8_t n = 10;
do {
res = SPI_RxByte();
} while ((res & 0x80) && --n);
return res;
}
/***************************************
* user_diskio.c functions
**************************************/
/* initialize SD */
DSTATUS SD_disk_initialize(BYTE drv)
{
uint8_t n, type, ocr[4];
/* single drive, drv should be 0 */
if(drv) return STA_NOINIT;
/* no disk */
if(Stat & STA_NODISK) return Stat;
/* power on */
SD_PowerOn();
/* slave select */
SELECT();
/* check disk type */
type = 0;
/* send GO_IDLE_STATE command */
if (SD_SendCmd(CMD0, 0) == 1)
{
/* timeout 1 sec */
Timer1 = 1000;
/* SDC V2+ accept CMD8 command, http://elm-chan.org/docs/mmc/mmc_e.html */
if (SD_SendCmd(CMD8, 0x1AA) == 1)
{
/* operation condition register */
for (n = 0; n < 4; n++)
{
ocr[n] = SPI_RxByte();
}
/* voltage range 2.7-3.6V */
if (ocr[2] == 0x01 && ocr[3] == 0xAA)
{
/* ACMD41 with HCS bit */
do {
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 1UL << 30) == 0) break;
} while (Timer1);
/* READ_OCR */
if (Timer1 && SD_SendCmd(CMD58, 0) == 0)
{
/* Check CCS bit */
for (n = 0; n < 4; n++)
{
ocr[n] = SPI_RxByte();
}
/* SDv2 (HC or SC) */
type = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
}
}
}
else
{
/* SDC V1 or MMC */
type = (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) <= 1) ? CT_SD1 : CT_MMC;
do
{
if (type == CT_SD1)
{
if (SD_SendCmd(CMD55, 0) <= 1 && SD_SendCmd(CMD41, 0) == 0) break; /* ACMD41 */
}
else
{
if (SD_SendCmd(CMD1, 0) == 0) break; /* CMD1 */
}
} while (Timer1);
/* SET_BLOCKLEN */
if (!Timer1 || SD_SendCmd(CMD16, 512) != 0) type = 0;
}
}
CardType = type;
/* Idle */
DESELECT();
SPI_RxByte();
/* Clear STA_NOINIT */
if (type)
{
Stat &= ~STA_NOINIT;
}
else
{
/* Initialization failed */
SD_PowerOff();
}
return Stat;
}
/* return disk status */
DSTATUS SD_disk_status(BYTE drv)
{
if (drv) return STA_NOINIT;
return Stat;
}
/* read sector */
DRESULT SD_disk_read(BYTE pdrv, BYTE* buff, DWORD sector, UINT count)
{
/* pdrv should be 0 */
if (pdrv || !count) return RES_PARERR;
/* no disk */
if (Stat & STA_NOINIT) return RES_NOTRDY;
/* convert to byte address */
if (!(CardType & CT_SD2)) sector *= 512;
SELECT();
if (count == 1)
{
/* READ_SINGLE_BLOCK */
if ((SD_SendCmd(CMD17, sector) == 0) && SD_RxDataBlock(buff, 512)) count = 0;
}
else
{
/* READ_MULTIPLE_BLOCK */
if (SD_SendCmd(CMD18, sector) == 0)
{
do {
if (!SD_RxDataBlock(buff, 512)) break;
buff += 512;
} while (--count);
/* STOP_TRANSMISSION */
SD_SendCmd(CMD12, 0);
}
}
/* Idle */
DESELECT();
SPI_RxByte();
return count ? RES_ERROR : RES_OK;
}
/* write sector */
#if _USE_WRITE == 1
DRESULT SD_disk_write(BYTE pdrv, const BYTE* buff, DWORD sector, UINT count)
{
/* pdrv should be 0 */
if (pdrv || !count) return RES_PARERR;
/* no disk */
if (Stat & STA_NOINIT) return RES_NOTRDY;
/* write protection */
if (Stat & STA_PROTECT) return RES_WRPRT;
/* convert to byte address */
if (!(CardType & CT_SD2)) sector *= 512;
SELECT();
if (count == 1)
{
/* WRITE_BLOCK */
if ((SD_SendCmd(CMD24, sector) == 0) && SD_TxDataBlock(buff, 0xFE))
count = 0;
}
else
{
/* WRITE_MULTIPLE_BLOCK */
if (CardType & CT_SD1)
{
SD_SendCmd(CMD55, 0);
SD_SendCmd(CMD23, count); /* ACMD23 */
}
if (SD_SendCmd(CMD25, sector) == 0)
{
do {
if(!SD_TxDataBlock(buff, 0xFC)) break;
buff += 512;
} while (--count);
/* STOP_TRAN token */
if(!SD_TxDataBlock(0, 0xFD))
{
count = 1;
}
}
}
/* Idle */
DESELECT();
SPI_RxByte();
return count ? RES_ERROR : RES_OK;
}
#endif /* _USE_WRITE */
/* ioctl */
DRESULT SD_disk_ioctl(BYTE drv, BYTE ctrl, void *buff)
{
DRESULT res;
uint8_t n, csd[16], *ptr = buff;
WORD csize;
/* pdrv should be 0 */
if (drv) return RES_PARERR;
res = RES_ERROR;
if (ctrl == CTRL_POWER)
{
switch (*ptr)
{
case 0:
SD_PowerOff(); /* Power Off */
res = RES_OK;
break;
case 1:
SD_PowerOn(); /* Power On */
res = RES_OK;
break;
case 2:
*(ptr + 1) = SD_CheckPower();
res = RES_OK; /* Power Check */
break;
default:
res = RES_PARERR;
}
}
else
{
/* no disk */
if (Stat & STA_NOINIT) return RES_NOTRDY;
SELECT();
switch (ctrl)
{
case GET_SECTOR_COUNT:
/* SEND_CSD */
if ((SD_SendCmd(CMD9, 0) == 0) && SD_RxDataBlock(csd, 16))
{
if ((csd[0] >> 6) == 1)
{
/* SDC V2 */
csize = csd[9] + ((WORD) csd[8] << 8) + 1;
*(DWORD*) buff = (DWORD) csize << 10;
}
else
{
/* MMC or SDC V1 */
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
csize = (csd[8] >> 6) + ((WORD) csd[7] << 2) + ((WORD) (csd[6] & 3) << 10) + 1;
*(DWORD*) buff = (DWORD) csize << (n - 9);
}
res = RES_OK;
}
break;
case GET_SECTOR_SIZE:
*(WORD*) buff = 512;
res = RES_OK;
break;
case CTRL_SYNC:
if (SD_ReadyWait() == 0xFF) res = RES_OK;
break;
case MMC_GET_CSD:
/* SEND_CSD */
if (SD_SendCmd(CMD9, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
break;
case MMC_GET_CID:
/* SEND_CID */
if (SD_SendCmd(CMD10, 0) == 0 && SD_RxDataBlock(ptr, 16)) res = RES_OK;
break;
case MMC_GET_OCR:
/* READ_OCR */
if (SD_SendCmd(CMD58, 0) == 0)
{
for (n = 0; n < 4; n++)
{
*ptr++ = SPI_RxByte();
}
res = RES_OK;
}
default:
res = RES_PARERR;
}
DESELECT();
SPI_RxByte();
}
return res;
}
RTC/Core/Src/main.c
-1137
View File
File diff suppressed because it is too large Load Diff
RTC/Core/Src/stm32f4xx_hal_msp.c
-441
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@@ -1,441 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f4xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
extern void BSP_MotorControl_StepClockHandler(uint8_t deviceId);
extern void BSP_MotorControl_FlagInterruptHandler(void);
extern void ButtonHandler(void);
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief RTC MSP Initialization
* This function configures the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
{
if(hrtc->Instance==RTC)
{
/* USER CODE BEGIN RTC_MspInit 0 */
/* USER CODE END RTC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_RTC_ENABLE();
/* RTC interrupt Init */
HAL_NVIC_SetPriority(RTC_Alarm_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(RTC_Alarm_IRQn);
/* USER CODE BEGIN RTC_MspInit 1 */
/* USER CODE END RTC_MspInit 1 */
}
}
/**
* @brief RTC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
{
if(hrtc->Instance==RTC)
{
/* USER CODE BEGIN RTC_MspDeInit 0 */
/* USER CODE END RTC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_RTC_DISABLE();
/* RTC interrupt DeInit */
HAL_NVIC_DisableIRQ(RTC_Alarm_IRQn);
/* USER CODE BEGIN RTC_MspDeInit 1 */
/* USER CODE END RTC_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}
/**
* @brief PWM MSP Initialization
* @param[in] htim_pwm PWM handle pointer
* @retval None
*/
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
{
GPIO_InitTypeDef GPIO_InitStruct;
if(htim_pwm->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_TICK)
{
/* Peripheral clock enable */
__BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_CLCK_ENABLE();
/* Set Interrupt Group Priority of Timer Interrupt*/
HAL_NVIC_SetPriority(BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_IRQn, BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_PRIORITY, 0);
/* Enable the timer global Interrupt */
HAL_NVIC_EnableIRQ(BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_IRQn);
}
if(htim_pwm->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM)
{
/* Peripheral clock enable */
__BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM_CLCK_ENABLE();
/* Configure L6208 - VREFA pin -------------------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_VREFA_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
GPIO_InitStruct.Alternate = BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_VREFA_PWM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_VREFA_PORT, &GPIO_InitStruct);
}
if(htim_pwm->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM)
{
/* Peripheral clock enable */
__BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM_CLCK_ENABLE();
/* Configure L6208 - VREFB pin -------------------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_VREFB_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
GPIO_InitStruct.Alternate = BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_VREFB_PWM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_VREFB_PORT, &GPIO_InitStruct);
}
}
/**
* @brief PWM MSP De-Initialization
* @param[in] htim_pwm PWM handle pointer
* @retval None
*/
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
{
if(htim_pwm->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_TICK)
{
/* Peripheral clock disable */
__BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_CLCK_DISABLE();
}
if(htim_pwm->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM)
{
/* Peripheral clock disable */
__BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM_CLCK_DISABLE();
/* GPIO Deconfiguration */
HAL_GPIO_DeInit(BSP_MOTOR_CONTROL_BOARD_VREFA_PORT, BSP_MOTOR_CONTROL_BOARD_VREFA_PIN);
}
if(htim_pwm->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM)
{
/* Peripheral clock enable */
__BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM_CLCK_DISABLE();
/* GPIO Deconfiguration */
HAL_GPIO_DeInit(BSP_MOTOR_CONTROL_BOARD_VREFB_PORT, BSP_MOTOR_CONTROL_BOARD_VREFB_PIN);
}
}
/**
* @brief PWM Callback
* @param[in] htim PWM handle pointer
* @retval None
*/
void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
{
if ((htim->Instance == BSP_MOTOR_CONTROL_BOARD_TIMER_TICK)&& (htim->Channel == BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_TICK))
{
if (BSP_MotorControl_GetDeviceState(0) != INACTIVE)
{
BSP_MotorControl_StepClockHandler(0);
}
}
}
/**
* @brief External Line Callback
* @param[in] GPIO_Pin pin number
* @retval None
*/
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
{
if (GPIO_Pin == BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN)
{
BSP_MotorControl_FlagInterruptHandler();
}
if (GPIO_Pin == KEY_BUTTON_PIN)
{
ButtonHandler();
}
}
/**
* @brief ADC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
{
if(hadc->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC1_CLK_DISABLE();
/**ADC GPIO Configuration
PA0-WKUP1 ------> ADC_IN0
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
}
/**
* @brief ADC MSP Initialization
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hadc->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**ADC GPIO Configuration
PA0-WKUP1 ------> ADC_IN0
*/
GPIO_InitStruct.Pin = GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */
/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
/* USER CODE END SPI1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Src/system_stm32f4xx.c
-727
View File
@@ -1,727 +0,0 @@
/**
******************************************************************************
* @file system_stm32f4xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f4xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f4xx_system
* @{
*/
/** @addtogroup STM32F4xx_System_Private_Includes
* @{
*/
#include "stm32f4xx.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||\
STM32F412Zx || STM32F412Vx */
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
/* #define DATA_IN_ExtSDRAM */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
STM32F479xx */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
* @{
*/
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
/**
* @}
*/
/** @addtogroup STM32F4xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the FPU setting, vector table location and External memory
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
* depends on the application requirements), user has to ensure that HSE_VALUE
* is same as the real frequency of the crystal used. Otherwise, this function
* may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE;
break;
case 0x04: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x08: /* PLL used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
SYSCLK = PLL_VCO / PLL_P
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
if (pllsource != 0)
{
/* HSE used as PLL clock source */
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
else
{
/* HSI used as PLL clock source */
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
}
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
SystemCoreClock = pllvco/pllp;
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK frequency --------------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK frequency */
SystemCoreClock >>= tmp;
}
#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM)
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx)
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f4xx.s before jump to main.
* This function configures the external memories (SRAM/SDRAM)
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmp = 0x00;
register uint32_t tmpreg = 0, timeout = 0xFFFF;
register __IO uint32_t index;
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */
RCC->AHB1ENR |= 0x000001F8;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x00CCC0CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A8A;
/* Configure PDx pins speed to 100 MHz */
GPIOD->OSPEEDR = 0xFFFF0FCF;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00CC0CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA828A;
/* Configure PEx pins speed to 100 MHz */
GPIOE->OSPEEDR = 0xFFFFC3CF;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0xCCCCCCCC;
GPIOF->AFR[1] = 0xCCCCCCCC;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA800AAA;
/* Configure PFx pins speed to 50 MHz */
GPIOF->OSPEEDR = 0xAA800AAA;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0xCCCCCCCC;
GPIOG->AFR[1] = 0xCCCCCCCC;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0xAAAAAAAA;
/* Configure PGx pins speed to 50 MHz */
GPIOG->OSPEEDR = 0xAAAAAAAA;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/* Connect PHx pins to FMC Alternate function */
GPIOH->AFR[0] = 0x00C0CC00;
GPIOH->AFR[1] = 0xCCCCCCCC;
/* Configure PHx pins in Alternate function mode */
GPIOH->MODER = 0xAAAA08A0;
/* Configure PHx pins speed to 50 MHz */
GPIOH->OSPEEDR = 0xAAAA08A0;
/* Configure PHx pins Output type to push-pull */
GPIOH->OTYPER = 0x00000000;
/* No pull-up, pull-down for PHx pins */
GPIOH->PUPDR = 0x00000000;
/* Connect PIx pins to FMC Alternate function */
GPIOI->AFR[0] = 0xCCCCCCCC;
GPIOI->AFR[1] = 0x00000CC0;
/* Configure PIx pins in Alternate function mode */
GPIOI->MODER = 0x0028AAAA;
/* Configure PIx pins speed to 50 MHz */
GPIOI->OSPEEDR = 0x0028AAAA;
/* Configure PIx pins Output type to push-pull */
GPIOI->OTYPER = 0x00000000;
/* No pull-up, pull-down for PIx pins */
GPIOI->PUPDR = 0x00000000;
/*-- FMC Configuration -------------------------------------------------------*/
/* Enable the FMC interface clock */
RCC->AHB3ENR |= 0x00000001;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
FMC_Bank5_6->SDCR[0] = 0x000019E4;
FMC_Bank5_6->SDTR[0] = 0x01115351;
/* SDRAM initialization sequence */
/* Clock enable command */
FMC_Bank5_6->SDCMR = 0x00000011;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Delay */
for (index = 0; index<1000; index++);
/* PALL command */
FMC_Bank5_6->SDCMR = 0x00000012;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Auto refresh command */
FMC_Bank5_6->SDCMR = 0x00000073;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* MRD register program */
FMC_Bank5_6->SDCMR = 0x00046014;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Set refresh count */
tmpreg = FMC_Bank5_6->SDRTR;
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
/* Disable write protection */
tmpreg = FMC_Bank5_6->SDCR[0];
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#if defined(STM32F469xx) || defined(STM32F479xx)
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001091;
FMC_Bank1->BTCR[3] = 0x00110212;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F469xx || STM32F479xx */
(void)(tmp);
}
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f4xx.s before jump to main.
* This function configures the external memories (SRAM/SDRAM)
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmp = 0x00;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
#if defined (DATA_IN_ExtSDRAM)
register uint32_t tmpreg = 0, timeout = 0xFFFF;
register __IO uint32_t index;
#if defined(STM32F446xx)
/* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface
clock */
RCC->AHB1ENR |= 0x0000007D;
#else
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
clock */
RCC->AHB1ENR |= 0x000001F8;
#endif /* STM32F446xx */
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN);
#if defined(STM32F446xx)
/* Connect PAx pins to FMC Alternate function */
GPIOA->AFR[0] |= 0xC0000000;
GPIOA->AFR[1] |= 0x00000000;
/* Configure PDx pins in Alternate function mode */
GPIOA->MODER |= 0x00008000;
/* Configure PDx pins speed to 50 MHz */
GPIOA->OSPEEDR |= 0x00008000;
/* Configure PDx pins Output type to push-pull */
GPIOA->OTYPER |= 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOA->PUPDR |= 0x00000000;
/* Connect PCx pins to FMC Alternate function */
GPIOC->AFR[0] |= 0x00CC0000;
GPIOC->AFR[1] |= 0x00000000;
/* Configure PDx pins in Alternate function mode */
GPIOC->MODER |= 0x00000A00;
/* Configure PDx pins speed to 50 MHz */
GPIOC->OSPEEDR |= 0x00000A00;
/* Configure PDx pins Output type to push-pull */
GPIOC->OTYPER |= 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOC->PUPDR |= 0x00000000;
#endif /* STM32F446xx */
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x000000CC;
GPIOD->AFR[1] = 0xCC000CCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xA02A000A;
/* Configure PDx pins speed to 50 MHz */
GPIOD->OSPEEDR = 0xA02A000A;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00000CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA800A;
/* Configure PEx pins speed to 50 MHz */
GPIOE->OSPEEDR = 0xAAAA800A;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0xCCCCCCCC;
GPIOF->AFR[1] = 0xCCCCCCCC;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA800AAA;
/* Configure PFx pins speed to 50 MHz */
GPIOF->OSPEEDR = 0xAA800AAA;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0xCCCCCCCC;
GPIOG->AFR[1] = 0xCCCCCCCC;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0xAAAAAAAA;
/* Configure PGx pins speed to 50 MHz */
GPIOG->OSPEEDR = 0xAAAAAAAA;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx)
/* Connect PHx pins to FMC Alternate function */
GPIOH->AFR[0] = 0x00C0CC00;
GPIOH->AFR[1] = 0xCCCCCCCC;
/* Configure PHx pins in Alternate function mode */
GPIOH->MODER = 0xAAAA08A0;
/* Configure PHx pins speed to 50 MHz */
GPIOH->OSPEEDR = 0xAAAA08A0;
/* Configure PHx pins Output type to push-pull */
GPIOH->OTYPER = 0x00000000;
/* No pull-up, pull-down for PHx pins */
GPIOH->PUPDR = 0x00000000;
/* Connect PIx pins to FMC Alternate function */
GPIOI->AFR[0] = 0xCCCCCCCC;
GPIOI->AFR[1] = 0x00000CC0;
/* Configure PIx pins in Alternate function mode */
GPIOI->MODER = 0x0028AAAA;
/* Configure PIx pins speed to 50 MHz */
GPIOI->OSPEEDR = 0x0028AAAA;
/* Configure PIx pins Output type to push-pull */
GPIOI->OTYPER = 0x00000000;
/* No pull-up, pull-down for PIx pins */
GPIOI->PUPDR = 0x00000000;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
/*-- FMC Configuration -------------------------------------------------------*/
/* Enable the FMC interface clock */
RCC->AHB3ENR |= 0x00000001;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable SDRAM bank1 */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCR[0] = 0x00001954;
#else
FMC_Bank5_6->SDCR[0] = 0x000019E4;
#endif /* STM32F446xx */
FMC_Bank5_6->SDTR[0] = 0x01115351;
/* SDRAM initialization sequence */
/* Clock enable command */
FMC_Bank5_6->SDCMR = 0x00000011;
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Delay */
for (index = 0; index<1000; index++);
/* PALL command */
FMC_Bank5_6->SDCMR = 0x00000012;
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Auto refresh command */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCMR = 0x000000F3;
#else
FMC_Bank5_6->SDCMR = 0x00000073;
#endif /* STM32F446xx */
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* MRD register program */
#if defined(STM32F446xx)
FMC_Bank5_6->SDCMR = 0x00044014;
#else
FMC_Bank5_6->SDCMR = 0x00046014;
#endif /* STM32F446xx */
timeout = 0xFFFF;
while((tmpreg != 0) && (timeout-- > 0))
{
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
}
/* Set refresh count */
tmpreg = FMC_Bank5_6->SDRTR;
#if defined(STM32F446xx)
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1));
#else
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
#endif /* STM32F446xx */
/* Disable write protection */
tmpreg = FMC_Bank5_6->SDCR[0];
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
#endif /* DATA_IN_ExtSDRAM */
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
|| defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
|| defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
#if defined(DATA_IN_ExtSRAM)
/*-- GPIOs Configuration -----------------------------------------------------*/
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
RCC->AHB1ENR |= 0x00000078;
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);
/* Connect PDx pins to FMC Alternate function */
GPIOD->AFR[0] = 0x00CCC0CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A8A;
/* Configure PDx pins speed to 100 MHz */
GPIOD->OSPEEDR = 0xFFFF0FCF;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FMC Alternate function */
GPIOE->AFR[0] = 0xC00CC0CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA828A;
/* Configure PEx pins speed to 100 MHz */
GPIOE->OSPEEDR = 0xFFFFC3CF;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FMC Alternate function */
GPIOF->AFR[0] = 0x00CCCCCC;
GPIOF->AFR[1] = 0xCCCC0000;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA000AAA;
/* Configure PFx pins speed to 100 MHz */
GPIOF->OSPEEDR = 0xFF000FFF;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FMC Alternate function */
GPIOG->AFR[0] = 0x00CCCCCC;
GPIOG->AFR[1] = 0x000000C0;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0x00085AAA;
/* Configure PGx pins speed to 100 MHz */
GPIOG->OSPEEDR = 0x000CAFFF;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/*-- FMC/FSMC Configuration --------------------------------------------------*/
/* Enable the FMC/FSMC interface clock */
RCC->AHB3ENR |= 0x00000001;
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001011;
FMC_Bank1->BTCR[3] = 0x00000201;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
#if defined(STM32F469xx) || defined(STM32F479xx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);
/* Configure and enable Bank1_SRAM2 */
FMC_Bank1->BTCR[2] = 0x00001091;
FMC_Bank1->BTCR[3] = 0x00110212;
FMC_Bank1E->BWTR[2] = 0x0fffffff;
#endif /* STM32F469xx || STM32F479xx */
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)\
|| defined(STM32F412Zx) || defined(STM32F412Vx)
/* Delay after an RCC peripheral clock enabling */
tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN);
/* Configure and enable Bank1_SRAM2 */
FSMC_Bank1->BTCR[2] = 0x00001011;
FSMC_Bank1->BTCR[3] = 0x00000201;
FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F412Zx || STM32F412Vx */
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx */
(void)(tmp);
}
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rtc_ex.h
-1011
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RTC/FATFS/App/fatfs.c
-56
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/**
******************************************************************************
* @file fatfs.c
* @brief Code for fatfs applications
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
#include "fatfs.h"
uint8_t retUSER; /* Return value for USER */
char USERPath[4]; /* USER logical drive path */
FATFS USERFatFS; /* File system object for USER logical drive */
FIL USERFile; /* File object for USER */
/* USER CODE BEGIN Variables */
/* USER CODE END Variables */
void MX_FATFS_Init(void)
{
/*## FatFS: Link the USER driver ###########################*/
retUSER = FATFS_LinkDriver(&USER_Driver, USERPath);
/* USER CODE BEGIN Init */
/* additional user code for init */
/* USER CODE END Init */
}
/**
* @brief Gets Time from RTC
* @param None
* @retval Time in DWORD
*/
DWORD get_fattime(void)
{
/* USER CODE BEGIN get_fattime */
return 0;
/* USER CODE END get_fattime */
}
/* USER CODE BEGIN Application */
/* USER CODE END Application */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/FATFS/App/fatfs.h
-49
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/**
******************************************************************************
* @file fatfs.h
* @brief Header for fatfs applications
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __fatfs_H
#define __fatfs_H
#ifdef __cplusplus
extern "C" {
#endif
#include "ff.h"
#include "ff_gen_drv.h"
#include "user_diskio.h" /* defines USER_Driver as external */
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern uint8_t retUSER; /* Return value for USER */
extern char USERPath[4]; /* USER logical drive path */
extern FATFS USERFatFS; /* File system object for USER logical drive */
extern FIL USERFile; /* File object for USER */
void MX_FATFS_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /*__fatfs_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/FATFS/Target/ffconf.h
-268
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* FatFs - Generic FAT file system module R0.12c (C)ChaN, 2017
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
#ifndef _FFCONF
#define _FFCONF 68300 /* Revision ID */
/*-----------------------------------------------------------------------------/
/ Additional user header to be used
/-----------------------------------------------------------------------------*/
#include "main.h"
#include "stm32f4xx_hal.h"
/*-----------------------------------------------------------------------------/
/ Function Configurations
/-----------------------------------------------------------------------------*/
#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */
/* This option switches read-only configuration. (0:Read/Write or 1:Read-only)
/ Read-only configuration removes writing API functions, f_write(), f_sync(),
/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree()
/ and optional writing functions as well. */
#define _FS_MINIMIZE 0 /* 0 to 3 */
/* This option defines minimization level to remove some basic API functions.
/
/ 0: All basic functions are enabled.
/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename()
/ are removed.
/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1.
/ 3: f_lseek() function is removed in addition to 2. */
#define _USE_STRFUNC 2 /* 0:Disable or 1-2:Enable */
/* This option switches string functions, f_gets(), f_putc(), f_puts() and
/ f_printf().
/
/ 0: Disable string functions.
/ 1: Enable without LF-CRLF conversion.
/ 2: Enable with LF-CRLF conversion. */
#define _USE_FIND 0
/* This option switches filtered directory read functions, f_findfirst() and
/ f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */
#define _USE_MKFS 1
/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
#define _USE_FASTSEEK 1
/* This option switches fast seek feature. (0:Disable or 1:Enable) */
#define _USE_EXPAND 0
/* This option switches f_expand function. (0:Disable or 1:Enable) */
#define _USE_CHMOD 0
/* This option switches attribute manipulation functions, f_chmod() and f_utime().
/ (0:Disable or 1:Enable) Also _FS_READONLY needs to be 0 to enable this option. */
#define _USE_LABEL 0
/* This option switches volume label functions, f_getlabel() and f_setlabel().
/ (0:Disable or 1:Enable) */
#define _USE_FORWARD 0
/* This option switches f_forward() function. (0:Disable or 1:Enable) */
/*-----------------------------------------------------------------------------/
/ Locale and Namespace Configurations
/-----------------------------------------------------------------------------*/
#define _CODE_PAGE 850
/* This option specifies the OEM code page to be used on the target system.
/ Incorrect setting of the code page can cause a file open failure.
/
/ 1 - ASCII (No extended character. Non-LFN cfg. only)
/ 437 - U.S.
/ 720 - Arabic
/ 737 - Greek
/ 771 - KBL
/ 775 - Baltic
/ 850 - Latin 1
/ 852 - Latin 2
/ 855 - Cyrillic
/ 857 - Turkish
/ 860 - Portuguese
/ 861 - Icelandic
/ 862 - Hebrew
/ 863 - Canadian French
/ 864 - Arabic
/ 865 - Nordic
/ 866 - Russian
/ 869 - Greek 2
/ 932 - Japanese (DBCS)
/ 936 - Simplified Chinese (DBCS)
/ 949 - Korean (DBCS)
/ 950 - Traditional Chinese (DBCS)
*/
#define _USE_LFN 1 /* 0 to 3 */
#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */
/* The _USE_LFN switches the support of long file name (LFN).
/
/ 0: Disable support of LFN. _MAX_LFN has no effect.
/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe.
/ 2: Enable LFN with dynamic working buffer on the STACK.
/ 3: Enable LFN with dynamic working buffer on the HEAP.
/
/ To enable the LFN, Unicode handling functions (option/unicode.c) must be added
/ to the project. The working buffer occupies (_MAX_LFN + 1) * 2 bytes and
/ additional 608 bytes at exFAT enabled. _MAX_LFN can be in range from 12 to 255.
/ It should be set 255 to support full featured LFN operations.
/ When use stack for the working buffer, take care on stack overflow. When use heap
/ memory for the working buffer, memory management functions, ff_memalloc() and
/ ff_memfree(), must be added to the project. */
#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */
/* This option switches character encoding on the API. (0:ANSI/OEM or 1:UTF-16)
/ To use Unicode string for the path name, enable LFN and set _LFN_UNICODE = 1.
/ This option also affects behavior of string I/O functions. */
#define _STRF_ENCODE 3
/* When _LFN_UNICODE == 1, this option selects the character encoding ON THE FILE to
/ be read/written via string I/O functions, f_gets(), f_putc(), f_puts and f_printf().
/
/ 0: ANSI/OEM
/ 1: UTF-16LE
/ 2: UTF-16BE
/ 3: UTF-8
/
/ This option has no effect when _LFN_UNICODE == 0. */
#define _FS_RPATH 0 /* 0 to 2 */
/* This option configures support of relative path.
/
/ 0: Disable relative path and remove related functions.
/ 1: Enable relative path. f_chdir() and f_chdrive() are available.
/ 2: f_getcwd() function is available in addition to 1.
*/
/*---------------------------------------------------------------------------/
/ Drive/Volume Configurations
/----------------------------------------------------------------------------*/
#define _VOLUMES 1
/* Number of volumes (logical drives) to be used. */
/* USER CODE BEGIN Volumes */
#define _STR_VOLUME_ID 0 /* 0:Use only 0-9 for drive ID, 1:Use strings for drive ID */
#define _VOLUME_STRS "RAM","NAND","CF","SD1","SD2","USB1","USB2","USB3"
/* _STR_VOLUME_ID switches string support of volume ID.
/ When _STR_VOLUME_ID is set to 1, also pre-defined strings can be used as drive
/ number in the path name. _VOLUME_STRS defines the drive ID strings for each
/ logical drives. Number of items must be equal to _VOLUMES. Valid characters for
/ the drive ID strings are: A-Z and 0-9. */
/* USER CODE END Volumes */
#define _MULTI_PARTITION 0 /* 0:Single partition, 1:Multiple partition */
/* This option switches support of multi-partition on a physical drive.
/ By default (0), each logical drive number is bound to the same physical drive
/ number and only an FAT volume found on the physical drive will be mounted.
/ When multi-partition is enabled (1), each logical drive number can be bound to
/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk()
/ funciton will be available. */
#define _MIN_SS 512 /* 512, 1024, 2048 or 4096 */
#define _MAX_SS 4096 /* 512, 1024, 2048 or 4096 */
/* These options configure the range of sector size to be supported. (512, 1024,
/ 2048 or 4096) Always set both 512 for most systems, all type of memory cards and
/ harddisk. But a larger value may be required for on-board flash memory and some
/ type of optical media. When _MAX_SS is larger than _MIN_SS, FatFs is configured
/ to variable sector size and GET_SECTOR_SIZE command must be implemented to the
/ disk_ioctl() function. */
#define _USE_TRIM 0
/* This option switches support of ATA-TRIM. (0:Disable or 1:Enable)
/ To enable Trim function, also CTRL_TRIM command should be implemented to the
/ disk_ioctl() function. */
#define _FS_NOFSINFO 0 /* 0,1,2 or 3 */
/* If you need to know correct free space on the FAT32 volume, set bit 0 of this
/ option, and f_getfree() function at first time after volume mount will force
/ a full FAT scan. Bit 1 controls the use of last allocated cluster number.
/
/ bit0=0: Use free cluster count in the FSINFO if available.
/ bit0=1: Do not trust free cluster count in the FSINFO.
/ bit1=0: Use last allocated cluster number in the FSINFO if available.
/ bit1=1: Do not trust last allocated cluster number in the FSINFO.
*/
/*---------------------------------------------------------------------------/
/ System Configurations
/----------------------------------------------------------------------------*/
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny)
/ At the tiny configuration, size of file object (FIL) is reduced _MAX_SS bytes.
/ Instead of private sector buffer eliminated from the file object, common sector
/ buffer in the file system object (FATFS) is used for the file data transfer. */
#define _FS_EXFAT 0
/* This option switches support of exFAT file system. (0:Disable or 1:Enable)
/ When enable exFAT, also LFN needs to be enabled. (_USE_LFN >= 1)
/ Note that enabling exFAT discards C89 compatibility. */
#define _FS_NORTC 0
#define _NORTC_MON 6
#define _NORTC_MDAY 4
#define _NORTC_YEAR 2015
/* The option _FS_NORTC switches timestamp functiton. If the system does not have
/ any RTC function or valid timestamp is not needed, set _FS_NORTC = 1 to disable
/ the timestamp function. All objects modified by FatFs will have a fixed timestamp
/ defined by _NORTC_MON, _NORTC_MDAY and _NORTC_YEAR in local time.
/ To enable timestamp function (_FS_NORTC = 0), get_fattime() function need to be
/ added to the project to get current time form real-time clock. _NORTC_MON,
/ _NORTC_MDAY and _NORTC_YEAR have no effect.
/ These options have no effect at read-only configuration (_FS_READONLY = 1). */
#define _FS_LOCK 2 /* 0:Disable or >=1:Enable */
/* The option _FS_LOCK switches file lock function to control duplicated file open
/ and illegal operation to open objects. This option must be 0 when _FS_READONLY
/ is 1.
/
/ 0: Disable file lock function. To avoid volume corruption, application program
/ should avoid illegal open, remove and rename to the open objects.
/ >0: Enable file lock function. The value defines how many files/sub-directories
/ can be opened simultaneously under file lock control. Note that the file
/ lock control is independent of re-entrancy. */
#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */
#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */
#define _SYNC_t NULL
/* The option _FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs
/ module itself. Note that regardless of this option, file access to different
/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs()
/ and f_fdisk() function, are always not re-entrant. Only file/directory access
/ to the same volume is under control of this function.
/
/ 0: Disable re-entrancy. _FS_TIMEOUT and _SYNC_t have no effect.
/ 1: Enable re-entrancy. Also user provided synchronization handlers,
/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj()
/ function, must be added to the project. Samples are available in
/ option/syscall.c.
/
/ The _FS_TIMEOUT defines timeout period in unit of time tick.
/ The _SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*,
/ SemaphoreHandle_t and etc.. A header file for O/S definitions needs to be
/ included somewhere in the scope of ff.h. */
/* define the ff_malloc ff_free macros as standard malloc free */
#if !defined(ff_malloc) && !defined(ff_free)
#include <stdlib.h>
#define ff_malloc malloc
#define ff_free free
#endif
#endif /* _FFCONF */
RTC/FATFS/Target/user_diskio.c
-174
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file user_diskio.c
* @brief This file includes a diskio driver skeleton to be completed by the user.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
#ifdef USE_OBSOLETE_USER_CODE_SECTION_0
/*
* Warning: the user section 0 is no more in use (starting from CubeMx version 4.16.0)
* To be suppressed in the future.
* Kept to ensure backward compatibility with previous CubeMx versions when
* migrating projects.
* User code previously added there should be copied in the new user sections before
* the section contents can be deleted.
*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
#endif
/* USER CODE BEGIN DECL */
/* Includes ------------------------------------------------------------------*/
#include <string.h>
#include "ff_gen_drv.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Disk status */
static volatile DSTATUS Stat = STA_NOINIT;
/* USER CODE END DECL */
/* Private function prototypes -----------------------------------------------*/
DSTATUS USER_initialize (BYTE pdrv);
DSTATUS USER_status (BYTE pdrv);
DRESULT USER_read (BYTE pdrv, BYTE *buff, DWORD sector, UINT count);
#if _USE_WRITE == 1
DRESULT USER_write (BYTE pdrv, const BYTE *buff, DWORD sector, UINT count);
#endif /* _USE_WRITE == 1 */
#if _USE_IOCTL == 1
DRESULT USER_ioctl (BYTE pdrv, BYTE cmd, void *buff);
#endif /* _USE_IOCTL == 1 */
Diskio_drvTypeDef USER_Driver =
{
USER_initialize,
USER_status,
USER_read,
#if _USE_WRITE
USER_write,
#endif /* _USE_WRITE == 1 */
#if _USE_IOCTL == 1
USER_ioctl,
#endif /* _USE_IOCTL == 1 */
};
/* Private functions ---------------------------------------------------------*/
/**
* @brief Initializes a Drive
* @param pdrv: Physical drive number (0..)
* @retval DSTATUS: Operation status
*/
DSTATUS USER_initialize (
BYTE pdrv /* Physical drive nmuber to identify the drive */
)
{
/* USER CODE BEGIN INIT */
SD_disk_initialize (pdrv);
//Stat = STA_NOINIT;
//return Stat;
/* USER CODE END INIT */
}
/**
* @brief Gets Disk Status
* @param pdrv: Physical drive number (0..)
* @retval DSTATUS: Operation status
*/
DSTATUS USER_status (
BYTE pdrv /* Physical drive number to identify the drive */
)
{
/* USER CODE BEGIN STATUS */
SD_disk_status (pdrv);
//Stat = STA_NOINIT;
//return Stat;
/* USER CODE END STATUS */
}
/**
* @brief Reads Sector(s)
* @param pdrv: Physical drive number (0..)
* @param *buff: Data buffer to store read data
* @param sector: Sector address (LBA)
* @param count: Number of sectors to read (1..128)
* @retval DRESULT: Operation result
*/
DRESULT USER_read (
BYTE pdrv, /* Physical drive nmuber to identify the drive */
BYTE *buff, /* Data buffer to store read data */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to read */
)
{
/* USER CODE BEGIN READ */
SD_disk_read (pdrv,buff,sector,count);
//return RES_OK;
/* USER CODE END READ */
}
/**
* @brief Writes Sector(s)
* @param pdrv: Physical drive number (0..)
* @param *buff: Data to be written
* @param sector: Sector address (LBA)
* @param count: Number of sectors to write (1..128)
* @retval DRESULT: Operation result
*/
#if _USE_WRITE == 1
DRESULT USER_write (
BYTE pdrv, /* Physical drive nmuber to identify the drive */
const BYTE *buff, /* Data to be written */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to write */
)
{
/* USER CODE BEGIN WRITE */
/* USER CODE HERE */
SD_disk_write (pdrv, buff, sector, count);
//return RES_OK;
/* USER CODE END WRITE */
}
#endif /* _USE_WRITE == 1 */
/**
* @brief I/O control operation
* @param pdrv: Physical drive number (0..)
* @param cmd: Control code
* @param *buff: Buffer to send/receive control data
* @retval DRESULT: Operation result
*/
#if _USE_IOCTL == 1
DRESULT USER_ioctl (
BYTE pdrv, /* Physical drive nmuber (0..) */
BYTE cmd, /* Control code */
void *buff /* Buffer to send/receive control data */
)
{
/* USER CODE BEGIN IOCTL */
SD_disk_ioctl (pdrv, cmd, buff);
//DRESULT res = RES_ERROR;
//return res;
/* USER CODE END IOCTL */
}
#endif /* _USE_IOCTL == 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/FATFS/Target/user_diskio.h
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file user_diskio.h
* @brief This file contains the common defines and functions prototypes for
* the user_diskio driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under Ultimate Liberty license
* SLA0044, the "License"; You may not use this file except in compliance with
* the License. You may obtain a copy of the License at:
* www.st.com/SLA0044
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USER_DISKIO_H
#define __USER_DISKIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* USER CODE BEGIN 0 */
/* Includes ------------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
extern Diskio_drvTypeDef USER_Driver;
/* USER CODE END 0 */
#ifdef __cplusplus
}
#endif
#endif /* __USER_DISKIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Middlewares/Third_Party/FatFs/src/diskio.c
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/*-----------------------------------------------------------------------*/
/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2017 */
/* */
/* Portions COPYRIGHT 2017 STMicroelectronics */
/* Portions Copyright (C) 2017, ChaN, all right reserved */
/*-----------------------------------------------------------------------*/
/* If a working storage control module is available, it should be */
/* attached to the FatFs via a glue function rather than modifying it. */
/* This is an example of glue functions to attach various existing */
/* storage control modules to the FatFs module with a defined API. */
/*-----------------------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
#include "diskio.h"
#include "ff_gen_drv.h"
#if defined ( __GNUC__ )
#ifndef __weak
#define __weak __attribute__((weak))
#endif
#endif
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
extern Disk_drvTypeDef disk;
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @brief Gets Disk Status
* @param pdrv: Physical drive number (0..)
* @retval DSTATUS: Operation status
*/
DSTATUS disk_status (
BYTE pdrv /* Physical drive number to identify the drive */
)
{
DSTATUS stat;
stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]);
return stat;
}
/**
* @brief Initializes a Drive
* @param pdrv: Physical drive number (0..)
* @retval DSTATUS: Operation status
*/
DSTATUS disk_initialize (
BYTE pdrv /* Physical drive nmuber to identify the drive */
)
{
DSTATUS stat = RES_OK;
if(disk.is_initialized[pdrv] == 0)
{
disk.is_initialized[pdrv] = 1;
stat = disk.drv[pdrv]->disk_initialize(disk.lun[pdrv]);
}
return stat;
}
/**
* @brief Reads Sector(s)
* @param pdrv: Physical drive number (0..)
* @param *buff: Data buffer to store read data
* @param sector: Sector address (LBA)
* @param count: Number of sectors to read (1..128)
* @retval DRESULT: Operation result
*/
DRESULT disk_read (
BYTE pdrv, /* Physical drive nmuber to identify the drive */
BYTE *buff, /* Data buffer to store read data */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to read */
)
{
DRESULT res;
res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
return res;
}
/**
* @brief Writes Sector(s)
* @param pdrv: Physical drive number (0..)
* @param *buff: Data to be written
* @param sector: Sector address (LBA)
* @param count: Number of sectors to write (1..128)
* @retval DRESULT: Operation result
*/
#if _USE_WRITE == 1
DRESULT disk_write (
BYTE pdrv, /* Physical drive nmuber to identify the drive */
const BYTE *buff, /* Data to be written */
DWORD sector, /* Sector address in LBA */
UINT count /* Number of sectors to write */
)
{
DRESULT res;
res = disk.drv[pdrv]->disk_write(disk.lun[pdrv], buff, sector, count);
return res;
}
#endif /* _USE_WRITE == 1 */
/**
* @brief I/O control operation
* @param pdrv: Physical drive number (0..)
* @param cmd: Control code
* @param *buff: Buffer to send/receive control data
* @retval DRESULT: Operation result
*/
#if _USE_IOCTL == 1
DRESULT disk_ioctl (
BYTE pdrv, /* Physical drive nmuber (0..) */
BYTE cmd, /* Control code */
void *buff /* Buffer to send/receive control data */
)
{
DRESULT res;
res = disk.drv[pdrv]->disk_ioctl(disk.lun[pdrv], cmd, buff);
return res;
}
#endif /* _USE_IOCTL == 1 */
/**
* @brief Gets Time from RTC
* @param None
* @retval Time in DWORD
*/
__weak DWORD get_fattime (void)
{
return 0;
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Middlewares/Third_Party/FatFs/src/diskio.h
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/*-----------------------------------------------------------------------/
/ Low level disk interface modlue include file (C)ChaN, 2014 /
/-----------------------------------------------------------------------*/
#ifndef _DISKIO_DEFINED
#define _DISKIO_DEFINED
#ifdef __cplusplus
extern "C" {
#endif
#define _USE_WRITE 1 /* 1: Enable disk_write function */
#define _USE_IOCTL 1 /* 1: Enable disk_ioctl function */
#include "integer.h"
/* Status of Disk Functions */
typedef BYTE DSTATUS;
/* Results of Disk Functions */
typedef enum {
RES_OK = 0, /* 0: Successful */
RES_ERROR, /* 1: R/W Error */
RES_WRPRT, /* 2: Write Protected */
RES_NOTRDY, /* 3: Not Ready */
RES_PARERR /* 4: Invalid Parameter */
} DRESULT;
/*---------------------------------------*/
/* Prototypes for disk control functions */
DSTATUS disk_initialize (BYTE pdrv);
DSTATUS disk_status (BYTE pdrv);
DRESULT disk_read (BYTE pdrv, BYTE* buff, DWORD sector, UINT count);
DRESULT disk_write (BYTE pdrv, const BYTE* buff, DWORD sector, UINT count);
DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff);
DWORD get_fattime (void);
/* Disk Status Bits (DSTATUS) */
#define STA_NOINIT 0x01 /* Drive not initialized */
#define STA_NODISK 0x02 /* No medium in the drive */
#define STA_PROTECT 0x04 /* Write protected */
/* Command code for disk_ioctrl fucntion */
/* Generic command (Used by FatFs) */
#define CTRL_SYNC 0 /* Complete pending write process (needed at _FS_READONLY == 0) */
#define GET_SECTOR_COUNT 1 /* Get media size (needed at _USE_MKFS == 1) */
#define GET_SECTOR_SIZE 2 /* Get sector size (needed at _MAX_SS != _MIN_SS) */
#define GET_BLOCK_SIZE 3 /* Get erase block size (needed at _USE_MKFS == 1) */
#define CTRL_TRIM 4 /* Inform device that the data on the block of sectors is no longer used (needed at _USE_TRIM == 1) */
/* Generic command (Not used by FatFs) */
#define CTRL_POWER 5 /* Get/Set power status */
#define CTRL_LOCK 6 /* Lock/Unlock media removal */
#define CTRL_EJECT 7 /* Eject media */
#define CTRL_FORMAT 8 /* Create physical format on the media */
/* MMC/SDC specific ioctl command */
#define MMC_GET_TYPE 10 /* Get card type */
#define MMC_GET_CSD 11 /* Get CSD */
#define MMC_GET_CID 12 /* Get CID */
#define MMC_GET_OCR 13 /* Get OCR */
#define MMC_GET_SDSTAT 14 /* Get SD status */
/* ATA/CF specific ioctl command */
#define ATA_GET_REV 20 /* Get F/W revision */
#define ATA_GET_MODEL 21 /* Get model name */
#define ATA_GET_SN 22 /* Get serial number */
#ifdef __cplusplus
}
#endif
#endif
RTC/Middlewares/Third_Party/FatFs/src/ff.c
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RTC/Middlewares/Third_Party/FatFs/src/ff.h
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/*----------------------------------------------------------------------------/
/ FatFs - Generic FAT file system module R0.12c /
/-----------------------------------------------------------------------------/
/
/ Copyright (C) 2017, ChaN, all right reserved.
/
/ FatFs module is an open source software. Redistribution and use of FatFs in
/ source and binary forms, with or without modification, are permitted provided
/ that the following condition is met:
/ 1. Redistributions of source code must retain the above copyright notice,
/ this condition and the following disclaimer.
/
/ This software is provided by the copyright holder and contributors "AS IS"
/ and any warranties related to this software are DISCLAIMED.
/ The copyright owner or contributors be NOT LIABLE for any damages caused
/ by use of this software.
/----------------------------------------------------------------------------*/
#ifndef _FATFS
#define _FATFS 68300 /* Revision ID */
#ifdef __cplusplus
extern "C" {
#endif
#include "integer.h" /* Basic integer types */
#include "ffconf.h" /* FatFs configuration options */
#if _FATFS != _FFCONF
#error Wrong configuration file (ffconf.h).
#endif
/* Definitions of volume management */
#if _MULTI_PARTITION /* Multiple partition configuration */
typedef struct {
BYTE pd; /* Physical drive number */
BYTE pt; /* Partition: 0:Auto detect, 1-4:Forced partition) */
} PARTITION;
extern PARTITION VolToPart[]; /* Volume - Partition resolution table */
#endif
/* Type of path name strings on FatFs API */
#if _LFN_UNICODE /* Unicode (UTF-16) string */
#if _USE_LFN == 0
#error _LFN_UNICODE must be 0 at non-LFN cfg.
#endif
#ifndef _INC_TCHAR
typedef WCHAR TCHAR;
#define _T(x) L ## x
#define _TEXT(x) L ## x
#endif
#else /* ANSI/OEM string */
#ifndef _INC_TCHAR
typedef char TCHAR;
#define _T(x) x
#define _TEXT(x) x
#endif
#endif
/* Type of file size variables */
#if _FS_EXFAT
#if _USE_LFN == 0
#error LFN must be enabled when enable exFAT
#endif
typedef QWORD FSIZE_t;
#else
typedef DWORD FSIZE_t;
#endif
/* File system object structure (FATFS) */
typedef struct {
BYTE fs_type; /* File system type (0:N/A) */
BYTE drv; /* Physical drive number */
BYTE n_fats; /* Number of FATs (1 or 2) */
BYTE wflag; /* win[] flag (b0:dirty) */
BYTE fsi_flag; /* FSINFO flags (b7:disabled, b0:dirty) */
WORD id; /* File system mount ID */
WORD n_rootdir; /* Number of root directory entries (FAT12/16) */
WORD csize; /* Cluster size [sectors] */
#if _MAX_SS != _MIN_SS
WORD ssize; /* Sector size (512, 1024, 2048 or 4096) */
#endif
#if _USE_LFN != 0
WCHAR* lfnbuf; /* LFN working buffer */
#endif
#if _FS_EXFAT
BYTE* dirbuf; /* Directory entry block scratchpad buffer */
#endif
#if _FS_REENTRANT
_SYNC_t sobj; /* Identifier of sync object */
#endif
#if !_FS_READONLY
DWORD last_clst; /* Last allocated cluster */
DWORD free_clst; /* Number of free clusters */
#endif
#if _FS_RPATH != 0
DWORD cdir; /* Current directory start cluster (0:root) */
#if _FS_EXFAT
DWORD cdc_scl; /* Containing directory start cluster (invalid when cdir is 0) */
DWORD cdc_size; /* b31-b8:Size of containing directory, b7-b0: Chain status */
DWORD cdc_ofs; /* Offset in the containing directory (invalid when cdir is 0) */
#endif
#endif
DWORD n_fatent; /* Number of FAT entries (number of clusters + 2) */
DWORD fsize; /* Size of an FAT [sectors] */
DWORD volbase; /* Volume base sector */
DWORD fatbase; /* FAT base sector */
DWORD dirbase; /* Root directory base sector/cluster */
DWORD database; /* Data base sector */
DWORD winsect; /* Current sector appearing in the win[] */
BYTE win[_MAX_SS]; /* Disk access window for Directory, FAT (and file data at tiny cfg) */
} FATFS;
/* Object ID and allocation information (_FDID) */
typedef struct {
FATFS* fs; /* Pointer to the owner file system object */
WORD id; /* Owner file system mount ID */
BYTE attr; /* Object attribute */
BYTE stat; /* Object chain status (b1-0: =0:not contiguous, =2:contiguous (no data on FAT), =3:flagmented in this session, b2:sub-directory stretched) */
DWORD sclust; /* Object start cluster (0:no cluster or root directory) */
FSIZE_t objsize; /* Object size (valid when sclust != 0) */
#if _FS_EXFAT
DWORD n_cont; /* Size of first fragment, clusters - 1 (valid when stat == 3) */
DWORD n_frag; /* Size of last fragment needs to be written (valid when not zero) */
DWORD c_scl; /* Containing directory start cluster (valid when sclust != 0) */
DWORD c_size; /* b31-b8:Size of containing directory, b7-b0: Chain status (valid when c_scl != 0) */
DWORD c_ofs; /* Offset in the containing directory (valid when sclust != 0 and non-directory object) */
#endif
#if _FS_LOCK != 0
UINT lockid; /* File lock ID origin from 1 (index of file semaphore table Files[]) */
#endif
} _FDID;
/* File object structure (FIL) */
typedef struct {
_FDID obj; /* Object identifier (must be the 1st member to detect invalid object pointer) */
BYTE flag; /* File status flags */
BYTE err; /* Abort flag (error code) */
FSIZE_t fptr; /* File read/write pointer (Zeroed on file open) */
DWORD clust; /* Current cluster of fpter (invalid when fptr is 0) */
DWORD sect; /* Sector number appearing in buf[] (0:invalid) */
#if !_FS_READONLY
DWORD dir_sect; /* Sector number containing the directory entry */
BYTE* dir_ptr; /* Pointer to the directory entry in the win[] */
#endif
#if _USE_FASTSEEK
DWORD* cltbl; /* Pointer to the cluster link map table (nulled on open, set by application) */
#endif
#if !_FS_TINY
BYTE buf[_MAX_SS]; /* File private data read/write window */
#endif
} FIL;
/* Directory object structure (DIR) */
typedef struct {
_FDID obj; /* Object identifier */
DWORD dptr; /* Current read/write offset */
DWORD clust; /* Current cluster */
DWORD sect; /* Current sector (0:Read operation has terminated) */
BYTE* dir; /* Pointer to the directory item in the win[] */
BYTE fn[12]; /* SFN (in/out) {body[8],ext[3],status[1]} */
#if _USE_LFN != 0
DWORD blk_ofs; /* Offset of current entry block being processed (0xFFFFFFFF:Invalid) */
#endif
#if _USE_FIND
const TCHAR* pat; /* Pointer to the name matching pattern */
#endif
} DIR;
/* File information structure (FILINFO) */
typedef struct {
FSIZE_t fsize; /* File size */
WORD fdate; /* Modified date */
WORD ftime; /* Modified time */
BYTE fattrib; /* File attribute */
#if _USE_LFN != 0
TCHAR altname[13]; /* Alternative file name */
TCHAR fname[_MAX_LFN + 1]; /* Primary file name */
#else
TCHAR fname[13]; /* File name */
#endif
} FILINFO;
/* File function return code (FRESULT) */
typedef enum {
FR_OK = 0, /* (0) Succeeded */
FR_DISK_ERR, /* (1) A hard error occurred in the low level disk I/O layer */
FR_INT_ERR, /* (2) Assertion failed */
FR_NOT_READY, /* (3) The physical drive cannot work */
FR_NO_FILE, /* (4) Could not find the file */
FR_NO_PATH, /* (5) Could not find the path */
FR_INVALID_NAME, /* (6) The path name format is invalid */
FR_DENIED, /* (7) Access denied due to prohibited access or directory full */
FR_EXIST, /* (8) Access denied due to prohibited access */
FR_INVALID_OBJECT, /* (9) The file/directory object is invalid */
FR_WRITE_PROTECTED, /* (10) The physical drive is write protected */
FR_INVALID_DRIVE, /* (11) The logical drive number is invalid */
FR_NOT_ENABLED, /* (12) The volume has no work area */
FR_NO_FILESYSTEM, /* (13) There is no valid FAT volume */
FR_MKFS_ABORTED, /* (14) The f_mkfs() aborted due to any problem */
FR_TIMEOUT, /* (15) Could not get a grant to access the volume within defined period */
FR_LOCKED, /* (16) The operation is rejected according to the file sharing policy */
FR_NOT_ENOUGH_CORE, /* (17) LFN working buffer could not be allocated */
FR_TOO_MANY_OPEN_FILES, /* (18) Number of open files > _FS_LOCK */
FR_INVALID_PARAMETER /* (19) Given parameter is invalid */
} FRESULT;
/*--------------------------------------------------------------*/
/* FatFs module application interface */
FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode); /* Open or create a file */
FRESULT f_close (FIL* fp); /* Close an open file object */
FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br); /* Read data from the file */
FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw); /* Write data to the file */
FRESULT f_lseek (FIL* fp, FSIZE_t ofs); /* Move file pointer of the file object */
FRESULT f_truncate (FIL* fp); /* Truncate the file */
FRESULT f_sync (FIL* fp); /* Flush cached data of the writing file */
FRESULT f_opendir (DIR* dp, const TCHAR* path); /* Open a directory */
FRESULT f_closedir (DIR* dp); /* Close an open directory */
FRESULT f_readdir (DIR* dp, FILINFO* fno); /* Read a directory item */
FRESULT f_findfirst (DIR* dp, FILINFO* fno, const TCHAR* path, const TCHAR* pattern); /* Find first file */
FRESULT f_findnext (DIR* dp, FILINFO* fno); /* Find next file */
FRESULT f_mkdir (const TCHAR* path); /* Create a sub directory */
FRESULT f_unlink (const TCHAR* path); /* Delete an existing file or directory */
FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new); /* Rename/Move a file or directory */
FRESULT f_stat (const TCHAR* path, FILINFO* fno); /* Get file status */
FRESULT f_chmod (const TCHAR* path, BYTE attr, BYTE mask); /* Change attribute of a file/dir */
FRESULT f_utime (const TCHAR* path, const FILINFO* fno); /* Change timestamp of a file/dir */
FRESULT f_chdir (const TCHAR* path); /* Change current directory */
FRESULT f_chdrive (const TCHAR* path); /* Change current drive */
FRESULT f_getcwd (TCHAR* buff, UINT len); /* Get current directory */
FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs); /* Get number of free clusters on the drive */
FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn); /* Get volume label */
FRESULT f_setlabel (const TCHAR* label); /* Set volume label */
FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf); /* Forward data to the stream */
FRESULT f_expand (FIL* fp, FSIZE_t szf, BYTE opt); /* Allocate a contiguous block to the file */
FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt); /* Mount/Unmount a logical drive */
FRESULT f_mkfs (const TCHAR* path, BYTE opt, DWORD au, void* work, UINT len); /* Create a FAT volume */
FRESULT f_fdisk (BYTE pdrv, const DWORD* szt, void* work); /* Divide a physical drive into some partitions */
int f_putc (TCHAR c, FIL* fp); /* Put a character to the file */
int f_puts (const TCHAR* str, FIL* cp); /* Put a string to the file */
int f_printf (FIL* fp, const TCHAR* str, ...); /* Put a formatted string to the file */
TCHAR* f_gets (TCHAR* buff, int len, FIL* fp); /* Get a string from the file */
#define f_eof(fp) ((int)((fp)->fptr == (fp)->obj.objsize))
#define f_error(fp) ((fp)->err)
#define f_tell(fp) ((fp)->fptr)
#define f_size(fp) ((fp)->obj.objsize)
#define f_rewind(fp) f_lseek((fp), 0)
#define f_rewinddir(dp) f_readdir((dp), 0)
#define f_rmdir(path) f_unlink(path)
#ifndef EOF
#define EOF (-1)
#endif
/*--------------------------------------------------------------*/
/* Additional user defined functions */
/* RTC function */
#if !_FS_READONLY && !_FS_NORTC
DWORD get_fattime (void);
#endif
/* Unicode support functions */
#if _USE_LFN != 0 /* Unicode - OEM code conversion */
WCHAR ff_convert (WCHAR chr, UINT dir); /* OEM-Unicode bidirectional conversion */
WCHAR ff_wtoupper (WCHAR chr); /* Unicode upper-case conversion */
#if _USE_LFN == 3 /* Memory functions */
void* ff_memalloc (UINT msize); /* Allocate memory block */
void ff_memfree (void* mblock); /* Free memory block */
#endif
#endif
/* Sync functions */
#if _FS_REENTRANT
int ff_cre_syncobj (BYTE vol, _SYNC_t* sobj); /* Create a sync object */
int ff_req_grant (_SYNC_t sobj); /* Lock sync object */
void ff_rel_grant (_SYNC_t sobj); /* Unlock sync object */
int ff_del_syncobj (_SYNC_t sobj); /* Delete a sync object */
#endif
/*--------------------------------------------------------------*/
/* Flags and offset address */
/* File access mode and open method flags (3rd argument of f_open) */
#define FA_READ 0x01
#define FA_WRITE 0x02
#define FA_OPEN_EXISTING 0x00
#define FA_CREATE_NEW 0x04
#define FA_CREATE_ALWAYS 0x08
#define FA_OPEN_ALWAYS 0x10
#define FA_OPEN_APPEND 0x30
/* Fast seek controls (2nd argument of f_lseek) */
#define CREATE_LINKMAP ((FSIZE_t)0 - 1)
/* Format options (2nd argument of f_mkfs) */
#define FM_FAT 0x01
#define FM_FAT32 0x02
#define FM_EXFAT 0x04
#define FM_ANY 0x07
#define FM_SFD 0x08
/* Filesystem type (FATFS.fs_type) */
#define FS_FAT12 1
#define FS_FAT16 2
#define FS_FAT32 3
#define FS_EXFAT 4
/* File attribute bits for directory entry (FILINFO.fattrib) */
#define AM_RDO 0x01 /* Read only */
#define AM_HID 0x02 /* Hidden */
#define AM_SYS 0x04 /* System */
#define AM_DIR 0x10 /* Directory */
#define AM_ARC 0x20 /* Archive */
#ifdef __cplusplus
}
#endif
#endif /* _FATFS */
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/**
******************************************************************************
* @file ff_gen_drv.c
* @author MCD Application Team
* @brief FatFs generic low level driver.
*****************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics. All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
**/
/* Includes ------------------------------------------------------------------*/
#include "ff_gen_drv.h"
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
Disk_drvTypeDef disk = {{0},{0},{0},0};
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/**
* @brief Links a compatible diskio driver/lun id and increments the number of active
* linked drivers.
* @note The number of linked drivers (volumes) is up to 10 due to FatFs limits.
* @param drv: pointer to the disk IO Driver structure
* @param path: pointer to the logical drive path
* @param lun : only used for USB Key Disk to add multi-lun management
else the parameter must be equal to 0
* @retval Returns 0 in case of success, otherwise 1.
*/
uint8_t FATFS_LinkDriverEx(const Diskio_drvTypeDef *drv, char *path, uint8_t lun)
{
uint8_t ret = 1;
uint8_t DiskNum = 0;
if(disk.nbr < _VOLUMES)
{
disk.is_initialized[disk.nbr] = 0;
disk.drv[disk.nbr] = drv;
disk.lun[disk.nbr] = lun;
DiskNum = disk.nbr++;
path[0] = DiskNum + '0';
path[1] = ':';
path[2] = '/';
path[3] = 0;
ret = 0;
}
return ret;
}
/**
* @brief Links a compatible diskio driver and increments the number of active
* linked drivers.
* @note The number of linked drivers (volumes) is up to 10 due to FatFs limits
* @param drv: pointer to the disk IO Driver structure
* @param path: pointer to the logical drive path
* @retval Returns 0 in case of success, otherwise 1.
*/
uint8_t FATFS_LinkDriver(const Diskio_drvTypeDef *drv, char *path)
{
return FATFS_LinkDriverEx(drv, path, 0);
}
/**
* @brief Unlinks a diskio driver and decrements the number of active linked
* drivers.
* @param path: pointer to the logical drive path
* @param lun : not used
* @retval Returns 0 in case of success, otherwise 1.
*/
uint8_t FATFS_UnLinkDriverEx(char *path, uint8_t lun)
{
uint8_t DiskNum = 0;
uint8_t ret = 1;
if(disk.nbr >= 1)
{
DiskNum = path[0] - '0';
if(disk.drv[DiskNum] != 0)
{
disk.drv[DiskNum] = 0;
disk.lun[DiskNum] = 0;
disk.nbr--;
ret = 0;
}
}
return ret;
}
/**
* @brief Unlinks a diskio driver and decrements the number of active linked
* drivers.
* @param path: pointer to the logical drive path
* @retval Returns 0 in case of success, otherwise 1.
*/
uint8_t FATFS_UnLinkDriver(char *path)
{
return FATFS_UnLinkDriverEx(path, 0);
}
/**
* @brief Gets number of linked drivers to the FatFs module.
* @param None
* @retval Number of attached drivers.
*/
uint8_t FATFS_GetAttachedDriversNbr(void)
{
return disk.nbr;
}
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Middlewares/Third_Party/FatFs/src/ff_gen_drv.h
Vendored
-80
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@@ -1,80 +0,0 @@
/**
******************************************************************************
* @file ff_gen_drv.h
* @author MCD Application Team
* @brief Header for ff_gen_drv.c module.
*****************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics. All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
**/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __FF_GEN_DRV_H
#define __FF_GEN_DRV_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "diskio.h"
#include "ff.h"
#include "stdint.h"
/* Exported types ------------------------------------------------------------*/
/**
* @brief Disk IO Driver structure definition
*/
typedef struct
{
DSTATUS (*disk_initialize) (BYTE); /*!< Initialize Disk Drive */
DSTATUS (*disk_status) (BYTE); /*!< Get Disk Status */
DRESULT (*disk_read) (BYTE, BYTE*, DWORD, UINT); /*!< Read Sector(s) */
#if _USE_WRITE == 1
DRESULT (*disk_write) (BYTE, const BYTE*, DWORD, UINT); /*!< Write Sector(s) when _USE_WRITE = 0 */
#endif /* _USE_WRITE == 1 */
#if _USE_IOCTL == 1
DRESULT (*disk_ioctl) (BYTE, BYTE, void*); /*!< I/O control operation when _USE_IOCTL = 1 */
#endif /* _USE_IOCTL == 1 */
}Diskio_drvTypeDef;
/**
* @brief Global Disk IO Drivers structure definition
*/
typedef struct
{
uint8_t is_initialized[_VOLUMES];
const Diskio_drvTypeDef *drv[_VOLUMES];
uint8_t lun[_VOLUMES];
volatile uint8_t nbr;
}Disk_drvTypeDef;
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
uint8_t FATFS_LinkDriver(const Diskio_drvTypeDef *drv, char *path);
uint8_t FATFS_UnLinkDriver(char *path);
uint8_t FATFS_LinkDriverEx(const Diskio_drvTypeDef *drv, char *path, BYTE lun);
uint8_t FATFS_UnLinkDriverEx(char *path, BYTE lun);
uint8_t FATFS_GetAttachedDriversNbr(void);
#ifdef __cplusplus
}
#endif
#endif /* __FF_GEN_DRV_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Middlewares/Third_Party/FatFs/src/integer.h
Vendored
-38
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@@ -1,38 +0,0 @@
/*-------------------------------------------*/
/* Integer type definitions for FatFs module */
/*-------------------------------------------*/
#ifndef _FF_INTEGER
#define _FF_INTEGER
#ifdef _WIN32 /* FatFs development platform */
#include <windows.h>
#include <tchar.h>
typedef unsigned __int64 QWORD;
#else /* Embedded platform */
/* These types MUST be 16-bit or 32-bit */
typedef int INT;
typedef unsigned int UINT;
/* This type MUST be 8-bit */
typedef unsigned char BYTE;
/* These types MUST be 16-bit */
typedef short SHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types MUST be 32-bit */
typedef long LONG;
typedef unsigned long DWORD;
/* This type MUST be 64-bit (Remove this for ANSI C (C89) compatibility) */
typedef unsigned long long QWORD;
#endif
#endif
RTC/Middlewares/Third_Party/FatFs/src/option/ccsbcs.c
Vendored
-388
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@@ -1,388 +0,0 @@
/*------------------------------------------------------------------------*/
/* Unicode - Local code bidirectional converter (C)ChaN, 2015 */
/* (SBCS code pages) */
/*------------------------------------------------------------------------*/
/* 437 U.S.
/ 720 Arabic
/ 737 Greek
/ 771 KBL
/ 775 Baltic
/ 850 Latin 1
/ 852 Latin 2
/ 855 Cyrillic
/ 857 Turkish
/ 860 Portuguese
/ 861 Icelandic
/ 862 Hebrew
/ 863 Canadian French
/ 864 Arabic
/ 865 Nordic
/ 866 Russian
/ 869 Greek 2
*/
#include "../ff.h"
#if _CODE_PAGE == 437
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 720
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627,
0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A,
0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0x0650, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 737
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8,
0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E,
0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 771
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP771(0x80-0xFF) to Unicode conversion table */
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x0104, 0x0105, 0x010C, 0x010D,
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
0x0118, 0x0119, 0x0116, 0x0117, 0x012E, 0x012F, 0x0160, 0x0161, 0x0172, 0x0173, 0x016A, 0x016B, 0x017D, 0x017E, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 775
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4,
0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D,
0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019,
0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 850
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4,
0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 852
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4,
0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 855
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A,
0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580,
0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116,
0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 857
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4,
0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580,
0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4,
0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 860
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP860(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E3, 0x00E0, 0x00C1, 0x00E7, 0x00EA, 0x00CA, 0x00E8, 0x00CD, 0x00D4, 0x00EC, 0x00C3, 0x00C2,
0x00C9, 0x00C0, 0x00C8, 0x00F4, 0x00F5, 0x00F2, 0x00DA, 0x00F9, 0x00CC, 0x00D5, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x20A7, 0x00D3,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00D2, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 861
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP861(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00D0, 0x00F0, 0x00DE, 0x00C4, 0x00C5,
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00FE, 0x00FB, 0x00DD, 0x00FD, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00C1, 0x00CD, 0x00D3, 0x00DA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 862
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 863
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP863(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00C2, 0x00E0, 0x00B6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x2017, 0x00C0,
0x00C9, 0x00C8, 0x00CA, 0x00F4, 0x00CB, 0x00CF, 0x00FB, 0x00F9, 0x00A4, 0x00D4, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x00DB, 0x0192,
0x00A6, 0x00B4, 0x00F3, 0x00FA, 0x00A8, 0x00BB, 0x00B3, 0x00AF, 0x00CE, 0x3210, 0x00AC, 0x00BD, 0x00BC, 0x00BE, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2219,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 864
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP864(0x80-0xFF) to Unicode conversion table */
0x00B0, 0x00B7, 0x2219, 0x221A, 0x2592, 0x2500, 0x2502, 0x253C, 0x2524, 0x252C, 0x251C, 0x2534, 0x2510, 0x250C, 0x2514, 0x2518,
0x03B2, 0x221E, 0x03C6, 0x00B1, 0x00BD, 0x00BC, 0x2248, 0x00AB, 0x00BB, 0xFEF7, 0xFEF8, 0x0000, 0x0000, 0xFEFB, 0xFEFC, 0x0000,
0x00A0, 0x00AD, 0xFE82, 0x00A3, 0x00A4, 0xFE84, 0x0000, 0x20AC, 0xFE8E, 0xFE8F, 0xFE95, 0xFE99, 0x060C, 0xFE9D, 0xFEA1, 0xFEA5,
0x0660, 0x0661, 0x0662, 0x0663, 0x0664, 0x0665, 0x0666, 0x0667, 0x0668, 0x0669, 0xFED1, 0x061B, 0xFEB1, 0xFEB5, 0xFEB9, 0x061F,
0x00A2, 0xFE80, 0xFE81, 0xFE83, 0xFE85, 0xFECA, 0xFE8B, 0xFE8D, 0xFE91, 0xFE93, 0xFE97, 0xFE9B, 0xFE9F, 0xFEA3, 0xFEA7, 0xFEA9,
0xFEAB, 0xFEAD, 0xFEAF, 0xFEB3, 0xFEB7, 0xFEBB, 0xFEBF, 0xFEC1, 0xFEC5, 0xFECB, 0xFECF, 0x00A6, 0x00AC, 0x00F7, 0x00D7, 0xFEC9,
0x0640, 0xFED3, 0xFED7, 0xFEDB, 0xFEDF, 0xFEE3, 0xFEE7, 0xFEEB, 0xFEED, 0xFEEF, 0xFEF3, 0xFEBD, 0xFECC, 0xFECE, 0xFECD, 0xFEE1,
0xFE7D, 0x0651, 0xFEE5, 0xFEE9, 0xFEEC, 0xFEF0, 0xFEF2, 0xFED0, 0xFED5, 0xFEF5, 0xFEF6, 0xFEDD, 0xFED9, 0xFEF1, 0x25A0, 0x0000
};
#elif _CODE_PAGE == 865
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP865(0x80-0xFF) to Unicode conversion table */
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
0x00C5, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192,
0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00A4,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229,
0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 866
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F,
0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567,
0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580,
0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F,
0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0
};
#elif _CODE_PAGE == 869
#define _TBLDEF 1
static
const WCHAR Tbl[] = { /* CP869(0x80-0xFF) to Unicode conversion table */
0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x0386, 0x00B7, 0x00B7, 0x00AC, 0x00A6, 0x2018, 0x2019, 0x0388, 0x2015, 0x0389,
0x038A, 0x03AA, 0x038C, 0x00B7, 0x00B7, 0x038E, 0x03AB, 0x00A9, 0x038F, 0x00B2, 0x00B3, 0x03AC, 0x00A3, 0x03AD, 0x03AE, 0x03AF,
0x03CA, 0x0390, 0x03CC, 0x03CD, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x00BD, 0x0398, 0x0399, 0x00AB, 0x00BB,
0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x039A, 0x039B, 0x039C, 0x039D, 0x2563, 0x2551, 0x2557, 0x255D, 0x039E, 0x039F, 0x2510,
0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0A30, 0x03A1, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x03A3,
0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x2518, 0x250C, 0x2588, 0x2584, 0x03B4, 0x03B5, 0x2580,
0x03B6, 0x03B7, 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x0384,
0x00AD, 0x00B1, 0x03C5, 0x03C6, 0x03C7, 0x00A7, 0x03C8, 0x0385, 0x00B0, 0x00A8, 0x03C9, 0x03CB, 0x03B0, 0x03CE, 0x25A0, 0x00A0
};
#endif
#if !_TBLDEF || !_USE_LFN
#error This file is not needed at current configuration. Remove from the project.
#endif
WCHAR ff_convert ( /* Converted character, Returns zero on error */
WCHAR chr, /* Character code to be converted */
UINT dir /* 0: Unicode to OEM code, 1: OEM code to Unicode */
)
{
WCHAR c;
if (chr < 0x80) { /* ASCII */
c = chr;
} else {
if (dir) { /* OEM code to Unicode */
c = (chr >= 0x100) ? 0 : Tbl[chr - 0x80];
} else { /* Unicode to OEM code */
for (c = 0; c < 0x80; c++) {
if (chr == Tbl[c]) break;
}
c = (c + 0x80) & 0xFF;
}
}
return c;
}
WCHAR ff_wtoupper ( /* Returns upper converted character */
WCHAR chr /* Unicode character to be upper converted (BMP only) */
)
{
/* Compressed upper conversion table */
static const WCHAR cvt1[] = { /* U+0000 - U+0FFF */
/* Basic Latin */
0x0061,0x031A,
/* Latin-1 Supplement */
0x00E0,0x0317, 0x00F8,0x0307, 0x00FF,0x0001,0x0178,
/* Latin Extended-A */
0x0100,0x0130, 0x0132,0x0106, 0x0139,0x0110, 0x014A,0x012E, 0x0179,0x0106,
/* Latin Extended-B */
0x0180,0x004D,0x0243,0x0181,0x0182,0x0182,0x0184,0x0184,0x0186,0x0187,0x0187,0x0189,0x018A,0x018B,0x018B,0x018D,0x018E,0x018F,0x0190,0x0191,0x0191,0x0193,0x0194,0x01F6,0x0196,0x0197,0x0198,0x0198,0x023D,0x019B,0x019C,0x019D,0x0220,0x019F,0x01A0,0x01A0,0x01A2,0x01A2,0x01A4,0x01A4,0x01A6,0x01A7,0x01A7,0x01A9,0x01AA,0x01AB,0x01AC,0x01AC,0x01AE,0x01AF,0x01AF,0x01B1,0x01B2,0x01B3,0x01B3,0x01B5,0x01B5,0x01B7,0x01B8,0x01B8,0x01BA,0x01BB,0x01BC,0x01BC,0x01BE,0x01F7,0x01C0,0x01C1,0x01C2,0x01C3,0x01C4,0x01C5,0x01C4,0x01C7,0x01C8,0x01C7,0x01CA,0x01CB,0x01CA,
0x01CD,0x0110, 0x01DD,0x0001,0x018E, 0x01DE,0x0112, 0x01F3,0x0003,0x01F1,0x01F4,0x01F4, 0x01F8,0x0128,
0x0222,0x0112, 0x023A,0x0009,0x2C65,0x023B,0x023B,0x023D,0x2C66,0x023F,0x0240,0x0241,0x0241, 0x0246,0x010A,
/* IPA Extensions */
0x0253,0x0040,0x0181,0x0186,0x0255,0x0189,0x018A,0x0258,0x018F,0x025A,0x0190,0x025C,0x025D,0x025E,0x025F,0x0193,0x0261,0x0262,0x0194,0x0264,0x0265,0x0266,0x0267,0x0197,0x0196,0x026A,0x2C62,0x026C,0x026D,0x026E,0x019C,0x0270,0x0271,0x019D,0x0273,0x0274,0x019F,0x0276,0x0277,0x0278,0x0279,0x027A,0x027B,0x027C,0x2C64,0x027E,0x027F,0x01A6,0x0281,0x0282,0x01A9,0x0284,0x0285,0x0286,0x0287,0x01AE,0x0244,0x01B1,0x01B2,0x0245,0x028D,0x028E,0x028F,0x0290,0x0291,0x01B7,
/* Greek, Coptic */
0x037B,0x0003,0x03FD,0x03FE,0x03FF, 0x03AC,0x0004,0x0386,0x0388,0x0389,0x038A, 0x03B1,0x0311,
0x03C2,0x0002,0x03A3,0x03A3, 0x03C4,0x0308, 0x03CC,0x0003,0x038C,0x038E,0x038F, 0x03D8,0x0118,
0x03F2,0x000A,0x03F9,0x03F3,0x03F4,0x03F5,0x03F6,0x03F7,0x03F7,0x03F9,0x03FA,0x03FA,
/* Cyrillic */
0x0430,0x0320, 0x0450,0x0710, 0x0460,0x0122, 0x048A,0x0136, 0x04C1,0x010E, 0x04CF,0x0001,0x04C0, 0x04D0,0x0144,
/* Armenian */
0x0561,0x0426,
0x0000
};
static const WCHAR cvt2[] = { /* U+1000 - U+FFFF */
/* Phonetic Extensions */
0x1D7D,0x0001,0x2C63,
/* Latin Extended Additional */
0x1E00,0x0196, 0x1EA0,0x015A,
/* Greek Extended */
0x1F00,0x0608, 0x1F10,0x0606, 0x1F20,0x0608, 0x1F30,0x0608, 0x1F40,0x0606,
0x1F51,0x0007,0x1F59,0x1F52,0x1F5B,0x1F54,0x1F5D,0x1F56,0x1F5F, 0x1F60,0x0608,
0x1F70,0x000E,0x1FBA,0x1FBB,0x1FC8,0x1FC9,0x1FCA,0x1FCB,0x1FDA,0x1FDB,0x1FF8,0x1FF9,0x1FEA,0x1FEB,0x1FFA,0x1FFB,
0x1F80,0x0608, 0x1F90,0x0608, 0x1FA0,0x0608, 0x1FB0,0x0004,0x1FB8,0x1FB9,0x1FB2,0x1FBC,
0x1FCC,0x0001,0x1FC3, 0x1FD0,0x0602, 0x1FE0,0x0602, 0x1FE5,0x0001,0x1FEC, 0x1FF2,0x0001,0x1FFC,
/* Letterlike Symbols */
0x214E,0x0001,0x2132,
/* Number forms */
0x2170,0x0210, 0x2184,0x0001,0x2183,
/* Enclosed Alphanumerics */
0x24D0,0x051A, 0x2C30,0x042F,
/* Latin Extended-C */
0x2C60,0x0102, 0x2C67,0x0106, 0x2C75,0x0102,
/* Coptic */
0x2C80,0x0164,
/* Georgian Supplement */
0x2D00,0x0826,
/* Full-width */
0xFF41,0x031A,
0x0000
};
const WCHAR *p;
WCHAR bc, nc, cmd;
p = chr < 0x1000 ? cvt1 : cvt2;
for (;;) {
bc = *p++; /* Get block base */
if (!bc || chr < bc) break;
nc = *p++; cmd = nc >> 8; nc &= 0xFF; /* Get processing command and block size */
if (chr < bc + nc) { /* In the block? */
switch (cmd) {
case 0: chr = p[chr - bc]; break; /* Table conversion */
case 1: chr -= (chr - bc) & 1; break; /* Case pairs */
case 2: chr -= 16; break; /* Shift -16 */
case 3: chr -= 32; break; /* Shift -32 */
case 4: chr -= 48; break; /* Shift -48 */
case 5: chr -= 26; break; /* Shift -26 */
case 6: chr += 8; break; /* Shift +8 */
case 7: chr -= 80; break; /* Shift -80 */
case 8: chr -= 0x1C60; break; /* Shift -0x1C60 */
}
break;
}
if (!cmd) p += nc;
}
return chr;
}
RTC/Middlewares/Third_Party/FatFs/src/option/syscall.c
Vendored
-177
View File
@@ -1,177 +0,0 @@
/*------------------------------------------------------------------------*/
/* Sample code of OS dependent controls for FatFs */
/* (C)ChaN, 2014 */
/* Portions COPYRIGHT 2017 STMicroelectronics */
/* Portions Copyright (C) 2014, ChaN, all right reserved */
/*------------------------------------------------------------------------*/
/**
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics. All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
**/
#include "../ff.h"
#if _FS_REENTRANT
/*------------------------------------------------------------------------*/
/* Create a Synchronization Object */
/*------------------------------------------------------------------------*/
/* This function is called in f_mount() function to create a new
/ synchronization object, such as semaphore and mutex. When a 0 is returned,
/ the f_mount() function fails with FR_INT_ERR.
*/
int ff_cre_syncobj ( /* 1:Function succeeded, 0:Could not create the sync object */
BYTE vol, /* Corresponding volume (logical drive number) */
_SYNC_t *sobj /* Pointer to return the created sync object */
)
{
int ret;
#if _USE_MUTEX
#if (osCMSIS < 0x20000U)
osMutexDef(MTX);
*sobj = osMutexCreate(osMutex(MTX));
#else
*sobj = osMutexNew(NULL);
#endif
#else
#if (osCMSIS < 0x20000U)
osSemaphoreDef(SEM);
*sobj = osSemaphoreCreate(osSemaphore(SEM), 1);
#else
*sobj = osSemaphoreNew(1, 1, NULL);
#endif
#endif
ret = (*sobj != NULL);
return ret;
}
/*------------------------------------------------------------------------*/
/* Delete a Synchronization Object */
/*------------------------------------------------------------------------*/
/* This function is called in f_mount() function to delete a synchronization
/ object that created with ff_cre_syncobj() function. When a 0 is returned,
/ the f_mount() function fails with FR_INT_ERR.
*/
int ff_del_syncobj ( /* 1:Function succeeded, 0:Could not delete due to any error */
_SYNC_t sobj /* Sync object tied to the logical drive to be deleted */
)
{
#if _USE_MUTEX
osMutexDelete (sobj);
#else
osSemaphoreDelete (sobj);
#endif
return 1;
}
/*------------------------------------------------------------------------*/
/* Request Grant to Access the Volume */
/*------------------------------------------------------------------------*/
/* This function is called on entering file functions to lock the volume.
/ When a 0 is returned, the file function fails with FR_TIMEOUT.
*/
int ff_req_grant ( /* 1:Got a grant to access the volume, 0:Could not get a grant */
_SYNC_t sobj /* Sync object to wait */
)
{
int ret = 0;
#if (osCMSIS < 0x20000U)
#if _USE_MUTEX
if(osMutexWait(sobj, _FS_TIMEOUT) == osOK)
#else
if(osSemaphoreWait(sobj, _FS_TIMEOUT) == osOK)
#endif
#else
#if _USE_MUTEX
if(osMutexAcquire(sobj, _FS_TIMEOUT) == osOK)
#else
if(osSemaphoreAcquire(sobj, _FS_TIMEOUT) == osOK)
#endif
#endif
{
ret = 1;
}
return ret;
}
/*------------------------------------------------------------------------*/
/* Release Grant to Access the Volume */
/*------------------------------------------------------------------------*/
/* This function is called on leaving file functions to unlock the volume.
*/
void ff_rel_grant (
_SYNC_t sobj /* Sync object to be signaled */
)
{
#if _USE_MUTEX
osMutexRelease(sobj);
#else
osSemaphoreRelease(sobj);
#endif
}
#endif
#if _USE_LFN == 3 /* LFN with a working buffer on the heap */
/*------------------------------------------------------------------------*/
/* Allocate a memory block */
/*------------------------------------------------------------------------*/
/* If a NULL is returned, the file function fails with FR_NOT_ENOUGH_CORE.
*/
void* ff_memalloc ( /* Returns pointer to the allocated memory block */
UINT msize /* Number of bytes to allocate */
)
{
return ff_malloc(msize); /* Allocate a new memory block with POSIX API */
}
/*------------------------------------------------------------------------*/
/* Free a memory block */
/*------------------------------------------------------------------------*/
void ff_memfree (
void* mblock /* Pointer to the memory block to free */
)
{
ff_free(mblock); /* Discard the memory block with POSIX API */
}
#endif
stepper/steppermotor/.cproject
+170
View File
@@ -0,0 +1,170 @@
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stepper/steppermotor/.mxproject
+25
View File
@@ -0,0 +1,25 @@
[PreviousGenFiles]
AdvancedFolderStructure=true
HeaderFileListSize=3
HeaderFiles#0=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Inc/stm32l1xx_it.h
HeaderFiles#1=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Inc/stm32l1xx_hal_conf.h
HeaderFiles#2=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Inc/main.h
HeaderFolderListSize=1
HeaderPath#0=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Inc
HeaderFiles=;
SourceFileListSize=3
SourceFiles#0=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Src/stm32l1xx_it.c
SourceFiles#1=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Src/stm32l1xx_hal_msp.c
SourceFiles#2=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Src/main.c
SourceFolderListSize=1
SourcePath#0=C:/Users/wuest/Desktop/Studium/Master/Sem2/Projekt/Arbeit/uC/Motorsteuerung/stepper/steppermotor/Core/Src
SourceFiles=;
[PreviousLibFiles]
LibFiles=Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_tim_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_uart.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_rcc_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_flash_ramfunc.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_gpio.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_dma.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_pwr_ex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.c;Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_exti.c;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h;Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h;Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h;Drivers/CMSIS/Device/ST/STM32L1xx/Source/Templates/system_stm32l1xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
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HeaderPath=Drivers\STM32L1xx_HAL_Driver\Inc;Drivers\STM32L1xx_HAL_Driver\Inc\Legacy;Drivers\CMSIS\Device\ST\STM32L1xx\Include;Drivers\CMSIS\Include;Core\Inc;
CDefines=USE_HAL_DRIVER;STM32L152xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
RTC/.project → stepper/steppermotor/.project
+1 -1
View File
@@ -1,6 +1,6 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<projectDescription> <projectDescription>
<name>RTC</name> <name>steppermotor</name>
<comment></comment> <comment></comment>
<projects> <projects>
</projects> </projects>
stepper/steppermotor/.settings/language.settings.xml
+27
View File
@@ -0,0 +1,27 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="com.st.stm32cube.ide.mcu.gnu.managedbuild.config.exe.debug.1141907877" name="Debug">
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<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
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<language-scope id="org.eclipse.cdt.core.g++"/>
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</project>
stepper/steppermotor/.settings/stm32cubeide.project.prefs
+4
View File
@@ -0,0 +1,4 @@
635E684B79701B039C64EA45C3F84D30=D2046F946921BE52819209C297E56C23
8DF89ED150041C4CBC7CB9A9CAA90856=25413B3690670D70089D65A800F3500C
DC22A860405A8BF2F2C095E5B6529F12=2F3F0571115F3279903F4D261635949C
eclipse.preferences.version=1
RTC/Core/Inc/l6208.h → stepper/steppermotor/Core/Inc/l6208.h
View File
RTC/Core/Inc/l6208_target_config.h → stepper/steppermotor/Core/Inc/l6208_target_config.h
View File
stepper/steppermotor/Core/Inc/main.h
+84
View File
@@ -0,0 +1,84 @@
/**
******************************************************************************
* @file Multi/Examples/MotionControl/IHM05A1_ExampleFor1Motor/Inc/main.h
* @author IPC Rennes
* @version V1.5.0
* @date June 1st, 2018
* @brief Header for main.c module
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "x_nucleo_ihmxx.h"
#include "l6208.h"
#include "x_nucleo_ihm05a1_stm32l1xx.h"
//#include "stm32l1xx_hal.h"
#ifdef USE_STM32F4XX_NUCLEO
#include "x_nucleo_ihm05a1_stm32f4xx.h"
#endif
#ifdef USE_STM32F3XX_NUCLEO
#include "x_nucleo_ihm05a1_stm32f3xx.h"
#endif
#ifdef USE_STM32F0XX_NUCLEO
#include "x_nucleo_ihm05a1_stm32f0xx.h"
#endif
#ifdef USE_STM32L0XX_NUCLEO
#include "x_nucleo_ihm05a1_stm32l0xx.h"
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
//#define B1_Pin GPIO_PIN_13
//#define B1_GPIO_Port GPIOC
#define USART_TX_Pin GPIO_PIN_2
#define USART_TX_GPIO_Port GPIOA
#define USART_RX_Pin GPIO_PIN_3
#define USART_RX_GPIO_Port GPIOA
//#define LD2_Pin GPIO_PIN_5
//#define LD2_GPIO_Port GPIOA
//#define TMS_Pin GPIO_PIN_13
//#define TMS_GPIO_Port GPIOA
//#define TCK_Pin GPIO_PIN_14
//#define TCK_GPIO_Port GPIOA
//#define SWO_Pin GPIO_PIN_3
//#define SWO_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* Exported functions ------------------------------------------------------- */
void SystemClock_Config(void);
void MyErrorHandler(uint16_t error);
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Inc/motor.h → stepper/steppermotor/Core/Inc/motor.h
View File
stepper/steppermotor/Core/Inc/stm32l1xx_hal_conf.h
+335
View File
@@ -0,0 +1,335 @@
/**
******************************************************************************
* @file stm32l1xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_HAL_CONF_H
#define __STM32L1xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
/*#define HAL_ADC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
/*#define HAL_OPAMP_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SD_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal Multiple Speed oscillator (MSI) default value.
* This value is the default MSI range value after Reset.
*/
#if !defined (MSI_VALUE)
#define MSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE (37000U) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature.*/
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority */
#define USE_RTOS 0
#define PREFETCH_ENABLE 0
#define INSTRUCTION_CACHE_ENABLE 1
#define DATA_CACHE_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## Register callback feature configuration ############### */
/**
* @brief Set below the peripheral configuration to "1U" to add the support
* of HAL callback registration/deregistration feature for the HAL
* driver(s). This allows user application to provide specific callback
* functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
* the default weak callback functions (see each stm32l0xx_hal_ppp.h file
* for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
* for each PPP peripheral).
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
#define USE_HAL_SDMMC_REGISTER_CALLBACKS 0U
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32l1xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32l1xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32l1xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32l1xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32l1xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32l1xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32l1xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32l1xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32l1xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32l1xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32l1xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32l1xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32l1xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32l1xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32l1xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LCD_MODULE_ENABLED
#include "stm32l1xx_hal_lcd.h"
#endif /* HAL_LCD_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32l1xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32l1xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32l1xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32l1xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32l1xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32l1xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32l1xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32l1xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32l1xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32l1xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32l1xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32l1xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32l1xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Inc/stm32f4xx_it.h → stepper/steppermotor/Core/Inc/stm32l1xx_it.h
+5 -8
View File
@@ -1,12 +1,12 @@
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_it.h * @file stm32l1xx_it.h
* @brief This file contains the headers of the interrupt handlers. * @brief This file contains the headers of the interrupt handlers.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics. * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.</center></h2>
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
@@ -19,8 +19,8 @@
/* USER CODE END Header */ /* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_IT_H #ifndef __STM32L1xx_IT_H
#define __STM32F4xx_IT_H #define __STM32L1xx_IT_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@@ -56,9 +56,6 @@ void SVC_Handler(void);
void DebugMon_Handler(void); void DebugMon_Handler(void);
void PendSV_Handler(void); void PendSV_Handler(void);
void SysTick_Handler(void); void SysTick_Handler(void);
void RTC_Alarm_IRQHandler(void);
void EXTI15_10_IRQHandler(void);
void TIM4_IRQHandler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */
/* USER CODE END EFP */ /* USER CODE END EFP */
@@ -67,6 +64,6 @@ void TIM4_IRQHandler(void);
} }
#endif #endif
#endif /* __STM32F4xx_IT_H */ #endif /* __STM32L1xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stepper/steppermotor/Core/Inc/stm32l1xx_nucleo.h
+277
View File
@@ -0,0 +1,277 @@
/**
******************************************************************************
* @file stm32l1xx_nucleo.h
* @author MCD Application Team
* @brief This file contains definitions for:
* - LEDs and push-button available on STM32L1XX-Nucleo Kit
* from STMicroelectronics
* - LCD, joystick and microSD available on Adafruit 1.8 TFT LCD
* shield (reference ID 802)
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1XX_NUCLEO_H
#define __STM32L1XX_NUCLEO_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32L1XX_NUCLEO
* @{
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_hal.h"
/** @defgroup STM32L1XX_NUCLEO_Exported_Types Exported Types
* @{
*/
typedef enum
{
LED2 = 0,
LED_GREEN = LED2
} Led_TypeDef;
typedef enum
{
BUTTON_USER = 0,
/* Alias */
BUTTON_KEY = BUTTON_USER
} Button_TypeDef;
typedef enum
{
BUTTON_MODE_GPIO = 0,
BUTTON_MODE_EXTI = 1
} ButtonMode_TypeDef;
typedef enum
{
JOY_NONE = 0,
JOY_SEL = 1,
JOY_DOWN = 2,
JOY_LEFT = 3,
JOY_RIGHT = 4,
JOY_UP = 5
} JOYState_TypeDef;
/**
* @}
*/
/** @defgroup STM32L1XX_NUCLEO_Exported_Constants Exported Constants
* @{
*/
/**
* @brief Define for STM32L1xx_NUCLEO board
*/
#if !defined (USE_STM32L1xx_NUCLEO)
#define USE_STM32L1xx_NUCLEO
#endif
/** @defgroup STM32L1XX_NUCLEO_LED LED Constants
* @{
*/
#define LEDn 1
#define LED2_PIN GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define LED2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
#define LEDx_GPIO_CLK_ENABLE(__INDEX__) do { if((__INDEX__) == 0) LED2_GPIO_CLK_ENABLE();} while(0)
#define LEDx_GPIO_CLK_DISABLE(__INDEX__) (((__INDEX__) == 0) ? LED2_GPIO_CLK_DISABLE() : 0)
/**
* @}
*/
/** @defgroup STM32L1XX_NUCLEO_BUTTON BUTTON Constants
* @{
*/
#define BUTTONn 1
/**
* @brief User push-button
*/
#define USER_BUTTON_PIN GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
#define USER_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
/* Aliases */
#define KEY_BUTTON_PIN USER_BUTTON_PIN
#define KEY_BUTTON_GPIO_PORT USER_BUTTON_GPIO_PORT
#define KEY_BUTTON_GPIO_CLK_ENABLE() USER_BUTTON_GPIO_CLK_ENABLE()
#define KEY_BUTTON_GPIO_CLK_DISABLE() USER_BUTTON_GPIO_CLK_DISABLE()
#define KEY_BUTTON_EXTI_IRQn USER_BUTTON_EXTI_IRQn
#define BUTTONx_GPIO_CLK_ENABLE(__INDEX__) do { if((__INDEX__) == 0) USER_BUTTON_GPIO_CLK_ENABLE();} while(0)
#define BUTTONx_GPIO_CLK_DISABLE(__INDEX__) (((__INDEX__) == 0) ? USER_BUTTON_GPIO_CLK_DISABLE() : 0)
/**
* @}
*/
/** @addtogroup STM32L1XX_NUCLEO_BUS BUS Constants
* @{
*/
/*###################### SPI1 ###################################*/
#define NUCLEO_SPIx SPI1
#define NUCLEO_SPIx_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE()
#define NUCLEO_SPIx_SCK_AF GPIO_AF5_SPI1
#define NUCLEO_SPIx_SCK_GPIO_PORT GPIOA
#define NUCLEO_SPIx_SCK_PIN GPIO_PIN_5
#define NUCLEO_SPIx_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define NUCLEO_SPIx_SCK_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
#define NUCLEO_SPIx_MISO_MOSI_AF GPIO_AF5_SPI1
#define NUCLEO_SPIx_MISO_MOSI_GPIO_PORT GPIOA
#define NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
#define NUCLEO_SPIx_MISO_PIN GPIO_PIN_6
#define NUCLEO_SPIx_MOSI_PIN GPIO_PIN_7
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
on accurate values, they just guarantee that the application will not remain
stuck if the SPI communication is corrupted.
You may modify these timeout values depending on CPU frequency and application
conditions (interrupts routines ...). */
#define NUCLEO_SPIx_TIMEOUT_MAX 1000
/**
* @brief SD Control Lines management
*/
#define SD_CS_LOW() HAL_GPIO_WritePin(SD_CS_GPIO_PORT, SD_CS_PIN, GPIO_PIN_RESET)
#define SD_CS_HIGH() HAL_GPIO_WritePin(SD_CS_GPIO_PORT, SD_CS_PIN, GPIO_PIN_SET)
/**
* @brief LCD Control Lines management
*/
#define LCD_CS_LOW() HAL_GPIO_WritePin(LCD_CS_GPIO_PORT, LCD_CS_PIN, GPIO_PIN_RESET)
#define LCD_CS_HIGH() HAL_GPIO_WritePin(LCD_CS_GPIO_PORT, LCD_CS_PIN, GPIO_PIN_SET)
#define LCD_DC_LOW() HAL_GPIO_WritePin(LCD_DC_GPIO_PORT, LCD_DC_PIN, GPIO_PIN_RESET)
#define LCD_DC_HIGH() HAL_GPIO_WritePin(LCD_DC_GPIO_PORT, LCD_DC_PIN, GPIO_PIN_SET)
/**
* @brief SD Control Interface pins (shield D4)
*/
#define SD_CS_PIN GPIO_PIN_5
#define SD_CS_GPIO_PORT GPIOB
#define SD_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define SD_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
/**
* @brief LCD Control Interface pins (shield D10)
*/
#define LCD_CS_PIN GPIO_PIN_6
#define LCD_CS_GPIO_PORT GPIOB
#define LCD_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define LCD_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
/**
* @brief LCD Data/Command Interface pins
*/
#define LCD_DC_PIN GPIO_PIN_9
#define LCD_DC_GPIO_PORT GPIOA
#define LCD_DC_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define LCD_DC_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
/*##################### ADC1 ###################################*/
/**
* @brief ADC Interface pins
* used to detect motion of Joystick available on Adafruit 1.8 TFT shield
*/
#define NUCLEO_ADCx ADC1
#define NUCLEO_ADCx_CLK_ENABLE() __HAL_RCC_ADC1_CLK_ENABLE()
#define NUCLEO_ADCx_CLK_DISABLE() __HAL_RCC_ADC1_CLK_DISABLE()
#define NUCLEO_ADCx_GPIO_PORT GPIOB
#define NUCLEO_ADCx_GPIO_PIN GPIO_PIN_0
#define NUCLEO_ADCx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define NUCLEO_ADCx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
/**
* @}
*/
/**
* @}
*/
/** @addtogroup STM32L1XX_NUCLEO_Exported_Functions
* @{
*/
uint32_t BSP_GetVersion(void);
/** @addtogroup STM32L1XX_NUCLEO_LED_Functions
* @{
*/
void BSP_LED_Init(Led_TypeDef Led);
void BSP_LED_DeInit(Led_TypeDef Led);
void BSP_LED_On(Led_TypeDef Led);
void BSP_LED_Off(Led_TypeDef Led);
void BSP_LED_Toggle(Led_TypeDef Led);
/**
* @}
*/
/** @addtogroup STM32L1XX_NUCLEO_BUTTON_Functions
* @{
*/
void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode);
void BSP_PB_DeInit(Button_TypeDef Button);
uint32_t BSP_PB_GetState(Button_TypeDef Button);
#if defined(HAL_ADC_MODULE_ENABLED)
uint8_t BSP_JOY_Init(void);
JOYState_TypeDef BSP_JOY_GetState(void);
void BSP_JOY_DeInit(void);
#endif /* HAL_ADC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L1XX_NUCLEO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stepper/steppermotor/Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h
+209
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@@ -0,0 +1,209 @@
/**
******************************************************************************
* @file x_nucleo_ihm05a1_stm32l0xx.h
* @author IPC Rennes
* @version V1.5.0
* @date June 1st, 2018
* @brief Header for BSP driver for x-nucleo-ihm05a1 Nucleo extension board
* (based on L6208)
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef X_NUCLEO_IHM05A1_STM32L0XX_H
#define X_NUCLEO_IHM05A1_STM32L0XX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_nucleo.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup X_NUCLEO_IHM05A1_STM32L0XX
* @{
*/
/* Exported Constants --------------------------------------------------------*/
/** @defgroup IHM05A1_Exported_Constants IHM05A1 Exported Constants
* @{
*/
/******************************************************************************/
/* USE_STM32L0XX_NUCLEO */
/******************************************************************************/
/** @defgroup Constants_For_STM32L0XX_NUCLEO Constants For STM32L0XX NUCLEO
* @{
*/
/// GPIO Pin used for the VREFA
#define BSP_MOTOR_CONTROL_BOARD_VREFA_PIN (GPIO_PIN_7)
/// GPIO port used for the VREFA
#define BSP_MOTOR_CONTROL_BOARD_VREFA_PORT (GPIOA)
/// Interrupt line used for L6208 OCD and OVT
#define FLAG_EXTI_LINE_IRQn (EXTI9_5_IRQn)
/// Timer used to generate the VREFA PWM
#define BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM (TIM10)
/// Timer used to generate the VREFB PWM
#define BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM (TIM11)
/// Channel Timer used for the VREFA PWM
#define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFA_PWM (TIM_CHANNEL_1)
/// Channel Timer used for the VREFB PWM
#define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFB_PWM (TIM_CHANNEL_1)
/// HAL Active Channel Timer used for the VREFA PWM
#define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_VREFA_PWM (HAL_TIM_ACTIVE_CHANNEL_1)
/// HAL Active Channel Timer used for the VREFB PWM
#define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_VREFB_PWM (HAL_TIM_ACTIVE_CHANNEL_1)
/// Timer Clock Enable for the VREFA PWM
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM_CLCK_ENABLE() __TIM10_CLK_ENABLE()
/// Timer Clock Disable for the VREFA PWM
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM_CLCK_DISABLE() __TIM10_CLK_DISABLE()
/// Timer Clock Enable for the VREFB PWMs
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM_CLCK_ENABLE() __TIM11_CLK_ENABLE()
/// Timer Clock Disable for the VREFB PWMs
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM_CLCK_DISABLE() __TIM11_CLK_DISABLE()
/// VREFA PWM GPIO alternate function
#define BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_VREFA_PWM (GPIO_AF3_TIM10)
/// VREFB PWM GPIO alternate function
#define BSP_MOTOR_CONTROL_BOARD_AFx_TIMx_VREFB_PWM (GPIO_AF3_TIM11)
/// Timer used to generate the tick
#define BSP_MOTOR_CONTROL_BOARD_TIMER_TICK (TIM9)
/// tick timer global interrupt
#define BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_IRQn (TIM9_IRQn)
/// Channel Timer used for the tick
#define BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_TICK (TIM_CHANNEL_1)
/// Timer Clock Enable for the tick
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_CLCK_ENABLE() __TIM9_CLK_ENABLE()
/// Timer Clock Disable for the tick
#define __BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_CLCK_DISABLE() __TIM9_CLK_DISABLE()
/// HAL Active Channel Timer used for the tick
#define BSP_MOTOR_CONTROL_BOARD_HAL_ACT_CHAN_TIMER_TICK (HAL_TIM_ACTIVE_CHANNEL_1)
/// Flag interrupt priority
#define BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PRIORITY (1)
/// tick timer priority (lower than flag interrupt priority)
#define BSP_MOTOR_CONTROL_BOARD_TIMER_TICK_PRIORITY (BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PRIORITY + 1)
/**
* @}
*/
/******************************************************************************/
/* Independent plateform definitions */
/******************************************************************************/
/** @defgroup Constants_For_All_Nucleo_Platforms Constants For All Nucleo Platforms
* @{
*/
/// GPIO Pin used for the VREFB
#define BSP_MOTOR_CONTROL_BOARD_VREFB_PIN (GPIO_PIN_7)
/// GPIO Port used for the VREFB
#define BSP_MOTOR_CONTROL_BOARD_VREFB_PORT (GPIOC)
/// GPIO Pin used for the L6208 clock pin (step clock input)
#define BSP_MOTOR_CONTROL_BOARD_CLOCK_PIN (GPIO_PIN_10)
/// GPIO port used for the L6208 clock pin (step clock input)
#define BSP_MOTOR_CONTROL_BOARD_CLOCK_PORT (GPIOB)
/// GPIO Pin used for the L6208 CW/CCW pin (direction)
#define BSP_MOTOR_CONTROL_BOARD_DIR_PIN (GPIO_PIN_8)
/// GPIO port used for the L6208 CW/CCW pin (direction)
#define BSP_MOTOR_CONTROL_BOARD_DIR_PORT (GPIOA)
/// GPIO Pin used for the L6208 HALF/FULL pin (step mode selector)
#define BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PIN (GPIO_PIN_5)
/// GPIO port used for the L6208 HALF/FULL pin (step mode selector)
#define BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PORT (GPIOB)
/// GPIO Pin used for the L6208 control pin (decay mode selector)
#define BSP_MOTOR_CONTROL_BOARD_CONTROL_PIN (GPIO_PIN_4)
/// GPIO port used for the L6208 control pin (decay mode selector)
#define BSP_MOTOR_CONTROL_BOARD_CONTROL_PORT (GPIOB)
/// GPIO Pin used for the L6208 reset pin
#define BSP_MOTOR_CONTROL_BOARD_RESET_PIN (GPIO_PIN_9)
/// GPIO port used for the L6208 reset pin
#define BSP_MOTOR_CONTROL_BOARD_RESET_PORT (GPIOA)
/// GPIO Pin used for the L6208 EN pin (chip enable) and OCD and OVT alarms
#define BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN (GPIO_PIN_10)
/// GPIO port used for the L6208 EN pin (chip enable) OCD and OVT alarms
#define BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT (GPIOA)
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* X_NUCLEO_IHM05A1_STM32L0XX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Inc/x_nucleo_ihmxx.h → stepper/steppermotor/Core/Inc/x_nucleo_ihmxx.h
View File
RTC/Core/Src/l6208.c → stepper/steppermotor/Core/Src/l6208.c
View File
stepper/steppermotor/Core/Src/main.c
+592
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@@ -0,0 +1,592 @@
/**
******************************************************************************
* @file Multi/Examples/MotionControl/IHM05A1_ExampleFor1Motor/Src/main.c
* @author IPC Rennes
* @version V1.5.0
* @date June 1st, 2018
* @brief This example shows how to use 1 IHM05A1 expansion board
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @defgroup IHM05A1_Example_for_1_motor_device
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
static volatile uint16_t gLastError;
/* Initialization parameters. */
l6208_Init_t initDeviceParameters =
{
1500, //Acceleration rate in step/s^2 or (1/16)th step/s^2 for microstep modes
20, //Acceleration current torque in % (from 0 to 100)
1500, //Deceleration rate in step/s^2 or (1/16)th step/s^2 for microstep modes
20, //Deceleration current torque in % (from 0 to 100)
1500, //Running speed in step/s or (1/16)th step/s for microstep modes
10, //Running current torque in % (from 0 to 100)
5, //Holding current torque in % (from 0 to 100)
STEP_MODE_1_16, //Step mode via enum motorStepMode_t
FAST_DECAY, //Decay mode via enum motorDecayMode_t
0, //Dwelling time in ms
FALSE, //Automatic HIZ STOP
100000 //VREFA and VREFB PWM frequency (Hz)
};
/* Private function prototypes -----------------------------------------------*/
static void MyFlagInterruptHandler(void);
void ButtonHandler(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
int32_t pos;
uint16_t mySpeed;
uint32_t freqPwm;
/* STM32xx HAL library initialization */
HAL_Init();
/* Configure the system clock */
SystemClock_Config();
//----- Init of the Motor control library
/* Set the L6208 library to use 1 device */
BSP_MotorControl_SetNbDevices(BSP_MOTOR_CONTROL_BOARD_ID_L6208, 1);
/* When BSP_MotorControl_Init is called with NULL pointer, */
/* the L6208 parameters are set with the predefined values from file */
/* l6208_target_config.h, otherwise the parameters are set using the */
/* initDeviceParameters structure values. */
BSP_MotorControl_Init(BSP_MOTOR_CONTROL_BOARD_ID_L6208, NULL);
//BSP_MotorControl_Init(BSP_MOTOR_CONTROL_BOARD_ID_L6208, &initDeviceParameters);
/* Attach the function MyFlagInterruptHandler (defined below) to the flag interrupt */
BSP_MotorControl_AttachFlagInterrupt(MyFlagInterruptHandler);
/* Attach the function MyErrorHandler (defined below) to the error Handler*/
BSP_MotorControl_AttachErrorHandler(MyErrorHandler);
//----- Configure Button for user interaction
/* Set Systick Interrupt priority highest to ensure no lock by using HAL_Delay */
HAL_NVIC_SetPriority(SysTick_IRQn, 0x0, 0x0);
/* Configure KEY Button */
BSP_PB_Init(BUTTON_KEY, BUTTON_MODE_EXTI);
//----- Disable the power bridges after initialization of the L6208 device
/* Disable the power bridges after initialization */
BSP_MotorControl_CmdDisable(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Get the PWM frequency used for the VREFA and VREFB voltage generation
freqPwm = BSP_MotorControl_GetBridgeInputPwmFreq(0);
//----- Set the PWM frequency used for the VREFA and VREFB voltage generation
BSP_MotorControl_SetBridgeInputPwmFreq(0, freqPwm>>1);
//----- Move of 16000 microsteps in the FW direction
/* Move device 16000 microsteps in the FORWARD direction */
BSP_MotorControl_Move(0, FORWARD, 16000);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Move of 16000 microsteps in the BW direction
/* Move device 16000 microsteps in the BACKWARD direction*/
BSP_MotorControl_Move(0, BACKWARD, 16000);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
/* Set the current position to be the Home position */
BSP_MotorControl_SetHome(0, pos);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Go to position -6400
/* Request to go to position -6400 */
BSP_MotorControl_GoTo(0, -6400);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
if (pos != -6400)
{
MyErrorHandler(L6208_ERROR_POSITION);
}
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
/* Set the current position to be the Mark position */
BSP_MotorControl_SetMark(0, pos);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Go Home
/* Request to go to Home */
BSP_MotorControl_GoHome(0);
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Go to position 6400
/* Request to go to position 6400 */
BSP_MotorControl_CmdGoToDir(0, FORWARD, 6400);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Go Mark which was set previously after go to -6400
/* Request to go to Mark position */
BSP_MotorControl_GoMark(0);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Run the motor BACKWARD
/* Request to run BACKWARD */
BSP_MotorControl_Run(0, BACKWARD);
HAL_Delay(5000);
/* Get current speed */
mySpeed = BSP_MotorControl_GetCurrentSpeed(0);
//----- Increase the speed while running
/* Increase speed to 2400 microstep/s */
BSP_MotorControl_SetMaxSpeed(0, 2400);
HAL_Delay(5000);
/* Get current speed */
mySpeed = BSP_MotorControl_GetCurrentSpeed(0);
//----- Decrease the speed while running
/* Decrease speed to 1200 microstep/s */
BSP_MotorControl_SetMaxSpeed(0, 1200);
HAL_Delay(5000);
/* Get current speed */
mySpeed = BSP_MotorControl_GetCurrentSpeed(0);
//----- Increase acceleration while running
/* Increase acceleration to 2000 microstep/s^2 */
BSP_MotorControl_SetAcceleration(0, 2000);
HAL_Delay(5000);
/* Increase speed to 2400 microstep/s */
BSP_MotorControl_SetMaxSpeed(0, 2400);
HAL_Delay(5000);
/* Get current speed */
mySpeed = BSP_MotorControl_GetCurrentSpeed(0);
if (mySpeed != 2400)
{
MyErrorHandler(L6208_ERROR_SPEED);
}
//----- Increase deceleration while running
/* Increase deceleration to 2000 microstep/s^2 */
BSP_MotorControl_SetDeceleration(0, 2000);
HAL_Delay(5000);
/* Decrease speed to 1200 microstep/s */
BSP_MotorControl_SetMaxSpeed(0, 1200);
HAL_Delay(5000);
/* Get current speed */
mySpeed = BSP_MotorControl_GetCurrentSpeed(0);
//----- Soft stopped required while running
/* Request soft stop */
BSP_MotorControl_SoftStop(0);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Run stopped by hardstop
/* Request to run in FORWARD direction */
BSP_MotorControl_Run(0, FORWARD);
HAL_Delay(5000);
/* Request to immediatly stop */
BSP_MotorControl_HardStop(0);
BSP_MotorControl_WaitWhileActive(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- GOTO stopped by softstop
/* Request to go to position 20000 */
BSP_MotorControl_GoTo(0, 20000);
HAL_Delay(5000);
/* Request to perform a soft stop */
BSP_MotorControl_SoftStop(0);
BSP_MotorControl_WaitWhileActive(0);
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Change step mode to full step mode
/* Select full step mode (normal mode) */
BSP_MotorControl_SelectStepMode(0, STEP_MODE_FULL);
/* Set speed, acceleration and deceleration to scale with normal mode */
/* For normal mode and half step mode, these parameters are in steps/s or /s^2 */
/* For microstep modes, these parameters are either in (1/16)step/s or /s^2 */
BSP_MotorControl_SetMaxSpeed(0, BSP_MotorControl_GetMaxSpeed(0)>>4);
BSP_MotorControl_SetMinSpeed(0, L6208_MIN_SPEED);
BSP_MotorControl_SetAcceleration(0, BSP_MotorControl_GetAcceleration(0)>>4);
BSP_MotorControl_SetDeceleration(0, BSP_MotorControl_GetDeceleration(0)>>4);
/* Request to go position 200 (full steps) */
BSP_MotorControl_GoTo(0, 200);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
if (pos != 200)
{
MyErrorHandler(L6208_ERROR_POSITION);
}
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Change step mode to half step mode
/* Select half step mode */
BSP_MotorControl_SelectStepMode(0, STEP_MODE_HALF);
/* Request to go position -400 (half steps) */
BSP_MotorControl_GoTo(0, -400);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
if (pos != -400)
{
MyErrorHandler(L6208_ERROR_POSITION);
}
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Change step mode 1/4 microstepping mode
/* Select 1/4 step mode */
BSP_MotorControl_SelectStepMode(0, STEP_MODE_1_4);
/* Set speed, acceleration and deceleration to scale with microstep mode */
/* For normal mode and half step mode, these parameters are in steps/s or /s^2 */
/* For microstep modes, these parameters are either in (1/16)step/s or /s^2 */
BSP_MotorControl_SetMaxSpeed(0, BSP_MotorControl_GetMaxSpeed(0)<<4);
BSP_MotorControl_SetMinSpeed(0, L6208_MIN_SPEED);
BSP_MotorControl_SetAcceleration(0, BSP_MotorControl_GetAcceleration(0)<<4);
BSP_MotorControl_SetDeceleration(0, BSP_MotorControl_GetDeceleration(0)<<4);
/* Request to go position 800 (quarter steps) */
BSP_MotorControl_GoTo(0, 800);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
if (pos != 800)
{
MyErrorHandler(L6208_ERROR_POSITION);
}
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Change step mode 1/8 microstepping mode
/* Select 1/8 step mode */
BSP_MotorControl_SelectStepMode(0, STEP_MODE_1_8);
/* Request to go position -1600 (1/8th steps) */
BSP_MotorControl_GoTo(0, -1600);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
if (pos != -1600)
{
MyErrorHandler(L6208_ERROR_POSITION);
}
/* Wait for 2 seconds */
HAL_Delay(2000);
//----- Restore 1/16 microstepping mode
/* Reset device to 1/16 microstepping mode */
BSP_MotorControl_SelectStepMode(0, STEP_MODE_1_16);
/* Set speed and acceleration at lowest values */
BSP_MotorControl_SetMaxSpeed(0, L6208_MIN_SPEED);
BSP_MotorControl_SetAcceleration(0, L6208_MIN_ACC_DEC_RATE);
BSP_MotorControl_SetDeceleration(0, L6208_MIN_ACC_DEC_RATE);
/* Move device 49 microsteps (1/16th steps) in the FORWARD direction*/
BSP_MotorControl_Move(0, FORWARD, 49);
/* Wait for the motor ends moving */
BSP_MotorControl_WaitWhileActive(0);
/* Get current position */
pos = BSP_MotorControl_GetPosition(0);
if (pos != 49)
{
MyErrorHandler(L6208_ERROR_POSITION);
}
/* Set speed and acceleration from powerspin6208_target_config.h */
BSP_MotorControl_SetMaxSpeed(0, L6208_CONF_PARAM_RUNNING_SPEED);
BSP_MotorControl_SetAcceleration(0, L6208_CONF_PARAM_ACC_RATE);
BSP_MotorControl_SetDeceleration(0, L6208_CONF_PARAM_DEC_RATE);
/* Turn off power bridges when motor is stopped */
BSP_MotorControl_SetStopMode(0, HIZ_MODE);
/* Infinite loop */
while(1)
{
/* Request to run */
BSP_MotorControl_Run(0, BSP_MotorControl_GetDirection(0));
HAL_Delay(5000);
/* Request soft stop */
BSP_MotorControl_SoftStop(0);
HAL_Delay(2000);
}
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief This function is the User handler for the flag interrupt
* @param None
* @retval None
*/
void MyFlagInterruptHandler(void)
{
//When EN pin is forced low by a failure, configure the GPIO as an ouput low
BSP_MotorControl_CmdDisable(0);
}
/**
* @brief This function is executed in case of error occurrence.
* @param error number of the error
* @retval None
*/
void MyErrorHandler(uint16_t error)
{
/* Backup error number */
gLastError = error;
/* Infinite loop */
while(1)
{
}
}
/**
* @brief This function is executed in case of button press and it changes the
* current direction of the motor
* @param None
* @retval None
*/
void ButtonHandler(void)
{
if (BSP_MotorControl_GetDirection(0) != BACKWARD)
{
BSP_MotorControl_SetDirection(0, BACKWARD);
}
else
{
BSP_MotorControl_SetDirection(0, FORWARD);
}
/* Let 200 ms before clearing the IT for key debouncing */
HAL_Delay(200);
__HAL_GPIO_EXTI_CLEAR_IT(KEY_BUTTON_PIN);
HAL_NVIC_ClearPendingIRQ(KEY_BUTTON_EXTI_IRQn);
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t* file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stepper/steppermotor/Core/Src/stm32l1xx_hal_msp.c
+152
View File
@@ -0,0 +1,152 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32l1xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_COMP_CLK_ENABLE();
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==USART2)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Src/stm32f4xx_it.c → stepper/steppermotor/Core/Src/stm32l1xx_it.c
+11 -47
View File
@@ -1,12 +1,12 @@
/* USER CODE BEGIN Header */ /* USER CODE BEGIN Header */
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f4xx_it.c * @file stm32l1xx_it.c
* @brief Interrupt Service Routines. * @brief Interrupt Service Routines.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics. * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2> * All rights reserved.</center></h2>
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
@@ -20,7 +20,7 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
#include "stm32f4xx_it.h" #include "stm32l1xx_it.h"
/* Private includes ----------------------------------------------------------*/ /* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */ /* USER CODE BEGIN Includes */
/* USER CODE END Includes */ /* USER CODE END Includes */
@@ -56,14 +56,13 @@
/* USER CODE END 0 */ /* USER CODE END 0 */
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
extern RTC_HandleTypeDef hrtc;
extern TIM_HandleTypeDef hTimTick;
/* USER CODE BEGIN EV */ /* USER CODE BEGIN EV */
/* USER CODE END EV */ /* USER CODE END EV */
/******************************************************************************/ /******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */ /* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/ /******************************************************************************/
/** /**
* @brief This function handles Non maskable interrupt. * @brief This function handles Non maskable interrupt.
@@ -145,12 +144,12 @@ void UsageFault_Handler(void)
*/ */
void SVC_Handler(void) void SVC_Handler(void)
{ {
/* USER CODE BEGIN SVCall_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */ /* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */
} }
/** /**
@@ -194,47 +193,12 @@ void SysTick_Handler(void)
} }
/******************************************************************************/ /******************************************************************************/
/* STM32F4xx Peripheral Interrupt Handlers */ /* STM32L1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */ /* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */ /* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f4xx.s). */ /* please refer to the startup file (startup_stm32l1xx.s). */
/******************************************************************************/ /******************************************************************************/
/**
* @brief This function handles RTC alarms A and B interrupt through EXTI line 17.
*/
void RTC_Alarm_IRQHandler(void)
{
/* USER CODE BEGIN RTC_Alarm_IRQn 0 */
/* USER CODE END RTC_Alarm_IRQn 0 */
HAL_RTC_AlarmIRQHandler(&hrtc);
/* USER CODE BEGIN RTC_Alarm_IRQn 1 */
/* USER CODE END RTC_Alarm_IRQn 1 */
}
/**
* @brief This function handles interrupt for External lines 10 to 15
* @param None
* @retval None
*/
void EXTI15_10_IRQHandler(void)
{
HAL_GPIO_EXTI_IRQHandler(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN);
HAL_GPIO_EXTI_IRQHandler(KEY_BUTTON_PIN);
}
/**
* @brief This function handles TIM4 interrupt request.
* @param None
* @retval None
*/
void TIM4_IRQHandler(void)
{
HAL_TIM_IRQHandler(&hTimTick);
}
/* USER CODE BEGIN 1 */ /* USER CODE BEGIN 1 */
/* USER CODE END 1 */ /* USER CODE END 1 */
stepper/steppermotor/Core/Src/stm32l1xx_nucleo.c
+909
View File
@@ -0,0 +1,909 @@
/**
******************************************************************************
* @file stm32l1xx_nucleo.c
* @author MCD Application Team
* @brief This file provides set of firmware functions to manage:
* - LEDs and push-button available on STM32L1XX-Nucleo Kit
* from STMicroelectronics
* - LCD, joystick and microSD available on Adafruit 1.8" TFT LCD
* shield (reference ID 802)
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx_nucleo.h"
/** @addtogroup BSP
* @{
*/
/** @defgroup STM32L1XX_NUCLEO STM32L152RE-Nucleo
* @brief This file provides set of firmware functions to manage Leds and push-button
* available on STM32L1XX-Nucleo Kit from STMicroelectronics.
* It provides also LCD, joystick and uSD functions to communicate with
* Adafruit 1.8" TFT LCD shield (reference ID 802)
* @{
*/
/** @defgroup STM32L1XX_NUCLEO_Private_Defines Private Defines
* @{
*/
/**
* @brief STM32L152RE NUCLEO BSP Driver version
*/
#define __STM32L1XX_NUCLEO_BSP_VERSION_MAIN (0x01) /*!< [31:24] main version */
#define __STM32L1XX_NUCLEO_BSP_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
#define __STM32L1XX_NUCLEO_BSP_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
#define __STM32L1XX_NUCLEO_BSP_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32L1XX_NUCLEO_BSP_VERSION ((__STM32L1XX_NUCLEO_BSP_VERSION_MAIN << 24)\
|(__STM32L1XX_NUCLEO_BSP_VERSION_SUB1 << 16)\
|(__STM32L1XX_NUCLEO_BSP_VERSION_SUB2 << 8 )\
|(__STM32L1XX_NUCLEO_BSP_VERSION_RC))
/**
* @brief LINK SD Card
*/
#define SD_DUMMY_BYTE 0xFF
#define SD_NO_RESPONSE_EXPECTED 0x80
/**
* @}
*/
/** @defgroup STM32L1XX_NUCLEO_Private_Variables Private Variables
* @{
*/
GPIO_TypeDef* LED_PORT[LEDn] = {LED2_GPIO_PORT};
const uint16_t LED_PIN[LEDn] = {LED2_PIN};
GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {USER_BUTTON_GPIO_PORT};
const uint16_t BUTTON_PIN[BUTTONn] = {USER_BUTTON_PIN};
const uint8_t BUTTON_IRQn[BUTTONn] = {USER_BUTTON_EXTI_IRQn };
/**
* @brief BUS variables
*/
#ifdef HAL_SPI_MODULE_ENABLED
uint32_t SpixTimeout = NUCLEO_SPIx_TIMEOUT_MAX; /*<! Value of Timeout when SPI communication fails */
static SPI_HandleTypeDef hnucleo_Spi;
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
static ADC_HandleTypeDef hnucleo_Adc;
/* ADC channel configuration structure declaration */
static ADC_ChannelConfTypeDef sConfig;
#endif /* HAL_ADC_MODULE_ENABLED */
/**
* @}
*/
/** @defgroup STM32L1XX_NUCLEO_Private_Functions Private Functions
* @{
*/
#ifdef HAL_SPI_MODULE_ENABLED
static void SPIx_Init(void);
static void SPIx_Write(uint8_t Value);
static void SPIx_WriteData(uint8_t *DataIn, uint16_t DataLength);
static void SPIx_WriteReadData(const uint8_t *DataIn, uint8_t *DataOut, uint16_t DataLegnth);
static void SPIx_Error (void);
static void SPIx_MspInit(void);
/* SD IO functions */
void SD_IO_Init(void);
void SD_IO_CSState(uint8_t state);
void SD_IO_WriteReadData(const uint8_t *DataIn, uint8_t *DataOut, uint16_t DataLength);
void SD_IO_ReadData(uint8_t *DataOut, uint16_t DataLength);
void SD_IO_WriteData(const uint8_t *Data, uint16_t DataLength);
uint8_t SD_IO_WriteByte(uint8_t Data);
uint8_t SD_IO_ReadByte(void);
/* LCD IO functions */
void LCD_IO_Init(void);
void LCD_IO_WriteData(uint8_t Data);
void LCD_IO_WriteMultipleData(uint8_t *pData, uint32_t Size);
void LCD_IO_WriteReg(uint8_t LCDReg);
void LCD_Delay(uint32_t delay);
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
static HAL_StatusTypeDef ADCx_Init(void);
static void ADCx_DeInit(void);
static void ADCx_MspInit(ADC_HandleTypeDef *hadc);
static void ADCx_MspDeInit(ADC_HandleTypeDef *hadc);
#endif /* HAL_ADC_MODULE_ENABLED */
/**
* @}
*/
/** @defgroup STM32L1XX_NUCLEO_Exported_Functions Exported Functions
* @{
*/
/**
* @brief This method returns the STM32L1XX NUCLEO BSP Driver revision
* @retval version : 0xXYZR (8bits for each decimal, R for RC)
*/
uint32_t BSP_GetVersion(void)
{
return __STM32L1XX_NUCLEO_BSP_VERSION;
}
/** @defgroup STM32L1XX_NUCLEO_LED_Functions LED Functions
* @{
*/
/**
* @brief Configures LED GPIO.
* @param Led: Led to be configured.
* This parameter can be one of the following values:
* @arg LED2
* @retval None
*/
void BSP_LED_Init(Led_TypeDef Led)
{
GPIO_InitTypeDef gpioinitstruct;
/* Enable the GPIO_LED Clock */
LEDx_GPIO_CLK_ENABLE(Led);
/* Configure the GPIO_LED pin */
gpioinitstruct.Pin = LED_PIN[Led];
gpioinitstruct.Mode = GPIO_MODE_OUTPUT_PP;
gpioinitstruct.Pull = GPIO_NOPULL;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(LED_PORT[Led], &gpioinitstruct);
/* Reset PIN to switch off the LED */
HAL_GPIO_WritePin(LED_PORT[Led],LED_PIN[Led], GPIO_PIN_RESET);
}
/**
* @brief DeInit LEDs.
* @param Led: LED to be de-init.
* This parameter can be one of the following values:
* @arg LED2
* @note Led DeInit does not disable the GPIO clock nor disable the Mfx
* @retval None
*/
void BSP_LED_DeInit(Led_TypeDef Led)
{
GPIO_InitTypeDef gpio_init_structure;
/* Turn off LED */
HAL_GPIO_WritePin(LED_PORT[Led],LED_PIN[Led], GPIO_PIN_RESET);
/* DeInit the GPIO_LED pin */
gpio_init_structure.Pin = LED_PIN[Led];
HAL_GPIO_DeInit(LED_PORT[Led], gpio_init_structure.Pin);
}
/**
* @brief Turns selected LED On.
* @param Led: Specifies the Led to be set on.
* This parameter can be one of following parameters:
* @arg LED2
* @retval None
*/
void BSP_LED_On(Led_TypeDef Led)
{
HAL_GPIO_WritePin(LED_PORT[Led], LED_PIN[Led], GPIO_PIN_SET);
}
/**
* @brief Turns selected LED Off.
* @param Led: Specifies the Led to be set off.
* This parameter can be one of following parameters:
* @arg LED2
* @retval None
*/
void BSP_LED_Off(Led_TypeDef Led)
{
HAL_GPIO_WritePin(LED_PORT[Led], LED_PIN[Led], GPIO_PIN_RESET);
}
/**
* @brief Toggles the selected LED.
* @param Led: Specifies the Led to be toggled.
* This parameter can be one of following parameters:
* @arg LED2
* @retval None
*/
void BSP_LED_Toggle(Led_TypeDef Led)
{
HAL_GPIO_TogglePin(LED_PORT[Led], LED_PIN[Led]);
}
/**
* @}
*/
/** @defgroup STM32L1XX_NUCLEO_BUTTON_Functions BUTTON Functions
* @{
*/
/**
* @brief Configures Button GPIO and EXTI Line.
* @param Button: Specifies the Button to be configured.
* This parameter should be: BUTTON_USER
* @param ButtonMode: Specifies Button mode.
* This parameter can be one of following parameters:
* @arg BUTTON_MODE_GPIO: Button will be used as simple IO
* @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt
* generation capability
* @retval None
*/
void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode)
{
GPIO_InitTypeDef gpioinitstruct;
/* Enable the BUTTON Clock */
BUTTONx_GPIO_CLK_ENABLE(Button);
gpioinitstruct.Pin = BUTTON_PIN[Button];
gpioinitstruct.Pull = GPIO_NOPULL;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_MEDIUM;
if (ButtonMode == BUTTON_MODE_GPIO)
{
/* Configure Button pin as input */
gpioinitstruct.Mode = GPIO_MODE_INPUT;
HAL_GPIO_Init(BUTTON_PORT[Button], &gpioinitstruct);
}
if (ButtonMode == BUTTON_MODE_EXTI)
{
/* Configure Button pin as input with External interrupt */
gpioinitstruct.Mode = GPIO_MODE_IT_FALLING;
HAL_GPIO_Init(BUTTON_PORT[Button], &gpioinitstruct);
/* Enable and set Button EXTI Interrupt to the lowest priority */
HAL_NVIC_SetPriority((IRQn_Type)(BUTTON_IRQn[Button]), 0x0F, 0);
HAL_NVIC_EnableIRQ((IRQn_Type)(BUTTON_IRQn[Button]));
}
}
/**
* @brief Push Button DeInit.
* @param Button: Button to be configured
* This parameter should be: BUTTON_USER
* @note PB DeInit does not disable the GPIO clock
* @retval None
*/
void BSP_PB_DeInit(Button_TypeDef Button)
{
GPIO_InitTypeDef gpio_init_structure;
gpio_init_structure.Pin = BUTTON_PIN[Button];
HAL_NVIC_DisableIRQ((IRQn_Type)(BUTTON_IRQn[Button]));
HAL_GPIO_DeInit(BUTTON_PORT[Button], gpio_init_structure.Pin);
}
/**
* @brief Returns the selected Button state.
* @param Button: Specifies the Button to be checked.
* This parameter should be: BUTTON_USER
* @retval Button state.
*/
uint32_t BSP_PB_GetState(Button_TypeDef Button)
{
return HAL_GPIO_ReadPin(BUTTON_PORT[Button], BUTTON_PIN[Button]);
}
/**
* @}
*/
/**
* @}
*/
/** @addtogroup STM32L1XX_NUCLEO_Private_Functions
* @{
*/
#ifdef HAL_SPI_MODULE_ENABLED
/******************************************************************************
BUS OPERATIONS
*******************************************************************************/
/**
* @brief Initialize SPI MSP.
* @retval None
*/
static void SPIx_MspInit(void)
{
GPIO_InitTypeDef gpioinitstruct = {0};
/*** Configure the GPIOs ***/
/* Enable GPIO clock */
NUCLEO_SPIx_SCK_GPIO_CLK_ENABLE();
NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_ENABLE();
/* Configure SPI SCK */
gpioinitstruct.Pin = NUCLEO_SPIx_SCK_PIN;
gpioinitstruct.Mode = GPIO_MODE_AF_PP;
gpioinitstruct.Pull = GPIO_PULLUP;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpioinitstruct.Alternate = NUCLEO_SPIx_SCK_AF;
HAL_GPIO_Init(NUCLEO_SPIx_SCK_GPIO_PORT, &gpioinitstruct);
/* Configure SPI MISO and MOSI */
gpioinitstruct.Pin = NUCLEO_SPIx_MOSI_PIN;
gpioinitstruct.Alternate = NUCLEO_SPIx_MISO_MOSI_AF;
gpioinitstruct.Pull = GPIO_PULLDOWN;
HAL_GPIO_Init(NUCLEO_SPIx_MISO_MOSI_GPIO_PORT, &gpioinitstruct);
gpioinitstruct.Pin = NUCLEO_SPIx_MISO_PIN;
HAL_GPIO_Init(NUCLEO_SPIx_MISO_MOSI_GPIO_PORT, &gpioinitstruct);
/*** Configure the SPI peripheral ***/
/* Enable SPI clock */
NUCLEO_SPIx_CLK_ENABLE();
}
/**
* @brief Initialize SPI HAL.
* @retval None
*/
static void SPIx_Init(void)
{
if(HAL_SPI_GetState(&hnucleo_Spi) == HAL_SPI_STATE_RESET)
{
/* SPI Config */
hnucleo_Spi.Instance = NUCLEO_SPIx;
/* SPI baudrate is set to 8 MHz maximum (PCLK2/SPI_BaudRatePrescaler = 64/8 = 8 MHz)
to verify these constraints:
- ST7735 LCD SPI interface max baudrate is 15MHz for write and 6.66MHz for read
Since the provided driver doesn't use read capability from LCD, only constraint
on write baudrate is considered.
- SD card SPI interface max baudrate is 25MHz for write/read
- PCLK2 max frequency is 32 MHz
*/
hnucleo_Spi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
hnucleo_Spi.Init.Direction = SPI_DIRECTION_2LINES;
hnucleo_Spi.Init.CLKPhase = SPI_PHASE_1EDGE;
hnucleo_Spi.Init.CLKPolarity = SPI_POLARITY_LOW;
hnucleo_Spi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hnucleo_Spi.Init.CRCPolynomial = 7;
hnucleo_Spi.Init.DataSize = SPI_DATASIZE_8BIT;
hnucleo_Spi.Init.FirstBit = SPI_FIRSTBIT_MSB;
hnucleo_Spi.Init.NSS = SPI_NSS_SOFT;
hnucleo_Spi.Init.TIMode = SPI_TIMODE_DISABLE;
hnucleo_Spi.Init.Mode = SPI_MODE_MASTER;
SPIx_MspInit();
HAL_SPI_Init(&hnucleo_Spi);
}
}
/**
* @brief SPI Write a byte to device
* @param DataIn value to be written
* @param DataLength number of bytes to write
* @param DataOut read value
* @retval None
*/
static void SPIx_WriteReadData(const uint8_t *DataIn, uint8_t *DataOut, uint16_t DataLength)
{
HAL_StatusTypeDef status = HAL_OK;
status = HAL_SPI_TransmitReceive(&hnucleo_Spi, (uint8_t*) DataIn, DataOut, DataLength, SpixTimeout);
/* Check the communication status */
if(status != HAL_OK)
{
/* Execute user timeout callback */
SPIx_Error();
}
}
/**
* @brief SPI Write an amount of data to device
* @param DataIn value to be written
* @param DataLength number of bytes to write
* @retval None
*/
static void SPIx_WriteData(uint8_t *DataIn, uint16_t DataLength)
{
HAL_StatusTypeDef status = HAL_OK;
status = HAL_SPI_Transmit(&hnucleo_Spi, DataIn, DataLength, SpixTimeout);
/* Check the communication status */
if(status != HAL_OK)
{
/* Execute user timeout callback */
SPIx_Error();
}
}
/**
* @brief SPI Write a byte to device
* @param Value: value to be written
* @retval None
*/
static void SPIx_Write(uint8_t Value)
{
HAL_StatusTypeDef status = HAL_OK;
uint8_t data;
status = HAL_SPI_TransmitReceive(&hnucleo_Spi, (uint8_t*) &Value, &data, 1, SpixTimeout);
/* Check the communication status */
if(status != HAL_OK)
{
/* Execute user timeout callback */
SPIx_Error();
}
}
/**
* @brief SPI error treatment function
* @retval None
*/
static void SPIx_Error (void)
{
/* De-initialize the SPI communication BUS */
HAL_SPI_DeInit(&hnucleo_Spi);
/* Re-Initiaize the SPI communication BUS */
SPIx_Init();
}
/******************************************************************************
LINK OPERATIONS
*******************************************************************************/
/********************************* LINK SD ************************************/
/**
* @brief Initialize the SD Card and put it into StandBy State (Ready for
* data transfer).
* @retval None
*/
void SD_IO_Init(void)
{
GPIO_InitTypeDef gpioinitstruct = {0};
uint8_t counter = 0;
/* SD_CS_GPIO Periph clock enable */
SD_CS_GPIO_CLK_ENABLE();
/* Configure SD_CS_PIN pin: SD Card CS pin */
gpioinitstruct.Pin = SD_CS_PIN;
gpioinitstruct.Mode = GPIO_MODE_OUTPUT_PP;
gpioinitstruct.Pull = GPIO_PULLUP;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(SD_CS_GPIO_PORT, &gpioinitstruct);
/* Configure LCD_CS_PIN pin: LCD Card CS pin */
gpioinitstruct.Pin = LCD_CS_PIN;
gpioinitstruct.Mode = GPIO_MODE_OUTPUT_PP;
gpioinitstruct.Pull = GPIO_NOPULL;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(SD_CS_GPIO_PORT, &gpioinitstruct);
LCD_CS_HIGH();
/*------------Put SD in SPI mode--------------*/
/* SD SPI Config */
SPIx_Init();
/* SD chip select high */
SD_CS_HIGH();
/* Send dummy byte 0xFF, 10 times with CS high */
/* Rise CS and MOSI for 80 clocks cycles */
for (counter = 0; counter <= 9; counter++)
{
/* Send dummy byte 0xFF */
SD_IO_WriteByte(SD_DUMMY_BYTE);
}
}
/**
* @brief Set the SD_CS pin.
* @param val pin value.
* @retval None
*/
void SD_IO_CSState(uint8_t val)
{
if(val == 1)
{
SD_CS_HIGH();
}
else
{
SD_CS_LOW();
}
}
/**
* @brief Write byte(s) on the SD
* @param DataIn: Pointer to data buffer to write
* @param DataOut: Pointer to data buffer for read data
* @param DataLength: number of bytes to write
* @retval None
*/
void SD_IO_WriteReadData(const uint8_t *DataIn, uint8_t *DataOut, uint16_t DataLength)
{
/* Send the byte */
SPIx_WriteReadData(DataIn, DataOut, DataLength);
}
/**
* @brief Write a byte on the SD.
* @param Data byte to send.
* @retval Data written
*/
uint8_t SD_IO_WriteByte(uint8_t Data)
{
uint8_t tmp;
/* Send the byte */
SPIx_WriteReadData(&Data,&tmp,1);
return tmp;
}
/**
* @brief Write an amount of data on the SD.
* @param DataOut byte to send.
* @param DataLength number of bytes to write
* @retval none
*/
void SD_IO_ReadData(uint8_t *DataOut, uint16_t DataLength)
{
/* Send the byte */
SD_IO_WriteReadData(DataOut, DataOut, DataLength);
}
/**
* @brief Write an amount of data on the SD.
* @param Data byte to send.
* @param DataLength number of bytes to write
* @retval none
*/
void SD_IO_WriteData(const uint8_t *Data, uint16_t DataLength)
{
/* Send the byte */
SPIx_WriteData((uint8_t *)Data, DataLength);
}
/********************************* LINK LCD ***********************************/
/**
* @brief Initialize the LCD
* @retval None
*/
void LCD_IO_Init(void)
{
GPIO_InitTypeDef gpioinitstruct = {0};
/* LCD_CS_GPIO and LCD_DC_GPIO Periph clock enable */
LCD_CS_GPIO_CLK_ENABLE();
LCD_DC_GPIO_CLK_ENABLE();
/* Configure LCD_CS_PIN pin: LCD Card CS pin */
gpioinitstruct.Pin = LCD_CS_PIN;
gpioinitstruct.Mode = GPIO_MODE_OUTPUT_PP;
gpioinitstruct.Pull = GPIO_NOPULL;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(SD_CS_GPIO_PORT, &gpioinitstruct);
/* Configure LCD_DC_PIN pin: LCD Card DC pin */
gpioinitstruct.Pin = LCD_DC_PIN;
HAL_GPIO_Init(LCD_DC_GPIO_PORT, &gpioinitstruct);
/* LCD chip select high */
LCD_CS_HIGH();
/* LCD SPI Config */
SPIx_Init();
}
/**
* @brief Write command to select the LCD register.
* @param LCDReg: Address of the selected register.
* @retval None
*/
void LCD_IO_WriteReg(uint8_t LCDReg)
{
/* Reset LCD control line CS */
LCD_CS_LOW();
/* Set LCD data/command line DC to Low */
LCD_DC_LOW();
/* Send Command */
SPIx_Write(LCDReg);
/* Deselect : Chip Select high */
LCD_CS_HIGH();
}
/**
* @brief Write register value.
* @param pData Pointer on the register value
* @param Size Size of byte to transmit to the register
* @retval None
*/
void LCD_IO_WriteMultipleData(uint8_t *pData, uint32_t Size)
{
uint32_t counter = 0;
/* Reset LCD control line CS */
LCD_CS_LOW();
/* Set LCD data/command line DC to High */
LCD_DC_HIGH();
if (Size == 1)
{
/* Only 1 byte to be sent to LCD - general interface can be used */
/* Send Data */
SPIx_Write(*pData);
}
else
{
/* Several data should be sent in a raw */
/* Direct SPI accesses for optimization */
for (counter = Size; counter != 0; counter--)
{
while(((hnucleo_Spi.Instance->SR) & SPI_FLAG_TXE) != SPI_FLAG_TXE)
{
}
/* Need to invert bytes for LCD*/
*((__IO uint8_t*)&hnucleo_Spi.Instance->DR) = *(pData+1);
while(((hnucleo_Spi.Instance->SR) & SPI_FLAG_TXE) != SPI_FLAG_TXE)
{
}
*((__IO uint8_t*)&hnucleo_Spi.Instance->DR) = *pData;
counter--;
pData += 2;
}
/* Wait until the bus is ready before releasing Chip select */
while(((hnucleo_Spi.Instance->SR) & SPI_FLAG_BSY) != RESET)
{
}
}
/* Deselect : Chip Select high */
LCD_CS_HIGH();
}
/**
* @brief Wait for loop in ms.
* @param Delay in ms.
* @retval None
*/
void LCD_Delay(uint32_t Delay)
{
HAL_Delay(Delay);
}
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
/******************************* LINK JOYSTICK ********************************/
/**
* @brief Initialize ADC MSP.
* @param hadc ADC peripheral
* @retval None
*/
static void ADCx_MspInit(ADC_HandleTypeDef *hadc)
{
GPIO_InitTypeDef gpioinitstruct = {0};
/*** Configure the GPIOs ***/
/* Enable GPIO clock */
NUCLEO_ADCx_GPIO_CLK_ENABLE();
/* Configure ADC1 Channel8 as analog input */
gpioinitstruct.Pin = NUCLEO_ADCx_GPIO_PIN ;
gpioinitstruct.Mode = GPIO_MODE_ANALOG;
gpioinitstruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(NUCLEO_ADCx_GPIO_PORT, &gpioinitstruct);
/*** Configure the ADC peripheral ***/
/* Enable ADC clock */
NUCLEO_ADCx_CLK_ENABLE();
}
/**
* @brief DeInitializes ADC MSP.
* @param hadc ADC peripheral
* @note ADC DeInit does not disable the GPIO clock
* @retval None
*/
static void ADCx_MspDeInit(ADC_HandleTypeDef *hadc)
{
GPIO_InitTypeDef gpioinitstruct;
/*** DeInit the ADC peripheral ***/
/* Disable ADC clock */
NUCLEO_ADCx_CLK_DISABLE();
/* Configure the selected ADC Channel as analog input */
gpioinitstruct.Pin = NUCLEO_ADCx_GPIO_PIN ;
HAL_GPIO_DeInit(NUCLEO_ADCx_GPIO_PORT, gpioinitstruct.Pin);
/* Disable GPIO clock has to be done by the application*/
/* NUCLEO_ADCx_GPIO_CLK_DISABLE(); */
}
/**
* @brief Initializes ADC HAL.
* @retval None
*/
static HAL_StatusTypeDef ADCx_Init(void)
{
/* Set ADC instance */
hnucleo_Adc.Instance = NUCLEO_ADCx;
if(HAL_ADC_GetState(&hnucleo_Adc) == HAL_ADC_STATE_RESET)
{
/* ADC Config */
hnucleo_Adc.Instance = NUCLEO_ADCx;
hnucleo_Adc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV2; /* ADC clock must not exceed 16MHz */
hnucleo_Adc.Init.Resolution = ADC_RESOLUTION_12B;
hnucleo_Adc.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hnucleo_Adc.Init.ScanConvMode = ADC_SCAN_DISABLE; /* Sequencer disabled (ADC conversion on only 1 channel: channel set on rank 1) */
hnucleo_Adc.Init.EOCSelection = ADC_EOC_SEQ_CONV;
hnucleo_Adc.Init.LowPowerAutoWait = ADC_AUTOWAIT_UNTIL_DATA_READ;
hnucleo_Adc.Init.LowPowerAutoPowerOff = ADC_AUTOPOWEROFF_DISABLE;
hnucleo_Adc.Init.ChannelsBank = ADC_CHANNELS_BANK_A;
hnucleo_Adc.Init.ContinuousConvMode = DISABLE; /* Continuous mode disabled to have only 1 conversion at each conversion trig */
hnucleo_Adc.Init.NbrOfConversion = 1; /* Parameter discarded because sequencer is disabled */
hnucleo_Adc.Init.DiscontinuousConvMode = DISABLE; /* Parameter discarded because sequencer is disabled */
hnucleo_Adc.Init.NbrOfDiscConversion = 1; /* Parameter discarded because sequencer is disabled */
hnucleo_Adc.Init.ExternalTrigConv = ADC_SOFTWARE_START; /* Trig of conversion start done manually by software, without external event */
hnucleo_Adc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; /* Parameter discarded because trig by software start */
hnucleo_Adc.Init.DMAContinuousRequests = DISABLE;
/* Initialize MSP related to ADC */
ADCx_MspInit(&hnucleo_Adc);
/* Initialize ADC */
if (HAL_ADC_Init(&hnucleo_Adc) != HAL_OK)
{
return HAL_ERROR;
}
}
return HAL_OK;
}
/**
* @brief Initializes ADC HAL.
* @retval None
*/
static void ADCx_DeInit(void)
{
hnucleo_Adc.Instance = NUCLEO_ADCx;
HAL_ADC_DeInit(&hnucleo_Adc);
ADCx_MspDeInit(&hnucleo_Adc);
}
/******************************* LINK JOYSTICK ********************************/
/**
* @brief Configures joystick available on adafruit 1.8" TFT shield
* managed through ADC to detect motion.
* @retval Joystickstatus (0=> success, 1=> fail)
*/
uint8_t BSP_JOY_Init(void)
{
if (ADCx_Init() != HAL_OK)
{
return (uint8_t) HAL_ERROR;
}
/* Select Channel 8 to be converted */
sConfig.Channel = ADC_CHANNEL_8;
sConfig.SamplingTime = ADC_SAMPLETIME_16CYCLES;
sConfig.Rank = ADC_REGULAR_RANK_1;
/* Return Joystick initialization status */
return (uint8_t)HAL_ADC_ConfigChannel(&hnucleo_Adc, &sConfig);
}
/**
* @brief DeInit joystick GPIOs.
* @note JOY DeInit does not disable the Mfx, just set the Mfx pins in Off mode
* @retval None.
*/
void BSP_JOY_DeInit(void)
{
ADCx_DeInit();
}
/**
* @brief Returns the Joystick key pressed.
* @note To know which Joystick key is pressed we need to detect the voltage
* level on each key output
* - None : 3.3 V / 4095
* - SEL : 1.055 V / 1308
* - DOWN : 0.71 V / 88
* - LEFT : 3.0 V / 3720
* - RIGHT : 0.595 V / 737
* - UP : 1.65 V / 2046
* @retval JOYState_TypeDef: Code of the Joystick key pressed.
*/
JOYState_TypeDef BSP_JOY_GetState(void)
{
JOYState_TypeDef state = JOY_NONE;
uint16_t keyconvertedvalue = 0;
/* Start the conversion process */
HAL_ADC_Start(&hnucleo_Adc);
/* Wait for the end of conversion */
if (HAL_ADC_PollForConversion(&hnucleo_Adc, 10) != HAL_TIMEOUT)
{
/* Get the converted value of regular channel */
keyconvertedvalue = HAL_ADC_GetValue(&hnucleo_Adc);
}
if((keyconvertedvalue > 2010) && (keyconvertedvalue < 2090))
{
state = JOY_UP;
}
else if((keyconvertedvalue > 680) && (keyconvertedvalue < 780))
{
state = JOY_RIGHT;
}
else if((keyconvertedvalue > 1270) && (keyconvertedvalue < 1350))
{
state = JOY_SEL;
}
else if((keyconvertedvalue > 50) && (keyconvertedvalue < 130))
{
state = JOY_DOWN;
}
else if((keyconvertedvalue > 3680) && (keyconvertedvalue < 3760))
{
state = JOY_LEFT;
}
else
{
state = JOY_NONE;
}
/* Return the code of the Joystick key pressed*/
return state;
}
#endif /* HAL_ADC_MODULE_ENABLED */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Src/syscalls.c → stepper/steppermotor/Core/Src/syscalls.c
View File
RTC/Core/Src/sysmem.c → stepper/steppermotor/Core/Src/sysmem.c
View File
stepper/steppermotor/Core/Src/system_stm32l1xx.c
+408
View File
@@ -0,0 +1,408 @@
/**
******************************************************************************
* @file system_stm32l1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32l1xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32l1xx_system
* @{
*/
/** @addtogroup STM32L1xx_System_Private_Includes
* @{
*/
#include "stm32l1xx.h"
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000U) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM mounted
on STM32L152D_EVAL board as data memory */
/* #define DATA_IN_ExtSRAM */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 2097000U;
const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U};
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
/**
* @}
*/
/** @addtogroup STM32L1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @param None
* @retval None
*/
void SystemInit (void)
{
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock according to Clock Register Values
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is MSI, SystemCoreClock will contain the MSI
* value as defined by the MSI range.
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
SystemCoreClock = (32768 * (1 << (msirange + 1)));
break;
case 0x04: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x08: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x0C: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
pllmul = PLLMulTable[(pllmul >> 18)];
plldiv = (plldiv >> 22) + 1;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
if (pllsource == 0x00)
{
/* HSI oscillator clock selected as PLL clock entry */
SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
}
else
{
/* HSE selected as PLL clock entry */
SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
}
break;
default: /* MSI used as system clock */
msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
SystemCoreClock = (32768 * (1 << (msirange + 1)));
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in SystemInit() function before jump to main.
* This function configures the external SRAM mounted on STM32L152D_EVAL board
* This SRAM will be used as program data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg = 0;
/* Flash 1 wait state */
FLASH->ACR |= FLASH_ACR_LATENCY;
/* Power enable */
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN);
/* Select the Voltage Range 1 (1.8 V) */
PWR->CR = PWR_CR_VOS_0;
/* Wait Until the Voltage Regulator is ready */
while((PWR->CSR & PWR_CSR_VOSF) != RESET)
{
}
/*-- GPIOs Configuration -----------------------------------------------------*/
/*
+-------------------+--------------------+------------------+------------------+
+ SRAM pins assignment +
+-------------------+--------------------+------------------+------------------+
| PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 |
| PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 |
| PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 |
| PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 |
| PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 |
| PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 |
| PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 |
| PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+
| PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 |
| PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 |
| PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+
| PD15 <-> FSMC_D1 |--------------------+
+-------------------+
*/
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
RCC->AHBENR = 0x000080D8;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN);
/* Connect PDx pins to FSMC Alternate function */
GPIOD->AFR[0] = 0x00CC00CC;
GPIOD->AFR[1] = 0xCCCCCCCC;
/* Configure PDx pins in Alternate function mode */
GPIOD->MODER = 0xAAAA0A0A;
/* Configure PDx pins speed to 40 MHz */
GPIOD->OSPEEDR = 0xFFFF0F0F;
/* Configure PDx pins Output type to push-pull */
GPIOD->OTYPER = 0x00000000;
/* No pull-up, pull-down for PDx pins */
GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FSMC Alternate function */
GPIOE->AFR[0] = 0xC00000CC;
GPIOE->AFR[1] = 0xCCCCCCCC;
/* Configure PEx pins in Alternate function mode */
GPIOE->MODER = 0xAAAA800A;
/* Configure PEx pins speed to 40 MHz */
GPIOE->OSPEEDR = 0xFFFFC00F;
/* Configure PEx pins Output type to push-pull */
GPIOE->OTYPER = 0x00000000;
/* No pull-up, pull-down for PEx pins */
GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FSMC Alternate function */
GPIOF->AFR[0] = 0x00CCCCCC;
GPIOF->AFR[1] = 0xCCCC0000;
/* Configure PFx pins in Alternate function mode */
GPIOF->MODER = 0xAA000AAA;
/* Configure PFx pins speed to 40 MHz */
GPIOF->OSPEEDR = 0xFF000FFF;
/* Configure PFx pins Output type to push-pull */
GPIOF->OTYPER = 0x00000000;
/* No pull-up, pull-down for PFx pins */
GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FSMC Alternate function */
GPIOG->AFR[0] = 0x00CCCCCC;
GPIOG->AFR[1] = 0x00000C00;
/* Configure PGx pins in Alternate function mode */
GPIOG->MODER = 0x00200AAA;
/* Configure PGx pins speed to 40 MHz */
GPIOG->OSPEEDR = 0x00300FFF;
/* Configure PGx pins Output type to push-pull */
GPIOG->OTYPER = 0x00000000;
/* No pull-up, pull-down for PGx pins */
GPIOG->PUPDR = 0x00000000;
/*-- FSMC Configuration ------------------------------------------------------*/
/* Enable the FSMC interface clock */
RCC->AHBENR = 0x400080D8;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
(void)(tmpreg);
/* Configure and enable Bank1_SRAM3 */
FSMC_Bank1->BTCR[4] = 0x00001011;
FSMC_Bank1->BTCR[5] = 0x00000300;
FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF;
/*
Bank1_SRAM3 is configured as follow:
p.FSMC_AddressSetupTime = 0;
p.FSMC_AddressHoldTime = 0;
p.FSMC_DataSetupTime = 3;
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_CLKDivision = 0;
p.FSMC_DataLatency = 0;
p.FSMC_AccessMode = FSMC_AccessMode_A;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
*/
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32L151xD || STM32L152xD || STM32L162xD */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stepper/steppermotor/Core/Src/x_nucleo_ihm05a1_stm32l1xx.c
+631
View File
@@ -0,0 +1,631 @@
/**
******************************************************************************
* @file x_nucleo_ihm05a1_stm32l0xx.c
* @author IPC Rennes
* @version V1.5.0
* @date June 1st, 2018
* @brief BSP driver for x-nucleo-ihm05a1 Nucleo extension board
* (based on L6208)
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "x_nucleo_ihm05a1_stm32l1xx.h"
#include "motor.h"
/** @addtogroup BSP
* @{
*/
/** @defgroup X_NUCLEO_IHM05A1_STM32L0XX NUCLEO IHM05A1 STM32L0XX
* @{
*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup IHM05A1_Private_Constants IHM05A1 Private Constants
* @{
*/
/// Tick frequency (Hz)
#define TIMER_TICK_FREQUENCY (10000)
/// Tick Timer Prescaler
#define TIMER_TICK_PRESCALER (64)
/// MCU wait time after power bridges are enabled
#define BRIDGE_TURN_ON_DELAY (10)
/**
* @}
*/
/* Private variables ---------------------------------------------------------*/
/** @defgroup IHM05A1_Board_Private_Variables IHM05A1 Board Private Variables
* @{
*/
/// L6208 timer handler for VREFA PWM
TIM_HandleTypeDef hTimVrefaPwm;
/// L6208 timer handler for VREFB PWM
TIM_HandleTypeDef hTimVrefbPwm;
/// L6208 timer handler for the tick
TIM_HandleTypeDef hTimTick;
/**
* @}
*/
/** @defgroup IHM05A1_Board_Private_Function_Prototypes IHM05A1 Board Private Function Prototypes
* @{
*/
void L6208_Board_CLOCK_PIN_Reset(void); //Reset the clock pin
void L6208_Board_CLOCK_PIN_Set(void); //Set the clock pin
void L6208_Board_CONTROL_PIN_Reset(void); //Reset the control pin
void L6208_Board_CONTROL_PIN_Set(void); //Set the control pin
void L6208_Board_Delay(uint32_t delay); //Delay of the requested number of milliseconds
void L6208_Board_DIR_PIN_Reset(void); //Reset the dir pin
void L6208_Board_DIR_PIN_Set(void); //Set the dir pin
void L6208_Board_Disable(void); //Disable the power bridges (leave the output bridges HiZ)
void L6208_Board_DisableIrq(void); //Disable Irq
void L6208_Board_Enable(void); //Enable the power bridges (leave the output bridges HiZ)
void L6208_Board_EnableIrq(void); //Disable Irq
uint32_t L6208_Board_FLAG_PIN_GetState(void); //Returns the EN pin state
void L6208_Board_GpioInit(void); //Initialise GPIOs used for L6208
void L6208_Board_HALF_FULL_PIN_Reset(void); //Reset the half full pin
void L6208_Board_HALF_FULL_PIN_Set(void); //Set the half full pin
bool L6208_Board_VrefPwmInit(uint8_t bridgeId, uint32_t pwmFreq); //Initialize the VREFA or VREFB PWM
void L6208_Board_ReleaseReset(void); //Release the reset pin
void L6208_Board_Reset(void); //Reset the reset pin
uint32_t L6208_Board_TickGetFreq(void); //Get the tick frequency in Hz
void L6208_Board_TickInit(void); //Initialize the tick
void L6208_Board_TickStart(void); //Start the timer for the tick by using the set tick frequency
void L6208_Board_TickStop(void); //Stop the timer for the tick
bool L6208_Board_VrefPwmFreqCheck(uint32_t newFreq); //Check that the new VREFA and VREFB PWM frequency is nor too low nor too high
uint32_t L6208_Board_VrefPwmGetPeriod(void); //Get current VREF PWM period duration
bool L6208_Board_VrefPwmSetDutyCycle(uint8_t bridgeId,\
uint16_t value,\
bool valueIsPwmDutyCycle); //Set duty cycle of VREFA or VREFB PWM
bool L6208_Board_VrefPwmStart(uint8_t bridgeId,\
uint32_t pwmFreq); //Start the timer for the VREFA or VREFB PWM
bool L6208_Board_VrefPwmStop(uint8_t bridgeId); //Stop the timer for the VREFA or VREFB PWM
/**
* @}
*/
/** @defgroup IHM05A1_Board_Private_Functions IHM05A1 Board Private Functions
* @{
*/
/******************************************************//**
* @brief This function provides an accurate delay in milliseconds
* @param[in] delay time length in milliseconds
* @retval None
**********************************************************/
void L6208_Board_Delay(uint32_t delay)
{
HAL_Delay(delay);
}
/******************************************************//**
* @brief This function disable the interruptions
* @retval None
**********************************************************/
void L6208_Board_DisableIrq(void)
{
//__disable_irq();
}
/******************************************************//**
* @brief This function enable the interruptions
* @retval None
**********************************************************/
void L6208_Board_EnableIrq(void)
{
//__enable_irq();
}
/******************************************************//**
* @brief Start the L6208 library
* @retval None
**********************************************************/
void L6208_Board_GpioInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* GPIO Ports Clock Enable */
__GPIOC_CLK_ENABLE();
__GPIOA_CLK_ENABLE();
__GPIOB_CLK_ENABLE();
/* Configure L6208 - EN pin -------------------------------*/
/* When this pin is set low, it is configured just before as */
/* GPIO_MODE_OUTPUT_PP with GPIO_NOPULL */
/* When this pin is set high, it is just after configured for OCD and OVT */
/* as GPIO_MODE_IT_FALLING with GPIO_PULLUP */
L6208_Board_Disable();
/* Set Priority of External Line Interrupt used for the OCD OVT interrupt*/
HAL_NVIC_SetPriority(FLAG_EXTI_LINE_IRQn, BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PRIORITY, 0);
/* Enable the External Line Interrupt used for the OCD OVT interrupt*/
HAL_NVIC_EnableIRQ(FLAG_EXTI_LINE_IRQn);
/* Configure L6208 - CW/CCW pin ----------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_DIR_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_DIR_PORT, &GPIO_InitStruct);
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_DIR_PORT, BSP_MOTOR_CONTROL_BOARD_DIR_PIN, GPIO_PIN_RESET);
/* Configure L6208 - HALF/FULL pin -------------------------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PORT, &GPIO_InitStruct);
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PORT, BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PIN, GPIO_PIN_RESET);
/* Configure L6208 - CONTROL pin -------------------------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_CONTROL_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_CONTROL_PORT, &GPIO_InitStruct);
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_CONTROL_PORT, BSP_MOTOR_CONTROL_BOARD_CONTROL_PIN, GPIO_PIN_RESET);
/* Configure L6208 - CLOCK pin -------------------------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_CLOCK_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_CLOCK_PORT, &GPIO_InitStruct);
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_CLOCK_PORT, BSP_MOTOR_CONTROL_BOARD_CLOCK_PIN, GPIO_PIN_RESET);
/* Configure L6208 - STBY/RESET pin -------------------------------------*/
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_RESET_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_RESET_PORT, &GPIO_InitStruct);
L6208_Board_ReleaseReset();
}
/******************************************************//**
* @brief Initialize the tick
* @retval None
**********************************************************/
void L6208_Board_TickInit(void)
{
static TIM_OC_InitTypeDef sConfigOC;
static TIM_MasterConfigTypeDef sMasterConfig;
static TIM_ClockConfigTypeDef sClockSourceConfig;
hTimTick.Instance = BSP_MOTOR_CONTROL_BOARD_TIMER_TICK;
hTimTick.Init.Period = (HAL_RCC_GetSysClockFreq() / (TIMER_TICK_PRESCALER * TIMER_TICK_FREQUENCY)) - 1;
hTimTick.Init.Prescaler = TIMER_TICK_PRESCALER -1;
hTimTick.Init.ClockDivision = 0;
hTimTick.Init.CounterMode = TIM_COUNTERMODE_UP;
HAL_TIM_PWM_Init(&hTimTick);
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
HAL_TIM_ConfigClockSource(&hTimTick, &sClockSourceConfig);
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
HAL_TIM_PWM_ConfigChannel(&hTimTick, &sConfigOC, BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_TICK);
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
HAL_TIMEx_MasterConfigSynchronization(&hTimTick, &sMasterConfig);
}
/******************************************************//**
* @brief Start the timer for the tick by using the set tick frequency
* @retval None
**********************************************************/
void L6208_Board_TickStart(void)
{
uint32_t period = (HAL_RCC_GetSysClockFreq() / (TIMER_TICK_PRESCALER * TIMER_TICK_FREQUENCY)) - 1;
__HAL_TIM_SetAutoreload(&hTimTick, period);
__HAL_TIM_SetCompare(&hTimTick, BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_TICK, period >> 1);
HAL_TIM_PWM_Start_IT(&hTimTick, BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_TICK);
}
/******************************************************//**
* @brief Stop the timer for the tick
* @retval None
**********************************************************/
void L6208_Board_TickStop(void)
{
HAL_TIM_PWM_Stop_IT(&hTimTick, BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_TICK);
}
/******************************************************//**
* @brief Get the tick timer frequency in Hz
* @retval The tick timer frequency in Hz
**********************************************************/
uint32_t L6208_Board_TickGetFreq(void)
{
return TIMER_TICK_FREQUENCY;
}
/******************************************************//**
* @brief Check that the frequency for the VREFA and VREFB PWM
* is high enough to prevent overflow in the computation of the
* micro stepping waveform sample for a maximum torque.
* @param[in] newFreq frequency in Hz of the PWM used to generate
* the reference voltage for the bridge
* @retval FALSE if frequency is too low or too high, else TRUE
**********************************************************/
bool L6208_Board_VrefPwmFreqCheck(uint32_t newFreq)
{
if (newFreq<=(HAL_RCC_GetSysClockFreq()>>16))
{
return FALSE;
}
else
{
return TRUE;
}
}
/******************************************************//**
* @brief Initialize the VREFA or VREFB PWM
* @param[in] bridgeId
* 0 for BRIDGE_A
* 1 for BRIDGE_B
* @param[in] pwmFreq frequency in Hz of the PWM used to generate the reference
* voltage for the bridge
* @retval FALSE if wrong timer handle is used, else TRUE
* @note None
**********************************************************/
bool L6208_Board_VrefPwmInit(uint8_t bridgeId, uint32_t pwmFreq)
{
static TIM_OC_InitTypeDef sConfigOC;
static TIM_MasterConfigTypeDef sMasterConfig;
static TIM_ClockConfigTypeDef sClockSourceConfig;
TIM_HandleTypeDef *pHTim = NULL;
uint32_t channel;
if (bridgeId == 0)
{
pHTim = &hTimVrefaPwm;
pHTim->Instance = BSP_MOTOR_CONTROL_BOARD_TIMER_VREFA_PWM;
pHTim->Init.Prescaler = 0;
pHTim->Init.Period = (HAL_RCC_GetSysClockFreq() / pwmFreq) - 1;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFA_PWM;
}
else if (bridgeId == 1)
{
pHTim = &hTimVrefbPwm;
pHTim->Instance = BSP_MOTOR_CONTROL_BOARD_TIMER_VREFB_PWM;
pHTim->Init.Prescaler = 0;
pHTim->Init.Period = (HAL_RCC_GetSysClockFreq() / pwmFreq) - 1;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFB_PWM;
}
else
{
return FALSE;
}
pHTim->Init.CounterMode = TIM_COUNTERMODE_UP;
pHTim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
HAL_TIM_PWM_Init(pHTim);
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
HAL_TIM_ConfigClockSource(pHTim, &sClockSourceConfig);
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 0;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
HAL_TIM_PWM_ConfigChannel(pHTim, &sConfigOC, channel);
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
HAL_TIMEx_MasterConfigSynchronization(pHTim, &sMasterConfig);
return TRUE;
}
/******************************************************//**
* @brief Set duty cycle of VREFA or VREFB PWM
* @param[in] bridgeId
* 0 for BRIDGE_A
* 1 for BRIDGE_B
* @param[in] value pulse length or PWM duty cycle: 0 - 100 %
* @param[in] valueIsPwmDutyCycle must be TRUE if value is a PWM duty cycle
* @retval FALSE if wrong timer handle is used, else TRUE
**********************************************************/
bool L6208_Board_VrefPwmSetDutyCycle(uint8_t bridgeId, uint16_t value, bool valueIsPwmDutyCycle)
{
TIM_HandleTypeDef *pHTim = NULL;
uint32_t channel;
if (bridgeId == 0)
{
pHTim = &hTimVrefaPwm;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFA_PWM;
}
else if (bridgeId == 1)
{
pHTim = &hTimVrefbPwm;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFB_PWM;
}
else
{
return 0;
}
// PWM or OC Channel pulse length
if(valueIsPwmDutyCycle)
{
if (value > 100) value = 100;
value = (uint16_t)(((uint32_t)pHTim->Init.Period * (uint32_t)value) / 100);
}
__HAL_TIM_SetCompare(pHTim, channel, value);
return 1;
}
/******************************************************//**
* @brief Start the timer for the VREFA or VREFB PWM
* @param[in] bridgeId
* 0 for BRIDGE_A
* 1 for BRIDGE_B
* @param[in] pwmFreq frequency in Hz of the PWM used to generate the reference
* voltage for the bridge
* @retval FALSE if wrong timer handle is used, else TRUE
**********************************************************/
bool L6208_Board_VrefPwmStart(uint8_t bridgeId, uint32_t pwmFreq)
{
TIM_HandleTypeDef *pHTim = NULL;
uint32_t period;
uint32_t channel;
if (bridgeId == 0)
{
pHTim = &hTimVrefaPwm;
period = (HAL_RCC_GetSysClockFreq() / pwmFreq) - 1;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFA_PWM;
}
else if (bridgeId == 1)
{
pHTim = &hTimVrefbPwm;
period = (HAL_RCC_GetSysClockFreq() / pwmFreq) - 1;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFB_PWM;
}
else
{
return FALSE;
}
__HAL_TIM_SetAutoreload(pHTim, period);
HAL_TIM_PWM_Start(pHTim, channel);
return TRUE;
}
/******************************************************//**
* @brief Stop the VREFA or VREFB PWM
* @param[in] bridgeId
* 0 for BRIDGE_A
* 1 for BRIDGE_B
* @retval None
**********************************************************/
bool L6208_Board_VrefPwmStop(uint8_t bridgeId)
{
TIM_HandleTypeDef *pHTim = NULL;
uint32_t channel;
if (bridgeId == 0)
{
pHTim = &hTimVrefaPwm;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFA_PWM;
}
else if (bridgeId == 1)
{
pHTim = &hTimVrefbPwm;
channel = BSP_MOTOR_CONTROL_BOARD_CHAN_TIMER_VREFB_PWM;
}
else
{
return FALSE;
}
HAL_TIM_PWM_Stop(pHTim, channel);
return TRUE;
}
/******************************************************//**
* @brief Get current VREF PWM period duration
* @retval the current VREF PWM period duration
* @note hTimVrefbPwm.Init.Period is the same as hTimVrefaPwm.Init.Period
**********************************************************/
uint32_t L6208_Board_VrefPwmGetPeriod(void)
{
return ((uint32_t)hTimVrefaPwm.Init.Period);
}
/******************************************************//**
* @brief Releases the L6208 reset (pin set to High) of all devices
* @retval None
**********************************************************/
void L6208_Board_ReleaseReset(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_RESET_PORT, BSP_MOTOR_CONTROL_BOARD_RESET_PIN, GPIO_PIN_SET);
}
/******************************************************//**
* @brief Resets the L6208 (reset pin set to low) of all devices
* @retval None
**********************************************************/
void L6208_Board_Reset(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_RESET_PORT, BSP_MOTOR_CONTROL_BOARD_RESET_PIN, GPIO_PIN_RESET);
}
/******************************************************//**
* @brief Set the L6208 CONTROL pin
* @retval None
**********************************************************/
void L6208_Board_CONTROL_PIN_Set(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_CONTROL_PORT, BSP_MOTOR_CONTROL_BOARD_CONTROL_PIN, GPIO_PIN_SET);
}
/******************************************************//**
* @brief Reset the L6208 CONTROL pin
* @retval None
**********************************************************/
void L6208_Board_CONTROL_PIN_Reset(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_CONTROL_PORT, BSP_MOTOR_CONTROL_BOARD_CONTROL_PIN, GPIO_PIN_RESET);
}
/******************************************************//**
* @brief Set the L6208 CLOCK pin
* @retval None
**********************************************************/
void L6208_Board_CLOCK_PIN_Set(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_CLOCK_PORT, BSP_MOTOR_CONTROL_BOARD_CLOCK_PIN, GPIO_PIN_SET);
}
/******************************************************//**
* @brief Reset the L6208 CLOCK pin
* @retval None
**********************************************************/
void L6208_Board_CLOCK_PIN_Reset(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_CLOCK_PORT, BSP_MOTOR_CONTROL_BOARD_CLOCK_PIN, GPIO_PIN_RESET);
}
/******************************************************//**
* @brief Set the L6208 HALF_FULL pin
* @retval None
**********************************************************/
void L6208_Board_HALF_FULL_PIN_Set(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PORT, BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PIN, GPIO_PIN_SET);
}
/******************************************************//**
* @brief Reset the L6208 HALF_FULL pin
* @retval None
**********************************************************/
void L6208_Board_HALF_FULL_PIN_Reset(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PORT, BSP_MOTOR_CONTROL_BOARD_HALF_FULL_PIN, GPIO_PIN_RESET);
}
/******************************************************//**
* @brief Set the L6208 DIR pin
* @retval None
**********************************************************/
void L6208_Board_DIR_PIN_Set(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_DIR_PORT, BSP_MOTOR_CONTROL_BOARD_DIR_PIN, GPIO_PIN_SET);
}
/******************************************************//**
* @brief Reset the L6208 DIR pin
* @retval None
**********************************************************/
void L6208_Board_DIR_PIN_Reset(void)
{
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_DIR_PORT, BSP_MOTOR_CONTROL_BOARD_DIR_PIN, GPIO_PIN_RESET);
}
/******************************************************//**
* @brief Returns the FLAG pin state.
* @retval The FLAG pin value.
**********************************************************/
uint32_t L6208_Board_FLAG_PIN_GetState(void)
{
return HAL_GPIO_ReadPin(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT, BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN);
}
/******************************************************//**
* @brief Disable the power bridges (leave the output bridges HiZ)
* @retval None
**********************************************************/
void L6208_Board_Disable(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Configure the GPIO connected to EN pin as an output */
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT, &GPIO_InitStruct);
__disable_irq();
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT, BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN, GPIO_PIN_RESET);
__HAL_GPIO_EXTI_CLEAR_IT(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN);
__enable_irq();
}
/******************************************************//**
* @brief Enable the power bridges (leave the output bridges HiZ)
* @retval None
**********************************************************/
void L6208_Board_Enable(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
HAL_GPIO_WritePin(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT, BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN, GPIO_PIN_SET);
HAL_Delay(BRIDGE_TURN_ON_DELAY);
/* Configure the GPIO connected to EN pin to take interrupt */
GPIO_InitStruct.Pin = BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PORT, &GPIO_InitStruct);
__HAL_GPIO_EXTI_CLEAR_IT(BSP_MOTOR_CONTROL_BOARD_EN_AND_FLAG_PIN);
HAL_NVIC_ClearPendingIRQ(FLAG_EXTI_LINE_IRQn);
HAL_NVIC_EnableIRQ(FLAG_EXTI_LINE_IRQn);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC/Core/Src/x_nucleo_ihmxx.c → stepper/steppermotor/Core/Src/x_nucleo_ihmxx.c
View File
stepper/steppermotor/Core/Startup/startup_stm32l152retx.s
+409
View File
@@ -0,0 +1,409 @@
/**
******************************************************************************
* @file startup_stm32l152xe.s
* @author MCD Application Team
* @brief STM32L152XE Devices vector table for GCC toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
* @attention
*
* Copyright (c) 2017 STMicroelectronics. All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word TAMPER_STAMP_IRQHandler
.word RTC_WKUP_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
.word ADC1_IRQHandler
.word USB_HP_IRQHandler
.word USB_LP_IRQHandler
.word DAC_IRQHandler
.word COMP_IRQHandler
.word EXTI9_5_IRQHandler
.word LCD_IRQHandler
.word TIM9_IRQHandler
.word TIM10_IRQHandler
.word TIM11_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USB_FS_WKUP_IRQHandler
.word TIM6_IRQHandler
.word TIM7_IRQHandler
.word 0
.word TIM5_IRQHandler
.word SPI3_IRQHandler
.word UART4_IRQHandler
.word UART5_IRQHandler
.word DMA2_Channel1_IRQHandler
.word DMA2_Channel2_IRQHandler
.word DMA2_Channel3_IRQHandler
.word DMA2_Channel4_IRQHandler
.word DMA2_Channel5_IRQHandler
.word 0
.word COMP_ACQ_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32L152XE devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMPER_STAMP_IRQHandler
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak ADC1_IRQHandler
.thumb_set ADC1_IRQHandler,Default_Handler
.weak USB_HP_IRQHandler
.thumb_set USB_HP_IRQHandler,Default_Handler
.weak USB_LP_IRQHandler
.thumb_set USB_LP_IRQHandler,Default_Handler
.weak DAC_IRQHandler
.thumb_set DAC_IRQHandler,Default_Handler
.weak COMP_IRQHandler
.thumb_set COMP_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak LCD_IRQHandler
.thumb_set LCD_IRQHandler,Default_Handler
.weak TIM9_IRQHandler
.thumb_set TIM9_IRQHandler,Default_Handler
.weak TIM10_IRQHandler
.thumb_set TIM10_IRQHandler,Default_Handler
.weak TIM11_IRQHandler
.thumb_set TIM11_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USB_FS_WKUP_IRQHandler
.thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
.weak TIM6_IRQHandler
.thumb_set TIM6_IRQHandler,Default_Handler
.weak TIM7_IRQHandler
.thumb_set TIM7_IRQHandler,Default_Handler
.weak TIM5_IRQHandler
.thumb_set TIM5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak DMA2_Channel1_IRQHandler
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
.weak DMA2_Channel2_IRQHandler
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
.weak DMA2_Channel3_IRQHandler
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
.weak DMA2_Channel4_IRQHandler
.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
.weak DMA2_Channel5_IRQHandler
.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
.weak COMP_ACQ_IRQHandler
.thumb_set COMP_ACQ_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stepper/steppermotor/Debug/Core/Src/l6208.d
+8
View File
@@ -0,0 +1,8 @@
Core/Src/l6208.o: ../Core/Src/l6208.c ../Core/Inc/l6208.h \
../Core/Inc/l6208_target_config.h ../Core/Inc/motor.h
../Core/Inc/l6208.h:
../Core/Inc/l6208_target_config.h:
../Core/Inc/motor.h:
stepper/steppermotor/Debug/Core/Src/l6208.o
BIN
View File
Binary file not shown.
stepper/steppermotor/Debug/Core/Src/l6208.su
+75
View File
@@ -0,0 +1,75 @@
l6208.c:259:13:L6208_GetMotorHandle 4 static
l6208.c:269:6:L6208_Init 16 static
l6208.c:308:10:L6208_ReadId 4 static
l6208.c:321:6:L6208_AttachErrorHandler 16 static
l6208.c:335:6:L6208_AttachFlagInterrupt 16 static
l6208.c:344:9:L6208_CheckStatusHw 8 static
l6208.c:361:6:L6208_Disable 16 static
l6208.c:372:6:L6208_ErrorHandler 16 static
l6208.c:392:6:L6208_Enable 16 static
l6208.c:402:6:L6208_FlagInterruptHandler 8 static
l6208.c:424:10:L6208_GetAcceleration 16 static
l6208.c:437:10:L6208_GetCurrentSpeed 40 static
l6208.c:458:18:L6208_GetDecayMode 16 static
l6208.c:472:10:L6208_GetDeceleration 16 static
l6208.c:482:12:L6208_GetDirection 16 static
l6208.c:498:10:L6208_GetFwVersion 4 static
l6208.c:508:9:L6208_GetMark 16 static
l6208.c:521:10:L6208_GetMaxSpeed 16 static
l6208.c:534:10:L6208_GetMinSpeed 16 static
l6208.c:544:14:L6208_GetMotionState 16 static
l6208.c:555:9:L6208_GetPosition 16 static
l6208.c:565:17:L6208_GetStepMode 16 static
l6208.c:575:17:L6208_GetStopMode 16 static
l6208.c:594:9:L6208_GetTorque 24 static
l6208.c:625:6:L6208_GoHome 16 static
l6208.c:635:6:L6208_GoMark 16 static
l6208.c:653:6:L6208_GoTo 24 static
l6208.c:702:6:L6208_GoToDir 24 static
l6208.c:741:6:L6208_HardHiZ 16 static
l6208.c:765:6:L6208_HardStop 16 static
l6208.c:793:6:L6208_Move 16 static
l6208.c:821:6:L6208_ReleaseReset 16 static
l6208.c:831:6:L6208_Reset 16 static
l6208.c:841:6:L6208_ResetDevice 8 static
l6208.c:856:6:L6208_Run 16 static
l6208.c:880:6:L6208_SetAcceleration 24 static
l6208.c:901:6:L6208_SetDecayMode 16 static
l6208.c:924:6:L6208_SetDeceleration 24 static
l6208.c:948:6:L6208_SetDirection 16 static
l6208.c:1012:6:L6208_SetHome 16 static
l6208.c:1030:6:L6208_SetMark 16 static
l6208.c:1044:6:L6208_SetMaxSpeed 16 static
l6208.c:1066:6:L6208_SetMinSpeed 16 static
l6208.c:1085:6:L6208_SetNbDevices 16 static
l6208.c:1104:6:L6208_SetStepMode 16 static
l6208.c:1180:6:L6208_SetStopMode 16 static
l6208.c:1200:6:L6208_SetTorque 16 static
l6208.c:1236:6:L6208_SoftStop 16 static
l6208.c:1248:6:L6208_TickHandler 24 static
l6208.c:1544:10:L6208_VrefPwmGetFreq 16 static
l6208.c:1556:6:L6208_VrefPwmSetFreq 16 static
l6208.c:1579:6:L6208_WaitWhileActive 16 static
l6208.c:1597:13:L6208_ClearSysFlag 16 static
l6208.c:1616:10:L6208_ComputeNbAccOrDecSteps 24 static
l6208.c:1666:10:L6208_ConvertAcceDecelRateValue 40 static
l6208.c:1696:6:L6208_DoAccel 16 static
l6208.c:1717:6:L6208_DoDecel 16 static
l6208.c:1739:6:L6208_DoRun 4 static
l6208.c:1748:9:L6208_GetMicrostepSample2Scale 4 static
l6208.c:1778:6:L6208_Indexmodeinit 24 static
l6208.c:1822:13:L6208_IsSysFlag 16 static
l6208.c:1831:6:L6208_ResetSteps 4 static
l6208.c:1849:10:L6208_ScaleWaveformSample 24 static
l6208.c:1868:6:L6208_ScaleWaveformTable 16 static
l6208.c:1885:6:L6208_SetDeviceParamsToGivenValues 16 static
l6208.c:1915:6:L6208_SetDeviceParamsToPredefinedValues 8 static
l6208.c:1944:6:L6208_SetMicrostepSample2Scale 16 static
l6208.c:1959:6:L6208_SetMicrostepSample2Update 16 static
l6208.c:1974:6:L6208_SetMotionState 16 static
l6208.c:1987:6:L6208_SetSpeed 40 static
l6208.c:2017:13:L6208_SetSysFlag 16 static
l6208.c:2026:6:L6208_StartMovement 16 static
l6208.c:2095:6:L6208_UpdateScanWaveformTable 16 static
l6208.c:2113:6:L6208_UstepWaveformHandling 8 static
l6208.c:2134:6:L6208_VectorCalc 16 static
stepper/steppermotor/Debug/Core/Src/main.d
+102
View File
@@ -0,0 +1,102 @@
Core/Src/main.o: ../Core/Src/main.c ../Core/Inc/main.h \
../Core/Inc/x_nucleo_ihmxx.h ../Core/Inc/motor.h ../Core/Inc/l6208.h \
../Core/Inc/l6208_target_config.h \
../Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h ../Core/Inc/stm32l1xx_nucleo.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Core/Inc/main.h:
../Core/Inc/x_nucleo_ihmxx.h:
../Core/Inc/motor.h:
../Core/Inc/l6208.h:
../Core/Inc/l6208_target_config.h:
../Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h:
../Core/Inc/stm32l1xx_nucleo.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
stepper/steppermotor/Debug/Core/Src/main.o
BIN
View File
Binary file not shown.
stepper/steppermotor/Debug/Core/Src/main.su
+6
View File
@@ -0,0 +1,6 @@
main.c:79:5:main 24 static
main.c:468:6:SystemClock_Config 80 static
main.c:510:6:MyFlagInterruptHandler 8 static
main.c:521:6:MyErrorHandler 16 static
main.c:538:6:ButtonHandler 8 static
main.c:558:6:Error_Handler 4 static
stepper/steppermotor/Debug/Core/Src/stm32l1xx_hal_msp.d
+102
View File
@@ -0,0 +1,102 @@
Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c \
../Core/Inc/main.h ../Core/Inc/x_nucleo_ihmxx.h ../Core/Inc/motor.h \
../Core/Inc/l6208.h ../Core/Inc/l6208_target_config.h \
../Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h ../Core/Inc/stm32l1xx_nucleo.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Core/Inc/main.h:
../Core/Inc/x_nucleo_ihmxx.h:
../Core/Inc/motor.h:
../Core/Inc/l6208.h:
../Core/Inc/l6208_target_config.h:
../Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h:
../Core/Inc/stm32l1xx_nucleo.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
stepper/steppermotor/Debug/Core/Src/stm32l1xx_hal_msp.o
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stepper/steppermotor/Debug/Core/Src/stm32l1xx_hal_msp.su
+3
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stm32l1xx_hal_msp.c:64:6:HAL_MspInit 24 static
stm32l1xx_hal_msp.c:89:6:HAL_UART_MspInit 48 static
stm32l1xx_hal_msp.c:125:6:HAL_UART_MspDeInit 16 static
stepper/steppermotor/Debug/Core/Src/stm32l1xx_it.d
+105
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@@ -0,0 +1,105 @@
Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c ../Core/Inc/main.h \
../Core/Inc/x_nucleo_ihmxx.h ../Core/Inc/motor.h ../Core/Inc/l6208.h \
../Core/Inc/l6208_target_config.h \
../Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h ../Core/Inc/stm32l1xx_nucleo.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h \
../Core/Inc/stm32l1xx_it.h
../Core/Inc/main.h:
../Core/Inc/x_nucleo_ihmxx.h:
../Core/Inc/motor.h:
../Core/Inc/l6208.h:
../Core/Inc/l6208_target_config.h:
../Core/Inc/x_nucleo_ihm05a1_stm32l1xx.h:
../Core/Inc/stm32l1xx_nucleo.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
../Core/Inc/stm32l1xx_it.h:
stepper/steppermotor/Debug/Core/Src/stm32l1xx_it.o
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stepper/steppermotor/Debug/Core/Src/stm32l1xx_it.su
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stm32l1xx_it.c:70:6:NMI_Handler 4 static
stm32l1xx_it.c:85:6:HardFault_Handler 4 static
stm32l1xx_it.c:100:6:MemManage_Handler 4 static
stm32l1xx_it.c:115:6:BusFault_Handler 4 static
stm32l1xx_it.c:130:6:UsageFault_Handler 4 static
stm32l1xx_it.c:145:6:SVC_Handler 4 static
stm32l1xx_it.c:158:6:DebugMon_Handler 4 static
stm32l1xx_it.c:171:6:PendSV_Handler 4 static
stm32l1xx_it.c:184:6:SysTick_Handler 8 static
stepper/steppermotor/Debug/Core/Src/stm32l1xx_nucleo.d
+88
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@@ -0,0 +1,88 @@
Core/Src/stm32l1xx_nucleo.o: ../Core/Src/stm32l1xx_nucleo.c \
../Core/Inc/stm32l1xx_nucleo.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Core/Inc/stm32l1xx_nucleo.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
stepper/steppermotor/Debug/Core/Src/stm32l1xx_nucleo.o
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stepper/steppermotor/Debug/Core/Src/stm32l1xx_nucleo.su
+9
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@@ -0,0 +1,9 @@
stm32l1xx_nucleo.c:143:10:BSP_GetVersion 4 static
stm32l1xx_nucleo.c:159:6:BSP_LED_Init 40 static
stm32l1xx_nucleo.c:186:6:BSP_LED_DeInit 40 static
stm32l1xx_nucleo.c:204:6:BSP_LED_On 16 static
stm32l1xx_nucleo.c:216:6:BSP_LED_Off 16 static
stm32l1xx_nucleo.c:228:6:BSP_LED_Toggle 16 static
stm32l1xx_nucleo.c:252:6:BSP_PB_Init 40 static
stm32l1xx_nucleo.c:290:6:BSP_PB_DeInit 40 static
stm32l1xx_nucleo.c:305:10:BSP_PB_GetState 16 static
stepper/steppermotor/Debug/Core/Src/subdir.mk
+64
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@@ -0,0 +1,64 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../Core/Src/l6208.c \
../Core/Src/main.c \
../Core/Src/stm32l1xx_hal_msp.c \
../Core/Src/stm32l1xx_it.c \
../Core/Src/stm32l1xx_nucleo.c \
../Core/Src/syscalls.c \
../Core/Src/sysmem.c \
../Core/Src/system_stm32l1xx.c \
../Core/Src/x_nucleo_ihm05a1_stm32l1xx.c \
../Core/Src/x_nucleo_ihmxx.c
OBJS += \
./Core/Src/l6208.o \
./Core/Src/main.o \
./Core/Src/stm32l1xx_hal_msp.o \
./Core/Src/stm32l1xx_it.o \
./Core/Src/stm32l1xx_nucleo.o \
./Core/Src/syscalls.o \
./Core/Src/sysmem.o \
./Core/Src/system_stm32l1xx.o \
./Core/Src/x_nucleo_ihm05a1_stm32l1xx.o \
./Core/Src/x_nucleo_ihmxx.o
C_DEPS += \
./Core/Src/l6208.d \
./Core/Src/main.d \
./Core/Src/stm32l1xx_hal_msp.d \
./Core/Src/stm32l1xx_it.d \
./Core/Src/stm32l1xx_nucleo.d \
./Core/Src/syscalls.d \
./Core/Src/sysmem.d \
./Core/Src/system_stm32l1xx.d \
./Core/Src/x_nucleo_ihm05a1_stm32l1xx.d \
./Core/Src/x_nucleo_ihmxx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Src/l6208.o: ../Core/Src/l6208.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/l6208.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/main.o: ../Core/Src/main.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/main.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/stm32l1xx_hal_msp.o: ../Core/Src/stm32l1xx_hal_msp.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_hal_msp.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/stm32l1xx_it.o: ../Core/Src/stm32l1xx_it.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_it.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/stm32l1xx_nucleo.o: ../Core/Src/stm32l1xx_nucleo.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/stm32l1xx_nucleo.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/syscalls.o: ../Core/Src/syscalls.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/syscalls.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/sysmem.o: ../Core/Src/sysmem.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/sysmem.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/system_stm32l1xx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/x_nucleo_ihm05a1_stm32l1xx.o: ../Core/Src/x_nucleo_ihm05a1_stm32l1xx.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/x_nucleo_ihm05a1_stm32l1xx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
Core/Src/x_nucleo_ihmxx.o: ../Core/Src/x_nucleo_ihmxx.c
arm-none-eabi-gcc "$<" -mcpu=cortex-m3 -std=gnu11 -g3 -DUSE_HAL_DRIVER -DSTM32L152xE -DDEBUG -c -I../Core/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc -I../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy -I../Drivers/CMSIS/Device/ST/STM32L1xx/Include -I../Drivers/CMSIS/Include -O0 -ffunction-sections -fdata-sections -Wall -fstack-usage -MMD -MP -MF"Core/Src/x_nucleo_ihmxx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@"
stepper/steppermotor/Debug/Core/Src/syscalls.d
+1
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@@ -0,0 +1 @@
Core/Src/syscalls.o: ../Core/Src/syscalls.c
stepper/steppermotor/Debug/Core/Src/syscalls.o
BIN
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stepper/steppermotor/Debug/Core/Src/syscalls.su
+18
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@@ -0,0 +1,18 @@
syscalls.c:48:6:initialise_monitor_handles 4 static
syscalls.c:52:5:_getpid 4 static
syscalls.c:57:5:_kill 16 static
syscalls.c:63:6:_exit 16 static
syscalls.c:69:27:_read 32 static
syscalls.c:81:27:_write 32 static
syscalls.c:92:5:_close 16 static
syscalls.c:98:5:_fstat 16 static
syscalls.c:104:5:_isatty 16 static
syscalls.c:109:5:_lseek 24 static
syscalls.c:114:5:_open 12 static
syscalls.c:120:5:_wait 16 static
syscalls.c:126:5:_unlink 16 static
syscalls.c:132:5:_times 16 static
syscalls.c:137:5:_stat 16 static
syscalls.c:143:5:_link 16 static
syscalls.c:149:5:_fork 8 static
syscalls.c:155:5:_execve 24 static
stepper/steppermotor/Debug/Core/Src/sysmem.d
+1
View File
@@ -0,0 +1 @@
Core/Src/sysmem.o: ../Core/Src/sysmem.c
stepper/steppermotor/Debug/Core/Src/sysmem.o
BIN
View File
Binary file not shown.
stepper/steppermotor/Debug/Core/Src/sysmem.su
+1
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@@ -0,0 +1 @@
sysmem.c:54:7:_sbrk 32 static
stepper/steppermotor/Debug/Core/Src/system_stm32l1xx.d
+85
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@@ -0,0 +1,85 @@
Core/Src/system_stm32l1xx.o: ../Core/Src/system_stm32l1xx.c \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h \
../Drivers/CMSIS/Include/core_cm3.h \
../Drivers/CMSIS/Include/cmsis_version.h \
../Drivers/CMSIS/Include/cmsis_compiler.h \
../Drivers/CMSIS/Include/cmsis_gcc.h \
../Drivers/CMSIS/Include/mpu_armv7.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l152xe.h:
../Drivers/CMSIS/Include/core_cm3.h:
../Drivers/CMSIS/Include/cmsis_version.h:
../Drivers/CMSIS/Include/cmsis_compiler.h:
../Drivers/CMSIS/Include/cmsis_gcc.h:
../Drivers/CMSIS/Include/mpu_armv7.h:
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/system_stm32l1xx.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h:
../Core/Inc/stm32l1xx_hal_conf.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_gpio_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_dma.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_cortex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_flash_ramfunc.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_pwr_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_tim_ex.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_uart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_usart.h:
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_exti.h:
stepper/steppermotor/Debug/Core/Src/system_stm32l1xx.o
BIN
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stepper/steppermotor/Debug/Core/Src/system_stm32l1xx.su
+2
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@@ -0,0 +1,2 @@
system_stm32l1xx.c:140:6:SystemInit 4 static
system_stm32l1xx.c:191:6:SystemCoreClockUpdate 32 static
stepper/steppermotor/Debug/Core/Src/x_nucleo_ihm05a1_stm32l1xx.su
+27
View File
@@ -0,0 +1,27 @@
x_nucleo_ihm05a1_stm32l1xx.c:133:6:L6208_Board_Delay 16 static
x_nucleo_ihm05a1_stm32l1xx.c:142:6:L6208_Board_DisableIrq 4 static
x_nucleo_ihm05a1_stm32l1xx.c:151:6:L6208_Board_EnableIrq 4 static
x_nucleo_ihm05a1_stm32l1xx.c:160:6:L6208_Board_GpioInit 40 static
x_nucleo_ihm05a1_stm32l1xx.c:227:6:L6208_Board_TickInit 8 static
x_nucleo_ihm05a1_stm32l1xx.c:258:6:L6208_Board_TickStart 16 static
x_nucleo_ihm05a1_stm32l1xx.c:271:6:L6208_Board_TickStop 8 static
x_nucleo_ihm05a1_stm32l1xx.c:280:10:L6208_Board_TickGetFreq 4 static
x_nucleo_ihm05a1_stm32l1xx.c:293:6:L6208_Board_VrefPwmFreqCheck 16 static
x_nucleo_ihm05a1_stm32l1xx.c:314:6:L6208_Board_VrefPwmInit 24 static
x_nucleo_ihm05a1_stm32l1xx.c:372:6:L6208_Board_VrefPwmSetDutyCycle 24 static
x_nucleo_ihm05a1_stm32l1xx.c:411:6:L6208_Board_VrefPwmStart 32 static
x_nucleo_ihm05a1_stm32l1xx.c:446:6:L6208_Board_VrefPwmStop 24 static
x_nucleo_ihm05a1_stm32l1xx.c:474:10:L6208_Board_VrefPwmGetPeriod 4 static
x_nucleo_ihm05a1_stm32l1xx.c:483:6:L6208_Board_ReleaseReset 8 static
x_nucleo_ihm05a1_stm32l1xx.c:492:6:L6208_Board_Reset 8 static
x_nucleo_ihm05a1_stm32l1xx.c:501:6:L6208_Board_CONTROL_PIN_Set 8 static
x_nucleo_ihm05a1_stm32l1xx.c:510:6:L6208_Board_CONTROL_PIN_Reset 8 static
x_nucleo_ihm05a1_stm32l1xx.c:519:6:L6208_Board_CLOCK_PIN_Set 8 static
x_nucleo_ihm05a1_stm32l1xx.c:528:6:L6208_Board_CLOCK_PIN_Reset 8 static
x_nucleo_ihm05a1_stm32l1xx.c:537:6:L6208_Board_HALF_FULL_PIN_Set 8 static
x_nucleo_ihm05a1_stm32l1xx.c:546:6:L6208_Board_HALF_FULL_PIN_Reset 8 static
x_nucleo_ihm05a1_stm32l1xx.c:555:6:L6208_Board_DIR_PIN_Set 8 static
x_nucleo_ihm05a1_stm32l1xx.c:564:6:L6208_Board_DIR_PIN_Reset 8 static
x_nucleo_ihm05a1_stm32l1xx.c:573:10:L6208_Board_FLAG_PIN_GetState 8 static
x_nucleo_ihm05a1_stm32l1xx.c:582:6:L6208_Board_Disable 32 static,ignoring_inline_asm
x_nucleo_ihm05a1_stm32l1xx.c:602:6:L6208_Board_Enable 32 static
stepper/steppermotor/Debug/Core/Src/x_nucleo_ihmxx.d
+6
View File
@@ -0,0 +1,6 @@
Core/Src/x_nucleo_ihmxx.o: ../Core/Src/x_nucleo_ihmxx.c \
../Core/Inc/x_nucleo_ihmxx.h ../Core/Inc/motor.h
../Core/Inc/x_nucleo_ihmxx.h:
../Core/Inc/motor.h:
stepper/steppermotor/Debug/Core/Src/x_nucleo_ihmxx.o
BIN
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stepper/steppermotor/Debug/Core/Src/x_nucleo_ihmxx.su
+97
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@@ -0,0 +1,97 @@
x_nucleo_ihmxx.c:98:20:L6474_GetMotorHandle 4 static
x_nucleo_ihmxx.c:100:20:l647x_GetMotorHandle 4 static
x_nucleo_ihmxx.c:102:20:l648x_GetMotorHandle 4 static
x_nucleo_ihmxx.c:104:20:Powerstep01_GetMotorHandle 4 static
x_nucleo_ihmxx.c:106:20:L6206_GetMotorHandle 4 static
x_nucleo_ihmxx.c:108:20:L6208_GetMotorHandle 4 static
x_nucleo_ihmxx.c:110:20:Stspin220_GetMotorHandle 4 static
x_nucleo_ihmxx.c:112:20:Stspin240_250_GetMotorHandle 4 static
x_nucleo_ihmxx.c:129:6:BSP_MotorControl_AttachErrorHandler 16 static
x_nucleo_ihmxx.c:149:6:BSP_MotorControl_AttachFlagInterrupt 16 static
x_nucleo_ihmxx.c:169:6:BSP_MotorControl_AttachBusyInterrupt 16 static
x_nucleo_ihmxx.c:186:6:BSP_MotorControl_ErrorHandler 16 static
x_nucleo_ihmxx.c:209:6:BSP_MotorControl_Init 16 static
x_nucleo_ihmxx.c:225:6:BSP_MotorControl_FlagInterruptHandler 8 static
x_nucleo_ihmxx.c:242:10:BSP_MotorControl_GetAcceleration 24 static
x_nucleo_ihmxx.c:261:10:BSP_MotorControl_GetBoardId 4 static
x_nucleo_ihmxx.c:273:10:BSP_MotorControl_GetCurrentSpeed 24 static
x_nucleo_ihmxx.c:293:10:BSP_MotorControl_GetDeceleration 24 static
x_nucleo_ihmxx.c:316:14:BSP_MotorControl_GetDeviceState 24 static
x_nucleo_ihmxx.c:337:10:BSP_MotorControl_GetFwVersion 16 static
x_nucleo_ihmxx.c:358:9:BSP_MotorControl_GetMark 24 static
x_nucleo_ihmxx.c:381:10:BSP_MotorControl_GetMaxSpeed 24 static
x_nucleo_ihmxx.c:401:10:BSP_MotorControl_GetMinSpeed 24 static
x_nucleo_ihmxx.c:422:9:BSP_MotorControl_GetPosition 24 static
x_nucleo_ihmxx.c:443:6:BSP_MotorControl_GoHome 16 static
x_nucleo_ihmxx.c:461:6:BSP_MotorControl_GoMark 16 static
x_nucleo_ihmxx.c:480:6:BSP_MotorControl_GoTo 16 static
x_nucleo_ihmxx.c:499:6:BSP_MotorControl_HardStop 16 static
x_nucleo_ihmxx.c:519:6:BSP_MotorControl_Move 16 static
x_nucleo_ihmxx.c:535:6:BSP_MotorControl_ResetAllDevices 8 static
x_nucleo_ihmxx.c:558:6:BSP_MotorControl_Run 16 static
x_nucleo_ihmxx.c:578:6:BSP_MotorControl_SetAcceleration 24 static
x_nucleo_ihmxx.c:601:6:BSP_MotorControl_SetDeceleration 24 static
x_nucleo_ihmxx.c:622:6:BSP_MotorControl_SetHome 16 static
x_nucleo_ihmxx.c:641:6:BSP_MotorControl_SetMark 16 static
x_nucleo_ihmxx.c:664:6:BSP_MotorControl_SetMaxSpeed 24 static
x_nucleo_ihmxx.c:687:6:BSP_MotorControl_SetMinSpeed 24 static
x_nucleo_ihmxx.c:710:6:BSP_MotorControl_SoftStop 24 static
x_nucleo_ihmxx.c:732:6:BSP_MotorControl_StepClockHandler 16 static
x_nucleo_ihmxx.c:749:6:BSP_MotorControl_WaitWhileActive 16 static
x_nucleo_ihmxx.c:779:6:BSP_MotorControl_CmdDisable 16 static
x_nucleo_ihmxx.c:801:6:BSP_MotorControl_CmdEnable 16 static
x_nucleo_ihmxx.c:819:10:BSP_MotorControl_CmdGetParam 24 static
x_nucleo_ihmxx.c:847:10:BSP_MotorControl_CmdGetStatus 24 static
x_nucleo_ihmxx.c:866:6:BSP_MotorControl_CmdNop 16 static
x_nucleo_ihmxx.c:885:6:BSP_MotorControl_CmdSetParam 24 static
x_nucleo_ihmxx.c:906:10:BSP_MotorControl_ReadStatusRegister 24 static
x_nucleo_ihmxx.c:925:6:BSP_MotorControl_ReleaseReset 16 static
x_nucleo_ihmxx.c:941:6:BSP_MotorControl_Reset 16 static
x_nucleo_ihmxx.c:961:6:BSP_MotorControl_SelectStepMode 24 static
x_nucleo_ihmxx.c:987:6:BSP_MotorControl_SetDirection 16 static
x_nucleo_ihmxx.c:1007:6:BSP_MotorControl_CmdGoToDir 16 static
x_nucleo_ihmxx.c:1025:9:BSP_MotorControl_CheckBusyHw 16 static
x_nucleo_ihmxx.c:1046:9:BSP_MotorControl_CheckStatusHw 16 static
x_nucleo_ihmxx.c:1068:6:BSP_MotorControl_CmdGoUntil 24 static
x_nucleo_ihmxx.c:1089:6:BSP_MotorControl_CmdHardHiZ 16 static
x_nucleo_ihmxx.c:1108:6:BSP_MotorControl_CmdReleaseSw 16 static
x_nucleo_ihmxx.c:1125:6:BSP_MotorControl_CmdResetDevice 16 static
x_nucleo_ihmxx.c:1142:6:BSP_MotorControl_CmdResetPos 16 static
x_nucleo_ihmxx.c:1161:6:BSP_MotorControl_CmdRun 16 static
x_nucleo_ihmxx.c:1178:6:BSP_MotorControl_CmdSoftHiZ 16 static
x_nucleo_ihmxx.c:1196:6:BSP_MotorControl_CmdStepClock 16 static
x_nucleo_ihmxx.c:1218:6:BSP_MotorControl_FetchAndClearAllStatus 8 static
x_nucleo_ihmxx.c:1238:10:BSP_MotorControl_GetFetchedStatus 24 static
x_nucleo_ihmxx.c:1256:9:BSP_MotorControl_GetNbDevices 16 static
x_nucleo_ihmxx.c:1276:6:BSP_MotorControl_IsDeviceBusy 24 static
x_nucleo_ihmxx.c:1295:6:BSP_MotorControl_SendQueuedCommands 8 static
x_nucleo_ihmxx.c:1321:6:BSP_MotorControl_QueueCommands 16 static
x_nucleo_ihmxx.c:1337:6:BSP_MotorControl_WaitForAllDevicesNotBusy 8 static
x_nucleo_ihmxx.c:1353:6:BSP_MotorControl_BusyInterruptHandler 8 static
x_nucleo_ihmxx.c:1370:6:BSP_MotorControl_CmdSoftStop 16 static
x_nucleo_ihmxx.c:1388:6:BSP_MotorControl_StartStepClock 16 static
x_nucleo_ihmxx.c:1404:6:BSP_MotorControl_StopStepClock 8 static
x_nucleo_ihmxx.c:1424:6:BSP_MotorControl_SetDualFullBridgeConfig 16 static
x_nucleo_ihmxx.c:1442:10:BSP_MotorControl_GetBridgeInputPwmFreq 24 static
x_nucleo_ihmxx.c:1464:6:BSP_MotorControl_SetBridgeInputPwmFreq 16 static
x_nucleo_ihmxx.c:1485:6:BSP_MotorControl_SetStopMode 16 static
x_nucleo_ihmxx.c:1503:17:BSP_MotorControl_GetStopMode 24 static
x_nucleo_ihmxx.c:1525:6:BSP_MotorControl_SetDecayMode 16 static
x_nucleo_ihmxx.c:1543:18:BSP_MotorControl_GetDecayMode 24 static
x_nucleo_ihmxx.c:1564:17:BSP_MotorControl_GetStepMode 24 static
x_nucleo_ihmxx.c:1585:12:BSP_MotorControl_GetDirection 24 static
x_nucleo_ihmxx.c:1605:6:BSP_MotorControl_ExitDeviceFromReset 16 static
x_nucleo_ihmxx.c:1623:9:BSP_MotorControl_GetTorque 24 static
x_nucleo_ihmxx.c:1645:6:BSP_MotorControl_SetTorque 16 static
x_nucleo_ihmxx.c:1663:6:BSP_MotorControl_SetRefFreq 16 static
x_nucleo_ihmxx.c:1680:10:BSP_MotorControl_GetRefFreq 24 static
x_nucleo_ihmxx.c:1700:6:BSP_MotorControl_SetRefDc 16 static
x_nucleo_ihmxx.c:1717:9:BSP_MotorControl_GetRefDc 24 static
x_nucleo_ihmxx.c:1739:6:BSP_MotorControl_SetNbDevices 24 static
x_nucleo_ihmxx.c:1798:6:BSP_MotorControl_SetAnalogValue 32 static
x_nucleo_ihmxx.c:1818:7:BSP_MotorControl_GetAnalogValue 24 static
x_nucleo_ihmxx.c:1838:6:BSP_MotorControl_SetTorqueBoostEnable 16 static
x_nucleo_ihmxx.c:1855:6:BSP_MotorControl_GetTorqueBoostEnable 24 static
x_nucleo_ihmxx.c:1876:6:BSP_MotorControl_SetTorqueBoostThreshold 16 static
x_nucleo_ihmxx.c:1894:10:BSP_MotorControl_GetTorqueBoostThreshold 24 static
x_nucleo_ihmxx.c:1915:9:BSP_MotorControl_GetDualFullBridgeConfig 16 static
stepper/steppermotor/Debug/Core/Startup/startup_stm32l152retx.d
+2
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@@ -0,0 +1,2 @@
Core/Startup/startup_stm32l152retx.o: \
../Core/Startup/startup_stm32l152retx.s
stepper/steppermotor/Debug/Core/Startup/startup_stm32l152retx.o
BIN
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stepper/steppermotor/Debug/Core/Startup/subdir.mk
+19
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@@ -0,0 +1,19 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
S_SRCS += \
../Core/Startup/startup_stm32l152retx.s
OBJS += \
./Core/Startup/startup_stm32l152retx.o
S_DEPS += \
./Core/Startup/startup_stm32l152retx.d
# Each subdirectory must supply rules for building sources it contributes
Core/Startup/startup_stm32l152retx.o: ../Core/Startup/startup_stm32l152retx.s
arm-none-eabi-gcc -mcpu=cortex-m3 -g3 -c -x assembler-with-cpp -MMD -MP -MF"Core/Startup/startup_stm32l152retx.d" -MT"$@" --specs=nano.specs -mfloat-abi=soft -mthumb -o "$@" "$<"
stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.d
+86
View File
@@ -0,0 +1,86 @@
Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.o: \
../Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal.c \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal.h \
../Core/Inc/stm32l1xx_hal_conf.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_rcc.h \
../Drivers/STM32L1xx_HAL_Driver/Inc/stm32l1xx_hal_def.h \
../Drivers/CMSIS/Device/ST/STM32L1xx/Include/stm32l1xx.h \
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stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.o
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stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cortex.su
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core_cm3.h:1480:22:__NVIC_SetPriorityGrouping 24 static
core_cm3.h:1499:26:__NVIC_GetPriorityGrouping 4 static
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stm32l1xx_hal_cortex.c:169:6:HAL_NVIC_SetPriorityGrouping 16 static
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stm32l1xx_hal_cortex.c:213:6:HAL_NVIC_EnableIRQ 16 static
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stm32l1xx_hal_cortex.c:406:6:HAL_NVIC_SetPendingIRQ 16 static
stm32l1xx_hal_cortex.c:421:10:HAL_NVIC_GetPendingIRQ 16 static
stm32l1xx_hal_cortex.c:434:6:HAL_NVIC_ClearPendingIRQ 16 static
stm32l1xx_hal_cortex.c:448:10:HAL_NVIC_GetActive 16 static
stm32l1xx_hal_cortex.c:462:6:HAL_SYSTICK_CLKSourceConfig 16 static
stm32l1xx_hal_cortex.c:480:6:HAL_SYSTICK_IRQHandler 8 static
stm32l1xx_hal_cortex.c:489:13:HAL_SYSTICK_Callback 4 static
stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_crc.d
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stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_crc.o
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stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_crc.su
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stepper/steppermotor/Debug/Drivers/STM32L1xx_HAL_Driver/Src/stm32l1xx_hal_cryp.d
+86
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