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muellerlu
2026-05-29 10:19:13 +02:00
commit fedfd92270
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riscv_rtl/sw/risc-v/decoder/decoder.hex
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001080B3
40210133
0031C1B3
00426233
0052F2B3
00631333
0073D3B3
40845433
0094A4B3
00A53533
00B58593
00C64613
00D6E693
00E77713
00F79793
01085813
4118D893
01292913
0139B993
014A0A03
015A9A83
016B2B03
017BCB83
018C5C03
019C8CA3
01AD1D23
01BDADA3
01CE0E63
01CE1E63
01EF4F63
01EF5F63
00216163
00217163
0040026F
00420267
000052B7
00006317
riscv_rtl/sw/risc-v/decoder/decoder.s
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// *********************************************************************************************
// Description : Assembly instructions for decoder test
// Project Version : v1.0
// Project : [BCDC] Microtec Academy Course: Building a RISC-V CPU with SystemVerilog
// -----
// Copyright (c) : 2025 Fraunhofer IIS, Department IDS
// Created : 15.Oct.2025 by Hussein Elzomor
// Last Modified : 15.Oct.2025 by Hussein Elzomor
// -----
// HISTORY : Date By Comments
// ----------- --------- -------------------------------------------------
// *********************************************************************************************
# Iteration over all implemented instructions to test decoder
# R-instruction # Hex # bin f7 rs2 rs1 f3 rd opcode
add x1 , x1 , x1 # 0x001080B3 # 0b 0000000 00001 00001 000 00001 0110011
sub x2 , x2 , x2 # 0x40210133 # 0b 0100000 00010 00010 000 00010 0110011
xor x3 , x3 , x3 # 0x0031C1B3 # 0b 0000000 00011 00011 100 00011 0110011
or x4 , x4 , x4 # 0x00426233 # 0b 0000000 00100 00100 110 00100 0110011
and x5 , x5 , x5 # 0x0052F2B3 # 0b 0000000 00101 00101 111 00101 0110011
sll x6 , x6 , x6 # 0x00631333 # 0b 0000000 00110 00110 001 00110 0110011
srl x7 , x7 , x7 # 0x0073D3B3 # 0b 0000000 00111 00111 101 00111 0110011
sra x8 , x8 , x8 # 0x40845433 # 0b 0100000 01000 01000 101 01000 0110011
slt x9 , x9 , x9 # 0x0094A4B3 # 0b 0000000 01001 01001 010 01001 0110011
sltu x10, x10, x10 # 0x00A53533 # 0b 0000000 01010 01010 011 01010 0110011
# I-instruction # Hex # bin imm rs1 f3 rd opcode
addi x11, x11, 11 # 0x00B58593 # 0b 000000001011 01011 000 01011 0010011
xori x12, x12, 12 # 0x00C64613 # 0b 000000001100 01100 100 01100 0010011
ori x13, x13, 13 # 0x00D6E693 # 0b 000000001101 01101 110 01101 0010011
andi x14, x14, 14 # 0x00E77713 # 0b 000000001110 01110 111 01110 0010011
slli x15, x15, 15 # 0x00F79793 # 0b 000000001111 01111 001 01111 0010011
srli x16, x16, 16 # 0x01085813 # 0b 000000010000 10000 101 10000 0010011
srai x17, x17, 17 # 0x4118D893 # 0b 010000010001 10001 101 10001 0010011
slti x18, x18, 18 # 0x01292913 # 0b 000000010010 10010 010 10010 0010011
sltiu x19, x19, 19 # 0x0139B993 # 0b 000000010011 10011 011 10011 0010011
lb x20, 20(x20) # 0x014A0A03 # 0b 000000010100 10100 000 10100 0000011
lh x21, 21(x21) # 0x015A9A83 # 0b 000000010101 10101 001 10101 0000011
lw x22, 22(x22) # 0x016B2B03 # 0b 000000010110 10110 010 10110 0000011
lbu x23, 23(x23) # 0x017BCB83 # 0b 000000010111 10111 100 10111 0000011
lhu x24, 24(x24) # 0x018C5C03 # 0b 000000011000 11000 101 11000 0000011
# S-instruction # Hex # bin imm rs2 rs1 f3 imm opcode
sb x25, 25(x25) # 0x019C8CA3 # 0b 0000000 11001 11001 000 11001 0100011
sh x26, 26(x26) # 0x01AD1D23 # 0b 0000000 11010 11010 001 11010 0100011
sw x27, 27(x27) # 0x01BDADA3 # 0b 0000000 11011 11011 010 11011 0100011
# B-instruction # Hex # bin imm rs2 rs1 f3 imm opcode
beq x28, x28, 28 # 0x01CE0E63 # 0b 0000000 11100 11100 000 11100 1100011
bne x28, x28, 28 # 0x01CE1E63 # 0b 0000000 11100 11100 001 11100 1100011
blt x30, x30, 30 # 0x01EF4F63 # 0b 0000000 11110 11110 100 11110 1100011
bge x30, x30, 30 # 0x01EF5F63 # 0b 0000000 11110 11110 101 11110 1100011
bltu x2 , x2 , 2 # 0x00216163 # 0b 0000000 00010 00010 110 00010 1100011
bgeu x2 , x2 , 2 # 0x00217163 # 0b 0000000 00010 00010 111 00010 1100011
# J-instruction # Hex # bin f7 rd opcode
jal x4 , 4 # 0x0040026F # 0b 00000000010000000000 00100 1101111
jalr x4 , x4, 4 # 0x00420267 # 0b 00000000010000100000 00100 1100111
# U-instruction # Hex # bin f7 rd opcode
lui x5 , 5 # 0x000052B7 # 0b 00000000000000000101 00101 0110111
auipc x6 , 6 # 0x00006317 # 0b 00000000000000000110 00110 0010111