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ESY1A_B_Seminararbeiten
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Verwendeter Programmcode in Studienarbeit für ESY1B zum Thema "Verifikation mit SystemVerilog und Python"
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ESY1A_B_Seminararbeiten/i2c_slave_opencores/sim
Simon Schmidt b3637d6d76 added i2c example from VL 2 years ago
..
build_icarus.bat added i2c example from VL 2 years ago
filelist.icarus added i2c example from VL 2 years ago
gtkwave.ini added i2c example from VL 2 years ago
myWave.sav added i2c example from VL 2 years ago
run_icarus.bat added i2c example from VL 2 years ago
simulate.sh added i2c example from VL 2 years ago
viewWave.bat added i2c example from VL 2 years ago