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ESY1A_B_Seminararbeiten
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Verwendeter Programmcode in Studienarbeit für ESY1B zum Thema "Verifikation mit SystemVerilog und Python"
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ESY1A_B_Seminararbeiten
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4-bit-counter-cocotb
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hdl
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Simon Schmidt
ec65cf50cb
added and changed gitignores
3 years ago
..
counter.v
added and changed gitignores
3 years ago