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kuntzschcl/ESY1_Projekt_2022
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26 Commits 2 Branches 0 Tags
026899b930835597e8ea85d65177e75bdc2b1a06
Commit Graph
7 Commits
Author SHA1 Message Date
sessleral71711 026899b930 Added parallelport, timer and ampelsteuerung 2022-06-14 12:21:25 +02:00
sessleral71711 c93bdaf629 Added bus_if and fsm to top level design 2022-06-14 11:53:20 +02:00
sessleral71711 1be3ce1cea merge konflikt behoben 2022-06-14 11:52:04 +02:00
sessleral71711 4b0451fc63 Merge branch 'top_level_design' of https://git.efi.th-nuernberg.de/gitea/kuntzschcl/ESY1_Projekt_2022 into top_level_design 2022-06-14 11:51:22 +02:00
sessleral71711 20f8e707bd Added Bus_if and fsm to top level design 2022-06-14 11:45:29 +02:00
sessleral71711 6b874ba5c7 Initalized top level design 2022-06-14 11:34:24 +02:00
sessleral71711 b8d834144b Initalized top level design 2022-06-14 10:35:05 +02:00
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