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@@ -3,8 +3,6 @@ input wire clk12M,
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input wire rst,
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input wire [7:0] data_input,
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input wire data_valid,
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output reg REDn,
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output reg GRNn,
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output reg RED,
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output reg GRN,
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output reg alarm
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@@ -12,7 +10,8 @@ output reg alarm
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wire red_pwm;
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wire grn_pwm;
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reg REDn;
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reg GRNn;
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defparam U1.on_hi = 2'b10;
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defparam U1.on_lo = 2'b01;
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defparam U1.off = 2'b00;
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@@ -1,9 +1,15 @@
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`include "../spi_interface.v"
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`include "../fsm/Fsm.sv"
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`include "../Bus_if/Bus_if.sv"
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`include "../timer_port/timer_top.sv"
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module Top(
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input wire clk
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input wire clk,
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input wire rst,
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input wire endOfConv,
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output wire LEDg,
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output wire LEDr,
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output wire AlarmAmpel
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);
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// Bus (Interface)
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Bus_if bus(.clk(clk));
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@@ -19,8 +25,33 @@ module Top(
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.outTimerEN(bus.TimerEN)
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);
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// Parallelport
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parallelport parallelport1 (
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.inClk(clk),
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.inTimerMeas(bus.TimerMeas),
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.inEndOfConv(endOfConv),
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.inData(bus.Data),
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.outDataValid(bus.DataValid),
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.outData(bus.Data)
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);
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// FRAM-Controller
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// Timer
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timer timer1 (
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.inClk(clk),
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.inTaste(bus.Taste),
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.inEN(bus.TimerEN),
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.outReadTemp(bus.ReadTemp),
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.outTasteAktiv(bus.TasteAktiv)
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);
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// Ampelsteuerung
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led_top ampelsteuerung (
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.clk12M(clk),
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.rst(rst),
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.data_input(bus.Data),
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.data_valid(bus.DataValid),
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.RED(LEDr),
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.GRN(LEDg),
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.alarm(bus.AlarmAmpel)
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);
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assign AlarmAmpel = bus.AlarmAmpel;
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endmodule
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