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kuntzschcl/ESY1_Projekt_2022
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29 Commits 2 Branches 0 Tags
019dc2868e47410c6bf838b36321788ea6dfe567
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14 Commits
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Author SHA1 Message Date
sessleral71711 019dc2868e Added parallelport, timer and ampelsteuerung 2022-06-14 12:26:26 +02:00
sessleral71711 b30efd039d Added bus_if and fsm to top level design 2022-06-14 12:25:53 +02:00
sessleral71711 ecd6f16dbe merge konflikt behoben 2022-06-14 12:25:25 +02:00
sessleral71711 6a72019f25 Initalized top level design 2022-06-14 12:25:19 +02:00
sessleral71711 53868c67fd Added Bus_if and fsm to top level design 2022-06-14 12:22:52 +02:00
sessleral71711 6ab278694e Initalized top level design 2022-06-14 12:22:52 +02:00
sessleral71711 d2aa8277c7 spi_interface dateien 2022-06-14 11:56:42 +02:00
sessleral71711 200a989683 Added modport for timer 2022-06-14 11:23:54 +02:00
sessleral71711 613bffbcfc Added modport in Bus_if for Fsm 2022-06-14 11:03:41 +02:00
sessleral71711 ad550a9ac6 Created bus as interface 2022-06-14 10:49:23 +02:00
sessleral71711 e8af8d04c8 Merge branch 'main' of https://git.efi.th-nuernberg.de/gitea/kuntzschcl/ESY1_Projekt_2022 2022-06-14 09:51:22 +02:00
sessleral71711 71b0458554 FSM mit 2 States erstellt und getestet 2022-06-02 09:26:16 +02:00
sessleral71711 48610eeb8c Added Clk_generator 2022-05-31 12:50:05 +02:00
sessleral71711 dcb19f11aa FSM initial commit 2022-05-31 12:45:24 +02:00
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