Logo
Explore Help
Sign In
kuntzschcl/ESY1_Projekt_2022
Watch 1
Star 0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
26 Commits 2 Branches 0 Tags
6a72019f256254faaf709f6d0a6206f678d3f3d4
Commit Graph
11 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
sessleral71711 6a72019f25 Initalized top level design 2022-06-14 12:25:19 +02:00
sessleral71711 53868c67fd Added Bus_if and fsm to top level design 2022-06-14 12:22:52 +02:00
sessleral71711 6ab278694e Initalized top level design 2022-06-14 12:22:52 +02:00
sessleral71711 d2aa8277c7 spi_interface dateien 2022-06-14 11:56:42 +02:00
sessleral71711 200a989683 Added modport for timer 2022-06-14 11:23:54 +02:00
sessleral71711 613bffbcfc Added modport in Bus_if for Fsm 2022-06-14 11:03:41 +02:00
sessleral71711 ad550a9ac6 Created bus as interface 2022-06-14 10:49:23 +02:00
sessleral71711 e8af8d04c8 Merge branch 'main' of https://git.efi.th-nuernberg.de/gitea/kuntzschcl/ESY1_Projekt_2022 2022-06-14 09:51:22 +02:00
sessleral71711 71b0458554 FSM mit 2 States erstellt und getestet 2022-06-02 09:26:16 +02:00
sessleral71711 48610eeb8c Added Clk_generator 2022-05-31 12:50:05 +02:00
sessleral71711 dcb19f11aa FSM initial commit 2022-05-31 12:45:24 +02:00
Powered by Gitea Version: v1.27.3 Page: 33ms Template: 4ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API